Simulation Results: i2c

 
25/11/2025 18:38:29 sha: 3424e7f json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 87.41 %
  • code
  • 82.11 %
  • assert
  • 96.19 %
  • func
  • 83.93 %
  • line
  • 96.60 %
  • branch
  • 92.83 %
  • cond
  • 87.41 %
  • toggle
  • 89.66 %
  • FSM
  • 44.05 %
Validation stages
V1
100.00%
V2
93.88%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
host_smoke 1 1 100.00
i2c_host_smoke 13.780s 1333.794us 1 1 100.00
target_smoke 1 1 100.00
i2c_target_smoke 23.110s 4561.938us 1 1 100.00
csr_hw_reset 1 1 100.00
i2c_csr_hw_reset 0.950s 28.120us 1 1 100.00
csr_rw 1 1 100.00
i2c_csr_rw 0.820s 19.621us 1 1 100.00
csr_bit_bash 1 1 100.00
i2c_csr_bit_bash 3.790s 2042.495us 1 1 100.00
csr_aliasing 1 1 100.00
i2c_csr_aliasing 1.790s 137.052us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
i2c_csr_mem_rw_with_rand_reset 0.770s 50.376us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
i2c_csr_rw 0.820s 19.621us 1 1 100.00
i2c_csr_aliasing 1.790s 137.052us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_error_intr 0 1 0.00
i2c_host_error_intr 0.730s 11.414us 0 1 0.00
host_stress_all 1 1 100.00
i2c_host_stress_all 195.670s 10100.458us 1 1 100.00
host_maxperf 1 1 100.00
i2c_host_perf 11.310s 479.654us 1 1 100.00
host_override 1 1 100.00
i2c_host_override 0.850s 31.414us 1 1 100.00
host_fifo_watermark 1 1 100.00
i2c_host_fifo_watermark 137.260s 3445.987us 1 1 100.00
host_fifo_overflow 1 1 100.00
i2c_host_fifo_overflow 52.430s 5608.063us 1 1 100.00
host_fifo_reset 3 3 100.00
i2c_host_fifo_reset_fmt 1.230s 122.170us 1 1 100.00
i2c_host_fifo_fmt_empty 3.430s 238.196us 1 1 100.00
i2c_host_fifo_reset_rx 2.690s 160.785us 1 1 100.00
host_fifo_full 1 1 100.00
i2c_host_fifo_full 77.820s 8679.612us 1 1 100.00
host_timeout 1 1 100.00
i2c_host_stretch_timeout 9.450s 2876.779us 1 1 100.00
i2c_host_mode_toggle 0 1 0.00
i2c_host_mode_toggle 0.780s 18.401us 0 1 0.00
target_glitch 0 1 0.00
i2c_target_glitch 1.840s 1023.944us 0 1 0.00
target_stress_all 1 1 100.00
i2c_target_stress_all 20.640s 11639.356us 1 1 100.00
target_maxperf 1 1 100.00
i2c_target_perf 3.560s 654.102us 1 1 100.00
target_fifo_empty 2 2 100.00
i2c_target_stress_rd 3.580s 241.746us 1 1 100.00
i2c_target_intr_smoke 5.880s 6517.419us 1 1 100.00
target_fifo_reset 2 2 100.00
i2c_target_fifo_reset_acq 1.200s 181.369us 1 1 100.00
i2c_target_fifo_reset_tx 1.250s 223.417us 1 1 100.00
target_fifo_full 3 3 100.00
i2c_target_stress_wr 31.780s 34073.776us 1 1 100.00
i2c_target_stress_rd 3.580s 241.746us 1 1 100.00
i2c_target_intr_stress_wr 4.810s 9103.264us 1 1 100.00
target_timeout 1 1 100.00
i2c_target_timeout 4.480s 1197.808us 1 1 100.00
target_clock_stretch 1 1 100.00
i2c_target_stretch 16.110s 2907.106us 1 1 100.00
bad_address 1 1 100.00
i2c_target_bad_addr 3.590s 1011.499us 1 1 100.00
target_mode_glitch 1 1 100.00
i2c_target_hrst 1.470s 271.935us 1 1 100.00
target_fifo_watermark 2 2 100.00
i2c_target_fifo_watermarks_acq 2.000s 3288.350us 1 1 100.00
i2c_target_fifo_watermarks_tx 1.520s 634.961us 1 1 100.00
host_mode_config_perf 2 2 100.00
i2c_host_perf 11.310s 479.654us 1 1 100.00
i2c_host_perf_precise 1.240s 144.106us 1 1 100.00
host_mode_clock_stretching 1 1 100.00
i2c_host_stretch_timeout 9.450s 2876.779us 1 1 100.00
target_mode_tx_stretch_ctrl 1 1 100.00
i2c_target_tx_stretch_ctrl 5.190s 531.415us 1 1 100.00
target_mode_nack_generation 3 3 100.00
i2c_target_nack_acqfull 2.040s 4678.206us 1 1 100.00
i2c_target_nack_acqfull_addr 1.860s 1993.418us 1 1 100.00
i2c_target_nack_txstretch 1.120s 281.973us 1 1 100.00
host_mode_halt_on_nak 1 1 100.00
i2c_host_may_nack 4.220s 3596.397us 1 1 100.00
target_mode_smbus_maxlen 1 1 100.00
i2c_target_smbus_maxlen 1.700s 1120.245us 1 1 100.00
alert_test 1 1 100.00
i2c_alert_test 0.630s 17.804us 1 1 100.00
intr_test 1 1 100.00
i2c_intr_test 0.870s 29.221us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
i2c_tl_errors 1.970s 120.495us 1 1 100.00
tl_d_illegal_access 1 1 100.00
i2c_tl_errors 1.970s 120.495us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
i2c_csr_hw_reset 0.950s 28.120us 1 1 100.00
i2c_csr_rw 0.820s 19.621us 1 1 100.00
i2c_csr_aliasing 1.790s 137.052us 1 1 100.00
i2c_same_csr_outstanding 0.870s 114.248us 1 1 100.00
tl_d_partial_access 4 4 100.00
i2c_csr_hw_reset 0.950s 28.120us 1 1 100.00
i2c_csr_rw 0.820s 19.621us 1 1 100.00
i2c_csr_aliasing 1.790s 137.052us 1 1 100.00
i2c_same_csr_outstanding 0.870s 114.248us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
i2c_tl_intg_err 1.290s 83.490us 1 1 100.00
i2c_sec_cm 0.920s 73.304us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
i2c_tl_intg_err 1.290s 83.490us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_stress_all_with_rand_reset 0 1 0.00
i2c_host_stress_all_with_rand_reset 8.050s 444.549us 0 1 0.00
target_error_intr 0 1 0.00
i2c_target_unexp_stop 1.310s 489.393us 0 1 0.00
target_stress_all_with_rand_reset 0 1 0.00
i2c_target_stress_all_with_rand_reset 5.470s 812.001us 0 1 0.00