Simulation Results: otp_ctrl

 
25/11/2025 18:38:29 sha: 3424e7f json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.76 %
  • code
  • 77.51 %
  • assert
  • 93.71 %
  • func
  • 71.07 %
  • line
  • 88.19 %
  • branch
  • 83.12 %
  • cond
  • 90.07 %
  • toggle
  • 84.84 %
  • FSM
  • 41.32 %
Validation stages
V1
90.91%
V2
88.00%
V2S
92.86%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 1.560s 203.900us 1 1 100.00
smoke 1 1 100.00
otp_ctrl_smoke 3.540s 236.402us 1 1 100.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 2.300s 240.917us 1 1 100.00
csr_rw 1 1 100.00
otp_ctrl_csr_rw 1.560s 61.740us 1 1 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 3.570s 326.296us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 2.820s 121.181us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
otp_ctrl_csr_mem_rw_with_rand_reset 1.610s 62.106us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otp_ctrl_csr_rw 1.560s 61.740us 1 1 100.00
otp_ctrl_csr_aliasing 2.820s 121.181us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 1.850s 504.561us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 1.370s 52.451us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 1 1 100.00
otp_ctrl_partition_walk 26.310s 9821.724us 1 1 100.00
init_fail 1 1 100.00
otp_ctrl_init_fail 3.700s 416.909us 1 1 100.00
partition_check 0 2 0.00
otp_ctrl_background_chks 20.610s 9472.003us 0 1 0.00
otp_ctrl_check_fail 5.400s 188.985us 0 1 0.00
regwen_during_otp_init 1 1 100.00
otp_ctrl_regwen 4.110s 463.217us 1 1 100.00
partition_lock 1 1 100.00
otp_ctrl_dai_lock 10.050s 1275.367us 1 1 100.00
interface_key_check 1 1 100.00
otp_ctrl_parallel_key_req 4.130s 285.182us 1 1 100.00
lc_interactions 2 2 100.00
otp_ctrl_parallel_lc_req 17.650s 2628.107us 1 1 100.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
otp_dai_errors 1 1 100.00
otp_ctrl_dai_errs 13.540s 311.895us 1 1 100.00
otp_macro_errors 0 1 0.00
otp_ctrl_macro_errs 1.650s 47.326us 0 1 0.00
test_access 1 1 100.00
otp_ctrl_test_access 19.540s 2459.123us 1 1 100.00
stress_all 1 1 100.00
otp_ctrl_stress_all 90.220s 87967.188us 1 1 100.00
intr_test 1 1 100.00
otp_ctrl_intr_test 1.350s 133.170us 1 1 100.00
alert_test 1 1 100.00
otp_ctrl_alert_test 1.390s 49.959us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otp_ctrl_tl_errors 4.860s 175.242us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otp_ctrl_tl_errors 4.860s 175.242us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otp_ctrl_csr_hw_reset 2.300s 240.917us 1 1 100.00
otp_ctrl_csr_rw 1.560s 61.740us 1 1 100.00
otp_ctrl_csr_aliasing 2.820s 121.181us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.540s 1210.485us 1 1 100.00
tl_d_partial_access 4 4 100.00
otp_ctrl_csr_hw_reset 2.300s 240.917us 1 1 100.00
otp_ctrl_csr_rw 1.560s 61.740us 1 1 100.00
otp_ctrl_csr_aliasing 2.820s 121.181us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.540s 1210.485us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
tl_intg_err 2 2 100.00
otp_ctrl_tl_intg_err 20.930s 20211.944us 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
prim_count_check 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
prim_fsm_check 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otp_ctrl_tl_intg_err 20.930s 20211.944us 1 1 100.00
sec_cm_secret_mem_scramble 1 1 100.00
otp_ctrl_smoke 3.540s 236.402us 1 1 100.00
sec_cm_part_mem_digest 1 1 100.00
otp_ctrl_smoke 3.540s 236.402us 1 1 100.00
sec_cm_dai_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_kdi_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_lci_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_part_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_scrmbl_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_timer_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_dai_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_kdi_seed_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_kdi_entropy_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_lci_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_part_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_scrmbl_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_timer_integ_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_timer_cnsty_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_timer_lfsr_redun 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_dai_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_lci_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
sec_cm_kdi_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
sec_cm_part_fsm_local_esc 1 2 50.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
otp_ctrl_macro_errs 1.650s 47.326us 0 1 0.00
sec_cm_scrmbl_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
sec_cm_timer_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_dai_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_lci_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
sec_cm_kdi_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
sec_cm_part_fsm_global_esc 1 2 50.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
otp_ctrl_macro_errs 1.650s 47.326us 0 1 0.00
sec_cm_scrmbl_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
sec_cm_timer_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 3.110s 117.238us 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_part_data_reg_integrity 1 1 100.00
otp_ctrl_init_fail 3.700s 416.909us 1 1 100.00
sec_cm_part_data_reg_bkgn_chk 0 1 0.00
otp_ctrl_check_fail 5.400s 188.985us 0 1 0.00
sec_cm_part_mem_regren 1 1 100.00
otp_ctrl_dai_lock 10.050s 1275.367us 1 1 100.00
sec_cm_part_mem_sw_unreadable 1 1 100.00
otp_ctrl_dai_lock 10.050s 1275.367us 1 1 100.00
sec_cm_part_mem_sw_unwritable 1 1 100.00
otp_ctrl_dai_lock 10.050s 1275.367us 1 1 100.00
sec_cm_lc_part_mem_sw_noaccess 1 1 100.00
otp_ctrl_dai_lock 10.050s 1275.367us 1 1 100.00
sec_cm_access_ctrl_mubi 1 1 100.00
otp_ctrl_dai_lock 10.050s 1275.367us 1 1 100.00
sec_cm_token_valid_ctrl_mubi 1 1 100.00
otp_ctrl_smoke 3.540s 236.402us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
otp_ctrl_dai_lock 10.050s 1275.367us 1 1 100.00
sec_cm_test_bus_lc_gated 1 1 100.00
otp_ctrl_smoke 3.540s 236.402us 1 1 100.00
sec_cm_test_tl_lc_gate_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 103.570s 17488.081us 1 1 100.00
sec_cm_direct_access_config_regwen 1 1 100.00
otp_ctrl_regwen 4.110s 463.217us 1 1 100.00
sec_cm_check_trigger_config_regwen 1 1 100.00
otp_ctrl_smoke 3.540s 236.402us 1 1 100.00
sec_cm_check_config_regwen 1 1 100.00
otp_ctrl_smoke 3.540s 236.402us 1 1 100.00
sec_cm_macro_mem_integrity 0 1 0.00
otp_ctrl_macro_errs 1.650s 47.326us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 1 1 100.00
otp_ctrl_low_freq_read 9.790s 2997.614us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
otp_ctrl_stress_all_with_rand_reset 1.480s 107.111us 0 1 0.00