| chip_pin_mux |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
196.010s |
5411.481us |
1 |
1 |
100.00
|
| chip_padctrl_attributes |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
196.010s |
5411.481us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_mio_dio_val |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_mio_dio_val |
172.020s |
3128.313us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_wake |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_wake |
192.190s |
3152.260us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_retention |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_retention |
159.130s |
3788.242us |
1 |
1 |
100.00
|
| chip_sw_tap_strap_sampling |
4 |
4 |
100.00 |
|
chip_tap_straps_dev |
87.580s |
2858.778us |
1 |
1 |
100.00
|
|
chip_tap_straps_testunlock0 |
554.010s |
9552.204us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
439.390s |
7515.906us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
106.620s |
3140.242us |
1 |
1 |
100.00
|
| chip_sw_pattgen_ios |
1 |
1 |
100.00 |
|
chip_sw_pattgen_ios |
166.400s |
3008.993us |
1 |
1 |
100.00
|
| chip_sw_sleep_pwm_pulses |
1 |
1 |
100.00 |
|
chip_sw_sleep_pwm_pulses |
864.850s |
8806.930us |
1 |
1 |
100.00
|
| chip_sw_data_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
401.890s |
5955.697us |
1 |
1 |
100.00
|
| chip_sw_instruction_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
401.890s |
5955.697us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_outputs |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
548.140s |
8156.382us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_rst_inputs |
0 |
1 |
0.00 |
|
chip_sw_ast_clk_rst_inputs |
2356.900s |
23152.165us |
0 |
1 |
0.00
|
| chip_sw_ast_sys_clk_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
366.700s |
3924.644us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
530.040s |
5021.969us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3478.680s |
18605.294us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
165.720s |
2789.186us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
528.750s |
6389.857us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
127.050s |
3035.038us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
678.550s |
6999.745us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
146.660s |
2837.286us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
298.670s |
4049.924us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
124.960s |
2714.311us |
1 |
1 |
100.00
|
| chip_sw_ast_usb_clk_calib |
1 |
1 |
100.00 |
|
chip_sw_usb_ast_clk_calib |
149.160s |
3332.071us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_alerts |
2 |
2 |
100.00 |
|
chip_sw_sensor_ctrl_alert |
423.980s |
7070.290us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
231.360s |
4715.172us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_status |
1 |
1 |
100.00 |
|
chip_sw_sensor_ctrl_status |
195.640s |
3163.243us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
231.360s |
4715.172us |
1 |
1 |
100.00
|
| chip_sw_smoketest |
17 |
17 |
100.00 |
|
chip_sw_flash_scrambling_smoketest |
141.190s |
2665.373us |
1 |
1 |
100.00
|
|
chip_sw_aes_smoketest |
160.830s |
2837.627us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_smoketest |
165.280s |
2952.759us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_smoketest |
192.640s |
3000.353us |
1 |
1 |
100.00
|
|
chip_sw_csrng_smoketest |
149.780s |
2761.865us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_smoketest |
943.480s |
7425.970us |
1 |
1 |
100.00
|
|
chip_sw_gpio_smoketest |
213.640s |
3512.359us |
1 |
1 |
100.00
|
|
chip_sw_hmac_smoketest |
204.450s |
2508.845us |
1 |
1 |
100.00
|
|
chip_sw_kmac_smoketest |
138.070s |
2822.480us |
1 |
1 |
100.00
|
|
chip_sw_otbn_smoketest |
1261.680s |
11732.933us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
304.210s |
6423.074us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_usbdev_smoketest |
182.490s |
5785.712us |
1 |
1 |
100.00
|
|
chip_sw_rv_plic_smoketest |
110.190s |
3189.722us |
1 |
1 |
100.00
|
|
chip_sw_rv_timer_smoketest |
155.300s |
3158.353us |
1 |
1 |
100.00
|
|
chip_sw_rstmgr_smoketest |
91.460s |
2265.855us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_smoketest |
92.960s |
2761.851us |
1 |
1 |
100.00
|
|
chip_sw_uart_smoketest |
182.090s |
3660.781us |
1 |
1 |
100.00
|
| chip_sw_otp_smoketest |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_smoketest |
118.350s |
2502.190us |
1 |
1 |
100.00
|
| chip_sw_rom_functests |
1 |
1 |
100.00 |
|
rom_keymgr_functest |
352.970s |
4465.067us |
1 |
1 |
100.00
|
| chip_sw_boot |
1 |
1 |
100.00 |
|
chip_sw_uart_tx_rx_bootstrap |
7883.250s |
62738.677us |
1 |
1 |
100.00
|
| chip_sw_secure_boot |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2565.320s |
15236.351us |
1 |
1 |
100.00
|
| chip_sw_rom_raw_unlock |
0 |
1 |
0.00 |
|
rom_raw_unlock |
309.320s |
10313.516us |
0 |
1 |
0.00
|
| chip_sw_power_idle_load |
0 |
1 |
0.00 |
|
chip_sw_power_idle_load |
208.290s |
3567.455us |
0 |
1 |
0.00
|
| chip_sw_power_sleep_load |
0 |
1 |
0.00 |
|
chip_sw_power_sleep_load |
186.780s |
3597.324us |
0 |
1 |
0.00
|
| chip_sw_exit_test_unlocked_bootstrap |
1 |
1 |
100.00 |
|
chip_sw_exit_test_unlocked_bootstrap |
6930.240s |
54900.156us |
1 |
1 |
100.00
|
| chip_sw_inject_scramble_seed |
1 |
1 |
100.00 |
|
chip_sw_inject_scramble_seed |
7241.550s |
56672.070us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
56.620s |
2170.422us |
0 |
1 |
0.00
|
| tl_d_illegal_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
56.620s |
2170.422us |
0 |
1 |
0.00
|
| tl_d_outstanding_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
4740.450s |
37350.482us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
1136.300s |
15488.140us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
170.390s |
4856.506us |
1 |
1 |
100.00
|
|
chip_csr_rw |
292.630s |
5500.958us |
1 |
1 |
100.00
|
| tl_d_partial_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
4740.450s |
37350.482us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
1136.300s |
15488.140us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
170.390s |
4856.506us |
1 |
1 |
100.00
|
|
chip_csr_rw |
292.630s |
5500.958us |
1 |
1 |
100.00
|
| xbar_base_random_sequence |
1 |
1 |
100.00 |
|
xbar_random |
44.680s |
1953.212us |
1 |
1 |
100.00
|
| xbar_random_delay |
6 |
6 |
100.00 |
|
xbar_smoke_zero_delays |
4.830s |
49.950us |
1 |
1 |
100.00
|
|
xbar_smoke_large_delays |
55.550s |
9262.259us |
1 |
1 |
100.00
|
|
xbar_smoke_slow_rsp |
44.240s |
5012.813us |
1 |
1 |
100.00
|
|
xbar_random_zero_delays |
30.010s |
496.239us |
1 |
1 |
100.00
|
|
xbar_random_large_delays |
347.120s |
57485.006us |
1 |
1 |
100.00
|
|
xbar_random_slow_rsp |
203.610s |
24524.517us |
1 |
1 |
100.00
|
| xbar_unmapped_address |
2 |
2 |
100.00 |
|
xbar_unmapped_addr |
32.160s |
1254.939us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
12.480s |
185.572us |
1 |
1 |
100.00
|
| xbar_error_cases |
2 |
2 |
100.00 |
|
xbar_error_random |
27.500s |
612.492us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
12.480s |
185.572us |
1 |
1 |
100.00
|
| xbar_all_access_same_device |
2 |
2 |
100.00 |
|
xbar_access_same_device |
27.350s |
1098.783us |
1 |
1 |
100.00
|
|
xbar_access_same_device_slow_rsp |
279.530s |
32819.362us |
1 |
1 |
100.00
|
| xbar_all_hosts_use_same_source_id |
1 |
1 |
100.00 |
|
xbar_same_source |
21.810s |
416.906us |
1 |
1 |
100.00
|
| xbar_stress_all |
2 |
2 |
100.00 |
|
xbar_stress_all |
106.810s |
2134.248us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_error |
79.300s |
1646.547us |
1 |
1 |
100.00
|
| xbar_stress_with_reset |
2 |
2 |
100.00 |
|
xbar_stress_all_with_rand_reset |
622.830s |
22256.166us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_reset_error |
35.750s |
912.554us |
1 |
1 |
100.00
|
| rom_e2e_smoke |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2565.320s |
15236.351us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_output |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_output |
2212.990s |
30927.116us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_exception_c |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_exception_c |
2387.940s |
15132.984us |
1 |
1 |
100.00
|
| rom_e2e_boot_policy_valid |
5 |
15 |
33.33 |
|
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 |
2021.330s |
11941.456us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_dev |
2554.460s |
16183.821us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod |
2644.560s |
15650.684us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod_end |
2538.310s |
16004.652us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_rma |
2480.110s |
15199.784us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 |
18.900s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_dev |
17.880s |
10.140us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod |
16.330s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end |
16.760s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_rma |
17.230s |
10.380us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 |
17.070s |
10.200us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_dev |
16.770s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod |
19.720s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end |
20.240s |
10.360us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_rma |
20.280s |
10.380us |
0 |
1 |
0.00
|
| rom_e2e_sigverify_always |
0 |
15 |
0.00 |
|
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 |
28.680s |
10.280us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_dev |
17.150s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod |
18.530s |
10.260us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod_end |
18.400s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_rma |
18.440s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 |
24.140s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_dev |
17.300s |
10.280us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod |
17.080s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end |
22.290s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_rma |
21.880s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 |
22.490s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_dev |
22.880s |
10.240us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod |
17.020s |
10.380us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end |
16.220s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_rma |
18.990s |
10.200us |
0 |
1 |
0.00
|
| rom_e2e_asm_init |
5 |
5 |
100.00 |
|
rom_e2e_asm_init_test_unlocked0 |
1844.890s |
12469.892us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_dev |
2589.610s |
17482.163us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod |
2571.300s |
15134.970us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod_end |
2542.220s |
16163.205us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_rma |
2472.340s |
15312.490us |
1 |
1 |
100.00
|
| rom_e2e_keymgr_init |
3 |
3 |
100.00 |
|
rom_e2e_keymgr_init_rom_ext_meas |
2314.070s |
15135.814us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_no_meas |
2423.500s |
15245.134us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_invalid_meas |
2323.390s |
15002.402us |
1 |
1 |
100.00
|
| rom_e2e_static_critical |
1 |
1 |
100.00 |
|
rom_e2e_static_critical |
2522.240s |
15724.042us |
1 |
1 |
100.00
|
| chip_sw_adc_ctrl_debug_cable_irq |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2985.480s |
34563.124us |
0 |
1 |
0.00
|
| chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2985.480s |
34563.124us |
0 |
1 |
0.00
|
| chip_sw_aes_enc |
2 |
2 |
100.00 |
|
chip_sw_aes_enc |
125.760s |
2918.858us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
165.720s |
2789.186us |
1 |
1 |
100.00
|
| chip_sw_aes_entropy |
1 |
1 |
100.00 |
|
chip_sw_aes_entropy |
130.560s |
2302.987us |
1 |
1 |
100.00
|
| chip_sw_aes_idle |
1 |
1 |
100.00 |
|
chip_sw_aes_idle |
105.710s |
2353.535us |
1 |
1 |
100.00
|
| chip_sw_aes_sideload |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
927.590s |
7881.294us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_test |
152.400s |
3068.597us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_escalations |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
347.360s |
5682.587us |
1 |
1 |
100.00
|
| chip_sw_all_escalation_resets |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
407.950s |
5156.613us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
562.760s |
5782.126us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
265.610s |
3817.510us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
342.770s |
4444.107us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_entropy |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_entropy |
189.380s |
3203.609us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_crashdump |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
909.870s |
9654.587us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_timeout |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_timeout |
298.870s |
4641.782us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_sleep_mode_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_alerts |
142.380s |
3010.267us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_sleep_mode_pings |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_pings |
0.000s |
0.000us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_clock_off |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
1151.240s |
8021.993us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_reset_toggle |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
996.600s |
8632.103us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_ok |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_ok |
828.930s |
8320.826us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_reverse_ping_in_deep_sleep |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_reverse_ping_in_deep_sleep |
7273.180s |
254637.369us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wakeup_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
230.270s |
3243.377us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_smoketest |
304.210s |
6423.074us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bark_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
230.270s |
3243.377us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
298.440s |
7078.653us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
298.440s |
7078.653us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_sleep_pause |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_sleep_wdog_sleep_pause |
293.000s |
7058.605us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_lc_escalate |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_lc_escalate |
297.390s |
5627.120us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_idle_trans |
4 |
4 |
100.00 |
|
chip_sw_otbn_randomness |
590.280s |
6267.543us |
1 |
1 |
100.00
|
|
chip_sw_aes_idle |
105.710s |
2353.535us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_idle |
205.910s |
3113.098us |
1 |
1 |
100.00
|
|
chip_sw_kmac_idle |
146.760s |
2788.896us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_trans |
4 |
4 |
100.00 |
|
chip_sw_clkmgr_off_aes_trans |
239.010s |
4492.519us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_hmac_trans |
340.650s |
4405.859us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_kmac_trans |
216.040s |
4158.017us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_otbn_trans |
331.340s |
5516.112us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_peri |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_off_peri |
687.690s |
10392.043us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_div |
7 |
7 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
341.070s |
3818.814us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
383.360s |
4870.454us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
352.460s |
4557.056us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
375.620s |
5614.895us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
359.490s |
4020.298us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
357.340s |
4275.483us |
1 |
1 |
100.00
|
|
chip_sw_ast_clk_outputs |
548.140s |
8156.382us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_lc |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_lc |
450.040s |
9979.859us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_sw |
2 |
2 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
352.460s |
4557.056us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
375.620s |
5614.895us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
366.700s |
3924.644us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
530.040s |
5021.969us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3478.680s |
18605.294us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
165.720s |
2789.186us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
528.750s |
6389.857us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
127.050s |
3035.038us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
678.550s |
6999.745us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
146.660s |
2837.286us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
298.670s |
4049.924us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
124.960s |
2714.311us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_extended_range |
11 |
11 |
100.00 |
|
chip_sw_clkmgr_jitter_reduced_freq |
135.740s |
2789.184us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq |
337.560s |
4196.104us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en_reduced_freq |
589.770s |
6993.580us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq |
3038.590s |
24857.807us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en_reduced_freq |
138.650s |
2592.621us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en_reduced_freq |
141.940s |
3332.537us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq |
1078.970s |
11106.357us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq |
144.780s |
2522.346us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq |
319.750s |
4632.798us |
1 |
1 |
100.00
|
|
chip_sw_flash_init_reduced_freq |
1151.080s |
25314.700us |
1 |
1 |
100.00
|
|
chip_sw_csrng_edn_concurrency_reduced_freq |
2332.620s |
21984.419us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_deep_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
548.140s |
8156.382us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_sleep_frequency |
336.280s |
4075.342us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_reset_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_reset_frequency |
252.870s |
3313.711us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
407.950s |
5156.613us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_alert_handler_clock_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
1151.240s |
8021.993us |
1 |
1 |
100.00
|
| chip_sw_csrng_edn_cmd |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
1076.720s |
8588.327us |
1 |
1 |
100.00
|
| chip_sw_csrng_fuse_en_sw_app_read |
0 |
1 |
0.00 |
|
chip_sw_csrng_fuse_en_sw_app_read_test |
120.110s |
2782.395us |
0 |
1 |
0.00
|
| chip_sw_csrng_lc_hw_debug_en |
1 |
1 |
100.00 |
|
chip_sw_csrng_lc_hw_debug_en_test |
358.880s |
7276.981us |
1 |
1 |
100.00
|
| chip_sw_csrng_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_csrng_kat_test |
149.260s |
2992.784us |
1 |
1 |
100.00
|
| chip_sw_edn_entropy_reqs |
3 |
3 |
100.00 |
|
chip_sw_csrng_edn_concurrency |
2120.410s |
13362.891us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_ast_rng_req |
112.670s |
2659.050us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs |
573.250s |
5913.513us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_ast_rng_req |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_ast_rng_req |
112.670s |
2659.050us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_csrng |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
1076.720s |
8588.327us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_kat_test |
96.050s |
2053.967us |
1 |
1 |
100.00
|
| chip_sw_flash_init |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1214.700s |
21424.782us |
1 |
1 |
100.00
|
| chip_sw_flash_host_access |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_access |
552.690s |
5272.639us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
530.040s |
5021.969us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_ops |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_ops |
325.140s |
4353.517us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en |
366.700s |
3924.644us |
1 |
1 |
100.00
|
| chip_sw_flash_rma_unlocked |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3520.680s |
42590.703us |
1 |
1 |
100.00
|
| chip_sw_flash_scramble |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1214.700s |
21424.782us |
1 |
1 |
100.00
|
| chip_sw_flash_idle_low_power |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_idle_low_power |
180.080s |
3539.189us |
1 |
1 |
100.00
|
| chip_sw_flash_keymgr_seeds |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1087.270s |
9768.251us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_creator_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
248.980s |
4067.210us |
1 |
1 |
100.00
|
| chip_sw_flash_creator_seed_wipe_on_rma |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3520.680s |
42590.703us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_owner_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
248.980s |
4067.210us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
248.980s |
4067.210us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_wr_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
248.980s |
4067.210us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_seed_hw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
248.980s |
4067.210us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_escalate_en |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
407.950s |
5156.613us |
1 |
1 |
100.00
|
| chip_sw_flash_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
41.580s |
2856.600us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_clock_freqs |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_clock_freqs |
505.330s |
4660.738us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
349.390s |
5450.458us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_write_clear |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
349.390s |
5450.458us |
1 |
1 |
100.00
|
| chip_sw_hmac_enc |
2 |
2 |
100.00 |
|
chip_sw_hmac_enc |
172.910s |
2518.693us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
127.050s |
3035.038us |
1 |
1 |
100.00
|
| chip_sw_hmac_idle |
1 |
1 |
100.00 |
|
chip_sw_hmac_enc_idle |
205.910s |
3113.098us |
1 |
1 |
100.00
|
| chip_sw_hmac_all_configurations |
1 |
1 |
100.00 |
|
chip_sw_hmac_oneshot |
1238.910s |
10540.472us |
1 |
1 |
100.00
|
| chip_sw_hmac_multistream_mode |
1 |
1 |
100.00 |
|
chip_sw_hmac_multistream |
713.730s |
5353.800us |
1 |
1 |
100.00
|
| chip_sw_i2c_host_tx_rx |
3 |
3 |
100.00 |
|
chip_sw_i2c_host_tx_rx |
326.270s |
4292.085us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx1 |
389.380s |
5096.701us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx2 |
362.910s |
4601.332us |
1 |
1 |
100.00
|
| chip_sw_i2c_device_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_i2c_device_tx_rx |
244.890s |
3719.316us |
1 |
1 |
100.00
|
| chip_sw_keymgr_key_derivation |
2 |
2 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1087.270s |
9768.251us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
678.550s |
6999.745us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_kmac |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_kmac |
1488.470s |
12124.684us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_aes |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
927.590s |
7881.294us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_otbn |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_otbn |
2551.300s |
13984.146us |
1 |
1 |
100.00
|
| chip_sw_kmac_enc |
3 |
3 |
100.00 |
|
chip_sw_kmac_mode_cshake |
170.170s |
3217.363us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac |
162.700s |
3060.244us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
146.660s |
2837.286us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_keymgr |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1087.270s |
9768.251us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_lc |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
263.030s |
5902.477us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_rom |
1 |
1 |
100.00 |
|
chip_sw_kmac_app_rom |
133.710s |
2930.128us |
1 |
1 |
100.00
|
| chip_sw_kmac_entropy |
1 |
1 |
100.00 |
|
chip_sw_kmac_entropy |
1696.060s |
11246.729us |
1 |
1 |
100.00
|
| chip_sw_kmac_idle |
1 |
1 |
100.00 |
|
chip_sw_kmac_idle |
146.760s |
2788.896us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_alert_handler_escalation |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
347.360s |
5682.587us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_jtag_access |
3 |
3 |
100.00 |
|
chip_tap_straps_dev |
87.580s |
2858.778us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
439.390s |
7515.906us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
106.620s |
3140.242us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_otp_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
128.760s |
2463.239us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
263.030s |
5902.477us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_transitions |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
263.030s |
5902.477us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_kmac_req |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
263.030s |
5902.477us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_key_div |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation_prod |
1588.750s |
11954.125us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_broadcast |
20 |
22 |
90.91 |
|
chip_prim_tl_access |
41.580s |
2856.600us |
1 |
1 |
100.00
|
|
chip_rv_dm_lc_disabled |
129.320s |
6626.300us |
0 |
1 |
0.00
|
|
chip_sw_flash_ctrl_lc_rw_en |
248.980s |
4067.210us |
1 |
1 |
100.00
|
|
chip_sw_flash_rma_unlocked |
3520.680s |
42590.703us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
164.510s |
2792.478us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
438.770s |
6674.335us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
546.680s |
7195.903us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
425.590s |
5484.301us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
263.030s |
5902.477us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1087.270s |
9768.251us |
1 |
1 |
100.00
|
|
chip_sw_rom_ctrl_integrity_check |
356.130s |
9972.776us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_execution_main |
342.640s |
6730.122us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_lc |
450.040s |
9979.859us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
341.070s |
3818.814us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
383.360s |
4870.454us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
352.460s |
4557.056us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
375.620s |
5614.895us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
359.490s |
4020.298us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
357.340s |
4275.483us |
1 |
1 |
100.00
|
|
chip_tap_straps_dev |
87.580s |
2858.778us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
439.390s |
7515.906us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
106.620s |
3140.242us |
1 |
1 |
100.00
|
| chip_lc_scrap |
4 |
4 |
100.00 |
|
chip_sw_lc_ctrl_rma_to_scrap |
124.910s |
3105.107us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_raw_to_scrap |
76.310s |
2690.461us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_test_locked0_to_scrap |
103.000s |
3790.871us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_rand_to_scrap |
146.780s |
3481.329us |
1 |
1 |
100.00
|
| chip_lc_test_locked |
1 |
2 |
50.00 |
|
chip_rv_dm_lc_disabled |
129.320s |
6626.300us |
0 |
1 |
0.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1208.390s |
28072.539us |
1 |
1 |
100.00
|
| chip_sw_lc_walkthrough |
5 |
5 |
100.00 |
|
chip_sw_lc_walkthrough_dev |
3858.560s |
50385.356us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prod |
3835.720s |
50151.545us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prodend |
541.470s |
8739.503us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_rma |
3787.020s |
46657.852us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1208.390s |
28072.539us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_volatile_raw_unlock |
3 |
3 |
100.00 |
|
chip_sw_lc_ctrl_volatile_raw_unlock |
65.370s |
2142.127us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz |
58.670s |
1944.364us |
1 |
1 |
100.00
|
|
rom_volatile_raw_unlock |
67.070s |
2461.132us |
1 |
1 |
100.00
|
| chip_sw_otbn_op |
2 |
2 |
100.00 |
|
chip_sw_otbn_ecdsa_op_irq |
3416.760s |
17217.703us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3478.680s |
18605.294us |
1 |
1 |
100.00
|
| chip_sw_otbn_rnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
590.280s |
6267.543us |
1 |
1 |
100.00
|
| chip_sw_otbn_urnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
590.280s |
6267.543us |
1 |
1 |
100.00
|
| chip_sw_otbn_idle |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
590.280s |
6267.543us |
1 |
1 |
100.00
|
| chip_sw_otbn_mem_scramble |
1 |
1 |
100.00 |
|
chip_sw_otbn_mem_scramble |
290.480s |
3553.956us |
1 |
1 |
100.00
|
| chip_otp_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
263.030s |
5902.477us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_keys |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1214.700s |
21424.782us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
290.480s |
3553.956us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1087.270s |
9768.251us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
291.150s |
4517.923us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
165.570s |
3393.594us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_entropy |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1214.700s |
21424.782us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
290.480s |
3553.956us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1087.270s |
9768.251us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
291.150s |
4517.923us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
165.570s |
3393.594us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
263.030s |
5902.477us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program_error |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_program_error |
228.640s |
5623.208us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
128.760s |
2463.239us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_lc_signals |
5 |
6 |
83.33 |
|
chip_prim_tl_access |
41.580s |
2856.600us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
164.510s |
2792.478us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
438.770s |
6674.335us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
546.680s |
7195.903us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
425.590s |
5484.301us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
263.030s |
5902.477us |
1 |
1 |
100.00
|
| chip_sw_otp_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
41.580s |
2856.600us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_dai_lock |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_dai_lock |
830.380s |
7626.829us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_external_full_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
268.980s |
7307.897us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_wake_ups |
1139.240s |
25947.102us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_normal_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_wake_ups |
314.250s |
7822.206us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_por_reset |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_deep_sleep_por_reset |
262.870s |
6563.462us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_por_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_por_reset |
407.980s |
7937.310us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1246.610s |
25214.534us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
0 |
2 |
0.00 |
|
chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
425.330s |
9902.712us |
0 |
1 |
0.00
|
|
chip_sw_aon_timer_wdog_bite_reset |
298.440s |
7078.653us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
772.180s |
11533.516us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_wdog_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_wdog_reset |
269.670s |
3789.421us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_aon_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
268.980s |
7307.897us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_main_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_main_power_glitch_reset |
206.950s |
4425.245us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_power_glitch_reset |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_random_sleep_power_glitch_reset |
422.530s |
10733.028us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
222.620s |
7412.518us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_power_glitch_reset |
286.950s |
4767.506us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_reset_reqs |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
242.090s |
5614.710us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
728.880s |
8366.350us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_all_reset_reqs |
825.670s |
11160.576us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_b2b_sleep_reset_req |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_b2b_sleep_reset_req |
1791.930s |
32450.562us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_disabled |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_disabled |
119.460s |
2886.685us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
407.950s |
5156.613us |
1 |
1 |
100.00
|
| chip_sw_rom_access |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
356.130s |
9972.776us |
1 |
1 |
100.00
|
| chip_sw_rom_ctrl_integrity_check |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
356.130s |
9972.776us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_non_sys_reset_info |
3 |
4 |
75.00 |
|
chip_sw_pwrmgr_all_reset_reqs |
825.670s |
11160.576us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
242.090s |
5614.710us |
0 |
1 |
0.00
|
|
chip_sw_pwrmgr_wdog_reset |
269.670s |
3789.421us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
304.210s |
6423.074us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sys_reset_info |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
223.610s |
4229.819us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_cpu_info |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
173.850s |
4429.452us |
0 |
1 |
0.00
|
| chip_sw_rstmgr_sw_req_reset |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_req |
284.940s |
4974.683us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_info |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
909.870s |
9654.587us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sw_rst |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_rst |
166.120s |
2868.699us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
407.950s |
5156.613us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_handler_reset_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
996.600s |
8632.103us |
1 |
1 |
100.00
|
| chip_sw_nmi_irq |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_nmi_irq |
493.820s |
4933.848us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_rnd |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_rnd |
479.190s |
4970.679us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_address_translation |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_address_translation |
148.670s |
2466.798us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_icache_scrambled_access |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_icache_invalidate |
165.570s |
3393.594us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_fault_dump |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
173.850s |
4429.452us |
0 |
1 |
0.00
|
| chip_sw_rv_core_ibex_double_fault |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
173.850s |
4429.452us |
0 |
1 |
0.00
|
| chip_jtag_csr_rw |
1 |
1 |
100.00 |
|
chip_jtag_csr_rw |
739.540s |
10598.760us |
1 |
1 |
100.00
|
| chip_jtag_mem_access |
1 |
1 |
100.00 |
|
chip_jtag_mem_access |
913.310s |
13488.929us |
1 |
1 |
100.00
|
| chip_rv_dm_ndm_reset_req |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
223.610s |
4229.819us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
267.620s |
4481.660us |
1 |
1 |
100.00
|
| chip_rv_dm_access_after_wakeup |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_access_after_wakeup |
299.180s |
5555.430us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_jtag_tap_sel |
1 |
1 |
100.00 |
|
chip_tap_straps_rma |
439.390s |
7515.906us |
1 |
1 |
100.00
|
| chip_rv_dm_lc_disabled |
0 |
1 |
0.00 |
|
chip_rv_dm_lc_disabled |
129.320s |
6626.300us |
0 |
1 |
0.00
|
| chip_sw_plic_all_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
562.760s |
5782.126us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
265.610s |
3817.510us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
342.770s |
4444.107us |
1 |
1 |
100.00
|
| chip_sw_plic_sw_irq |
1 |
1 |
100.00 |
|
chip_sw_plic_sw_irq |
173.640s |
3343.756us |
1 |
1 |
100.00
|
| chip_sw_timer |
1 |
1 |
100.00 |
|
chip_sw_rv_timer_irq |
174.780s |
3287.428us |
1 |
1 |
100.00
|
| chip_sw_spi_device_flash_mode |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2565.320s |
15236.351us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through |
1 |
1 |
100.00 |
|
chip_sw_spi_device_pass_through |
364.270s |
6183.533us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through_collision |
0 |
1 |
0.00 |
|
chip_sw_spi_device_pass_through_collision |
174.930s |
3225.147us |
0 |
1 |
0.00
|
| chip_sw_spi_device_tpm |
1 |
1 |
100.00 |
|
chip_sw_spi_device_tpm |
234.010s |
3078.030us |
1 |
1 |
100.00
|
| chip_sw_spi_host_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_spi_host_tx_rx |
165.280s |
2371.543us |
1 |
1 |
100.00
|
| chip_sw_sram_scrambled_access |
2 |
2 |
100.00 |
|
chip_sw_sram_ctrl_scrambled_access |
291.150s |
4517.923us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
298.670s |
4049.924us |
1 |
1 |
100.00
|
| chip_sw_sleep_sram_ret_contents |
2 |
2 |
100.00 |
|
chip_sw_sleep_sram_ret_contents_no_scramble |
460.930s |
8685.801us |
1 |
1 |
100.00
|
|
chip_sw_sleep_sram_ret_contents_scramble |
372.980s |
7946.642us |
1 |
1 |
100.00
|
| chip_sw_sram_execution |
1 |
1 |
100.00 |
|
chip_sw_sram_ctrl_execution_main |
342.640s |
6730.122us |
1 |
1 |
100.00
|
| chip_sw_sram_lc_escalation |
2 |
2 |
100.00 |
|
chip_sw_all_escalation_resets |
407.950s |
5156.613us |
1 |
1 |
100.00
|
|
chip_sw_data_integrity_escalation |
401.890s |
5955.697us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
728.880s |
8366.350us |
1 |
1 |
100.00
|
|
chip_sw_sysrst_ctrl_reset |
1285.570s |
25028.918us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_inputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_inputs |
137.640s |
2986.558us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_outputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_outputs |
198.060s |
3478.578us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_in_irq |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_in_irq |
373.990s |
4562.105us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
1285.570s |
25028.918us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_reset |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
1285.570s |
25028.918us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_ec_rst_l |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
2458.350s |
20715.952us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_flash_wp_l |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
2458.350s |
20715.952us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_ulp_z3_wakeup |
1 |
2 |
50.00 |
|
chip_sw_sysrst_ctrl_ulp_z3_wakeup |
267.610s |
5451.780us |
1 |
1 |
100.00
|
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2985.480s |
34563.124us |
0 |
1 |
0.00
|
| chip_sw_usbdev_vbus |
1 |
1 |
100.00 |
|
chip_sw_usbdev_vbus |
185.840s |
2775.734us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pullup |
134.320s |
3376.367us |
1 |
1 |
100.00
|
| chip_sw_usbdev_aon_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_aon_pullup |
254.870s |
3098.557us |
1 |
1 |
100.00
|
| chip_sw_usbdev_setup_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_setuprx |
333.690s |
4022.361us |
1 |
1 |
100.00
|
| chip_sw_usbdev_config_host |
1 |
1 |
100.00 |
|
chip_sw_usbdev_config_host |
1061.560s |
7979.612us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pincfg |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pincfg |
4830.860s |
31377.337us |
1 |
1 |
100.00
|
| chip_sw_usbdev_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_dpi |
1908.750s |
11612.733us |
1 |
1 |
100.00
|
| chip_sw_usbdev_toggle_restore |
1 |
1 |
100.00 |
|
chip_sw_usbdev_toggle_restore |
173.250s |
3141.910us |
1 |
1 |
100.00
|