| host_error_intr |
0 |
1 |
0.00 |
|
i2c_host_error_intr |
0.920s |
30.286us |
0 |
1 |
0.00
|
| host_stress_all |
0 |
1 |
0.00 |
|
i2c_host_stress_all |
6.950s |
2683.060us |
0 |
1 |
0.00
|
| host_maxperf |
1 |
1 |
100.00 |
|
i2c_host_perf |
8.530s |
2920.988us |
1 |
1 |
100.00
|
| host_override |
1 |
1 |
100.00 |
|
i2c_host_override |
0.690s |
73.679us |
1 |
1 |
100.00
|
| host_fifo_watermark |
1 |
1 |
100.00 |
|
i2c_host_fifo_watermark |
103.840s |
2784.075us |
1 |
1 |
100.00
|
| host_fifo_overflow |
1 |
1 |
100.00 |
|
i2c_host_fifo_overflow |
112.610s |
2414.323us |
1 |
1 |
100.00
|
| host_fifo_reset |
3 |
3 |
100.00 |
|
i2c_host_fifo_reset_fmt |
0.880s |
50.575us |
1 |
1 |
100.00
|
|
i2c_host_fifo_fmt_empty |
4.720s |
1200.565us |
1 |
1 |
100.00
|
|
i2c_host_fifo_reset_rx |
5.140s |
142.821us |
1 |
1 |
100.00
|
| host_fifo_full |
1 |
1 |
100.00 |
|
i2c_host_fifo_full |
127.990s |
4770.440us |
1 |
1 |
100.00
|
| host_timeout |
1 |
1 |
100.00 |
|
i2c_host_stretch_timeout |
21.250s |
717.162us |
1 |
1 |
100.00
|
| i2c_host_mode_toggle |
0 |
1 |
0.00 |
|
i2c_host_mode_toggle |
0.700s |
94.285us |
0 |
1 |
0.00
|
| target_glitch |
0 |
1 |
0.00 |
|
i2c_target_glitch |
2.390s |
2310.888us |
0 |
1 |
0.00
|
| target_stress_all |
1 |
1 |
100.00 |
|
i2c_target_stress_all |
19.010s |
63273.678us |
1 |
1 |
100.00
|
| target_maxperf |
1 |
1 |
100.00 |
|
i2c_target_perf |
3.880s |
2045.619us |
1 |
1 |
100.00
|
| target_fifo_empty |
2 |
2 |
100.00 |
|
i2c_target_stress_rd |
8.000s |
731.009us |
1 |
1 |
100.00
|
|
i2c_target_intr_smoke |
3.110s |
9132.759us |
1 |
1 |
100.00
|
| target_fifo_reset |
2 |
2 |
100.00 |
|
i2c_target_fifo_reset_acq |
0.690s |
225.616us |
1 |
1 |
100.00
|
|
i2c_target_fifo_reset_tx |
0.840s |
265.835us |
1 |
1 |
100.00
|
| target_fifo_full |
3 |
3 |
100.00 |
|
i2c_target_stress_wr |
523.200s |
48006.281us |
1 |
1 |
100.00
|
|
i2c_target_stress_rd |
8.000s |
731.009us |
1 |
1 |
100.00
|
|
i2c_target_intr_stress_wr |
55.500s |
7563.497us |
1 |
1 |
100.00
|
| target_timeout |
1 |
1 |
100.00 |
|
i2c_target_timeout |
4.220s |
4824.426us |
1 |
1 |
100.00
|
| target_clock_stretch |
1 |
1 |
100.00 |
|
i2c_target_stretch |
8.790s |
2554.307us |
1 |
1 |
100.00
|
| bad_address |
1 |
1 |
100.00 |
|
i2c_target_bad_addr |
3.990s |
1200.596us |
1 |
1 |
100.00
|
| target_mode_glitch |
1 |
1 |
100.00 |
|
i2c_target_hrst |
1.740s |
562.414us |
1 |
1 |
100.00
|
| target_fifo_watermark |
2 |
2 |
100.00 |
|
i2c_target_fifo_watermarks_acq |
2.040s |
1523.621us |
1 |
1 |
100.00
|
|
i2c_target_fifo_watermarks_tx |
0.780s |
75.463us |
1 |
1 |
100.00
|
| host_mode_config_perf |
2 |
2 |
100.00 |
|
i2c_host_perf |
8.530s |
2920.988us |
1 |
1 |
100.00
|
|
i2c_host_perf_precise |
1.020s |
198.938us |
1 |
1 |
100.00
|
| host_mode_clock_stretching |
1 |
1 |
100.00 |
|
i2c_host_stretch_timeout |
21.250s |
717.162us |
1 |
1 |
100.00
|
| target_mode_tx_stretch_ctrl |
1 |
1 |
100.00 |
|
i2c_target_tx_stretch_ctrl |
2.150s |
197.118us |
1 |
1 |
100.00
|
| target_mode_nack_generation |
2 |
3 |
66.67 |
|
i2c_target_nack_acqfull |
1.990s |
476.868us |
1 |
1 |
100.00
|
|
i2c_target_nack_acqfull_addr |
2.120s |
539.678us |
1 |
1 |
100.00
|
|
i2c_target_nack_txstretch |
1.060s |
262.056us |
0 |
1 |
0.00
|
| host_mode_halt_on_nak |
1 |
1 |
100.00 |
|
i2c_host_may_nack |
9.720s |
377.721us |
1 |
1 |
100.00
|
| target_mode_smbus_maxlen |
1 |
1 |
100.00 |
|
i2c_target_smbus_maxlen |
1.650s |
3924.801us |
1 |
1 |
100.00
|
| alert_test |
1 |
1 |
100.00 |
|
i2c_alert_test |
0.610s |
29.595us |
1 |
1 |
100.00
|
| intr_test |
1 |
1 |
100.00 |
|
i2c_intr_test |
0.680s |
16.666us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
1 |
1 |
100.00 |
|
i2c_tl_errors |
1.780s |
49.958us |
1 |
1 |
100.00
|
| tl_d_illegal_access |
1 |
1 |
100.00 |
|
i2c_tl_errors |
1.780s |
49.958us |
1 |
1 |
100.00
|
| tl_d_outstanding_access |
4 |
4 |
100.00 |
|
i2c_csr_hw_reset |
0.810s |
66.798us |
1 |
1 |
100.00
|
|
i2c_csr_rw |
0.730s |
57.472us |
1 |
1 |
100.00
|
|
i2c_csr_aliasing |
1.390s |
94.661us |
1 |
1 |
100.00
|
|
i2c_same_csr_outstanding |
0.790s |
114.281us |
1 |
1 |
100.00
|
| tl_d_partial_access |
4 |
4 |
100.00 |
|
i2c_csr_hw_reset |
0.810s |
66.798us |
1 |
1 |
100.00
|
|
i2c_csr_rw |
0.730s |
57.472us |
1 |
1 |
100.00
|
|
i2c_csr_aliasing |
1.390s |
94.661us |
1 |
1 |
100.00
|
|
i2c_same_csr_outstanding |
0.790s |
114.281us |
1 |
1 |
100.00
|