Simulation Results: otp_ctrl

 
26/11/2025 18:41:30 sha: b4301fc json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 81.79 %
  • code
  • 78.31 %
  • assert
  • 94.04 %
  • func
  • 73.02 %
  • line
  • 88.22 %
  • branch
  • 83.31 %
  • cond
  • 89.93 %
  • toggle
  • 86.53 %
  • FSM
  • 43.58 %
Validation stages
V1
100.00%
V2
96.00%
V2S
98.21%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 1.580s 64.464us 1 1 100.00
smoke 1 1 100.00
otp_ctrl_smoke 8.720s 6991.195us 1 1 100.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 2.490s 135.022us 1 1 100.00
csr_rw 1 1 100.00
otp_ctrl_csr_rw 1.790s 48.607us 1 1 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 2.880s 287.362us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 2.620s 98.715us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otp_ctrl_csr_mem_rw_with_rand_reset 2.280s 105.590us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otp_ctrl_csr_rw 1.790s 48.607us 1 1 100.00
otp_ctrl_csr_aliasing 2.620s 98.715us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 1.520s 71.880us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 1.760s 60.613us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 1 1 100.00
otp_ctrl_partition_walk 17.090s 5020.519us 1 1 100.00
init_fail 1 1 100.00
otp_ctrl_init_fail 4.860s 154.169us 1 1 100.00
partition_check 1 2 50.00
otp_ctrl_background_chks 11.600s 9474.136us 1 1 100.00
otp_ctrl_check_fail 14.840s 1032.398us 0 1 0.00
regwen_during_otp_init 1 1 100.00
otp_ctrl_regwen 3.030s 2546.753us 1 1 100.00
partition_lock 1 1 100.00
otp_ctrl_dai_lock 4.520s 125.917us 1 1 100.00
interface_key_check 1 1 100.00
otp_ctrl_parallel_key_req 8.830s 638.061us 1 1 100.00
lc_interactions 2 2 100.00
otp_ctrl_parallel_lc_req 12.920s 602.034us 1 1 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
otp_dai_errors 1 1 100.00
otp_ctrl_dai_errs 13.200s 1944.676us 1 1 100.00
otp_macro_errors 1 1 100.00
otp_ctrl_macro_errs 3.630s 544.383us 1 1 100.00
test_access 1 1 100.00
otp_ctrl_test_access 18.440s 19767.650us 1 1 100.00
stress_all 1 1 100.00
otp_ctrl_stress_all 175.190s 126806.409us 1 1 100.00
intr_test 1 1 100.00
otp_ctrl_intr_test 1.880s 128.230us 1 1 100.00
alert_test 1 1 100.00
otp_ctrl_alert_test 1.960s 89.254us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otp_ctrl_tl_errors 4.610s 169.019us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otp_ctrl_tl_errors 4.610s 169.019us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otp_ctrl_csr_hw_reset 2.490s 135.022us 1 1 100.00
otp_ctrl_csr_rw 1.790s 48.607us 1 1 100.00
otp_ctrl_csr_aliasing 2.620s 98.715us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.750s 103.055us 1 1 100.00
tl_d_partial_access 4 4 100.00
otp_ctrl_csr_hw_reset 2.490s 135.022us 1 1 100.00
otp_ctrl_csr_rw 1.790s 48.607us 1 1 100.00
otp_ctrl_csr_aliasing 2.620s 98.715us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.750s 103.055us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
tl_intg_err 2 2 100.00
otp_ctrl_tl_intg_err 13.520s 1269.934us 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
prim_count_check 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
prim_fsm_check 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otp_ctrl_tl_intg_err 13.520s 1269.934us 1 1 100.00
sec_cm_secret_mem_scramble 1 1 100.00
otp_ctrl_smoke 8.720s 6991.195us 1 1 100.00
sec_cm_part_mem_digest 1 1 100.00
otp_ctrl_smoke 8.720s 6991.195us 1 1 100.00
sec_cm_dai_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_kdi_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_lci_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_part_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_scrmbl_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_timer_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_dai_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_kdi_seed_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_kdi_entropy_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_lci_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_part_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_scrmbl_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_timer_integ_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_timer_cnsty_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_timer_lfsr_redun 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_dai_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_lci_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
sec_cm_kdi_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
sec_cm_part_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
otp_ctrl_macro_errs 3.630s 544.383us 1 1 100.00
sec_cm_scrmbl_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
sec_cm_timer_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_dai_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_lci_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
sec_cm_kdi_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
sec_cm_part_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
otp_ctrl_macro_errs 3.630s 544.383us 1 1 100.00
sec_cm_scrmbl_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
sec_cm_timer_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 4.520s 879.344us 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_part_data_reg_integrity 1 1 100.00
otp_ctrl_init_fail 4.860s 154.169us 1 1 100.00
sec_cm_part_data_reg_bkgn_chk 0 1 0.00
otp_ctrl_check_fail 14.840s 1032.398us 0 1 0.00
sec_cm_part_mem_regren 1 1 100.00
otp_ctrl_dai_lock 4.520s 125.917us 1 1 100.00
sec_cm_part_mem_sw_unreadable 1 1 100.00
otp_ctrl_dai_lock 4.520s 125.917us 1 1 100.00
sec_cm_part_mem_sw_unwritable 1 1 100.00
otp_ctrl_dai_lock 4.520s 125.917us 1 1 100.00
sec_cm_lc_part_mem_sw_noaccess 1 1 100.00
otp_ctrl_dai_lock 4.520s 125.917us 1 1 100.00
sec_cm_access_ctrl_mubi 1 1 100.00
otp_ctrl_dai_lock 4.520s 125.917us 1 1 100.00
sec_cm_token_valid_ctrl_mubi 1 1 100.00
otp_ctrl_smoke 8.720s 6991.195us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
otp_ctrl_dai_lock 4.520s 125.917us 1 1 100.00
sec_cm_test_bus_lc_gated 1 1 100.00
otp_ctrl_smoke 8.720s 6991.195us 1 1 100.00
sec_cm_test_tl_lc_gate_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 114.850s 39206.105us 1 1 100.00
sec_cm_direct_access_config_regwen 1 1 100.00
otp_ctrl_regwen 3.030s 2546.753us 1 1 100.00
sec_cm_check_trigger_config_regwen 1 1 100.00
otp_ctrl_smoke 8.720s 6991.195us 1 1 100.00
sec_cm_check_config_regwen 1 1 100.00
otp_ctrl_smoke 8.720s 6991.195us 1 1 100.00
sec_cm_macro_mem_integrity 1 1 100.00
otp_ctrl_macro_errs 3.630s 544.383us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 1 1 100.00
otp_ctrl_low_freq_read 11.300s 7548.696us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
otp_ctrl_stress_all_with_rand_reset 1.240s 52.693us 0 1 0.00