Simulation Results: spi_device

 
26/11/2025 18:41:30 sha: b4301fc json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 84.10 %
  • code
  • 94.03 %
  • assert
  • 94.27 %
  • func
  • 63.99 %
  • line
  • 99.11 %
  • branch
  • 98.32 %
  • cond
  • 95.81 %
  • toggle
  • 87.57 %
  • FSM
  • 89.36 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_device_flash_and_tpm 225.310s 40776.803us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_device_csr_hw_reset 0.880s 86.874us 1 1 100.00
csr_rw 1 1 100.00
spi_device_csr_rw 1.360s 39.980us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_device_csr_bit_bash 25.840s 2440.451us 1 1 100.00
csr_aliasing 1 1 100.00
spi_device_csr_aliasing 16.130s 1092.516us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_device_csr_mem_rw_with_rand_reset 2.660s 45.031us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_device_csr_rw 1.360s 39.980us 1 1 100.00
spi_device_csr_aliasing 16.130s 1092.516us 1 1 100.00
mem_walk 1 1 100.00
spi_device_mem_walk 0.860s 17.937us 1 1 100.00
mem_partial_access 1 1 100.00
spi_device_mem_partial_access 1.330s 57.356us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
csb_read 1 1 100.00
spi_device_csb_read 0.780s 47.664us 1 1 100.00
mem_parity 1 1 100.00
spi_device_mem_parity 0.910s 45.378us 1 1 100.00
mem_cfg 1 1 100.00
spi_device_ram_cfg 0.920s 18.318us 1 1 100.00
tpm_read 1 1 100.00
spi_device_tpm_rw 1.280s 80.401us 1 1 100.00
tpm_write 1 1 100.00
spi_device_tpm_rw 1.280s 80.401us 1 1 100.00
tpm_hw_reg 2 2 100.00
spi_device_tpm_read_hw_reg 3.020s 1618.290us 1 1 100.00
spi_device_tpm_sts_read 1.280s 111.007us 1 1 100.00
tpm_fully_random_case 1 1 100.00
spi_device_tpm_all 2.280s 347.131us 1 1 100.00
pass_cmd_filtering 2 2 100.00
spi_device_pass_cmd_filtering 5.540s 27227.622us 1 1 100.00
spi_device_flash_all 0.830s 21.931us 1 1 100.00
pass_addr_translation 2 2 100.00
spi_device_pass_addr_payload_swap 11.700s 6846.108us 1 1 100.00
spi_device_flash_all 0.830s 21.931us 1 1 100.00
pass_payload_translation 2 2 100.00
spi_device_pass_addr_payload_swap 11.700s 6846.108us 1 1 100.00
spi_device_flash_all 0.830s 21.931us 1 1 100.00
cmd_info_slots 1 1 100.00
spi_device_flash_all 0.830s 21.931us 1 1 100.00
cmd_read_status 2 2 100.00
spi_device_intercept 5.830s 730.308us 1 1 100.00
spi_device_flash_all 0.830s 21.931us 1 1 100.00
cmd_read_jedec 2 2 100.00
spi_device_intercept 5.830s 730.308us 1 1 100.00
spi_device_flash_all 0.830s 21.931us 1 1 100.00
cmd_read_sfdp 2 2 100.00
spi_device_intercept 5.830s 730.308us 1 1 100.00
spi_device_flash_all 0.830s 21.931us 1 1 100.00
cmd_fast_read 2 2 100.00
spi_device_intercept 5.830s 730.308us 1 1 100.00
spi_device_flash_all 0.830s 21.931us 1 1 100.00
cmd_read_pipeline 2 2 100.00
spi_device_intercept 5.830s 730.308us 1 1 100.00
spi_device_flash_all 0.830s 21.931us 1 1 100.00
flash_cmd_upload 1 1 100.00
spi_device_upload 12.000s 32604.755us 1 1 100.00
mailbox_command 1 1 100.00
spi_device_mailbox 26.180s 11948.461us 1 1 100.00
mailbox_cross_outside_command 1 1 100.00
spi_device_mailbox 26.180s 11948.461us 1 1 100.00
mailbox_cross_inside_command 1 1 100.00
spi_device_mailbox 26.180s 11948.461us 1 1 100.00
cmd_read_buffer 2 2 100.00
spi_device_flash_mode 4.660s 206.844us 1 1 100.00
spi_device_read_buffer_direct 9.700s 5732.237us 1 1 100.00
cmd_dummy_cycle 2 2 100.00
spi_device_mailbox 26.180s 11948.461us 1 1 100.00
spi_device_flash_all 0.830s 21.931us 1 1 100.00
quad_spi 1 1 100.00
spi_device_flash_all 0.830s 21.931us 1 1 100.00
dual_spi 1 1 100.00
spi_device_flash_all 0.830s 21.931us 1 1 100.00
4b_3b_feature 1 1 100.00
spi_device_cfg_cmd 3.150s 193.253us 1 1 100.00
write_enable_disable 1 1 100.00
spi_device_cfg_cmd 3.150s 193.253us 1 1 100.00
TPM_with_flash_or_passthrough_mode 1 1 100.00
spi_device_flash_and_tpm 225.310s 40776.803us 1 1 100.00
tpm_and_flash_trans_with_min_inactive_time 1 1 100.00
spi_device_flash_and_tpm_min_idle 56.490s 10812.930us 1 1 100.00
stress_all 1 1 100.00
spi_device_stress_all 52.160s 4141.353us 1 1 100.00
alert_test 1 1 100.00
spi_device_alert_test 0.870s 37.565us 1 1 100.00
intr_test 1 1 100.00
spi_device_intr_test 0.970s 35.480us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_device_tl_errors 1.880s 100.551us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_device_tl_errors 1.880s 100.551us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_device_csr_hw_reset 0.880s 86.874us 1 1 100.00
spi_device_csr_rw 1.360s 39.980us 1 1 100.00
spi_device_csr_aliasing 16.130s 1092.516us 1 1 100.00
spi_device_same_csr_outstanding 1.970s 52.691us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_device_csr_hw_reset 0.880s 86.874us 1 1 100.00
spi_device_csr_rw 1.360s 39.980us 1 1 100.00
spi_device_csr_aliasing 16.130s 1092.516us 1 1 100.00
spi_device_same_csr_outstanding 1.970s 52.691us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_device_tl_intg_err 13.930s 1211.358us 1 1 100.00
spi_device_sec_cm 1.050s 180.876us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_device_tl_intg_err 13.930s 1211.358us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
spi_device_flash_mode_ignore_cmds 203.780s 43355.626us 1 1 100.00