| chip_pin_mux |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
173.800s |
5175.692us |
1 |
1 |
100.00
|
| chip_padctrl_attributes |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
173.800s |
5175.692us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_mio_dio_val |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_mio_dio_val |
176.960s |
3729.633us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_wake |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_wake |
111.060s |
2622.790us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_retention |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_retention |
180.650s |
4171.776us |
1 |
1 |
100.00
|
| chip_sw_tap_strap_sampling |
4 |
4 |
100.00 |
|
chip_tap_straps_dev |
176.630s |
3807.216us |
1 |
1 |
100.00
|
|
chip_tap_straps_testunlock0 |
109.790s |
3243.768us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
286.830s |
6211.180us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
90.490s |
2496.928us |
1 |
1 |
100.00
|
| chip_sw_pattgen_ios |
1 |
1 |
100.00 |
|
chip_sw_pattgen_ios |
177.960s |
3297.607us |
1 |
1 |
100.00
|
| chip_sw_sleep_pwm_pulses |
1 |
1 |
100.00 |
|
chip_sw_sleep_pwm_pulses |
860.180s |
8748.441us |
1 |
1 |
100.00
|
| chip_sw_data_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
413.310s |
5799.464us |
1 |
1 |
100.00
|
| chip_sw_instruction_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
413.310s |
5799.464us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_outputs |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
584.110s |
7662.698us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_rst_inputs |
0 |
1 |
0.00 |
|
chip_sw_ast_clk_rst_inputs |
1748.220s |
18478.245us |
0 |
1 |
0.00
|
| chip_sw_ast_sys_clk_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
345.140s |
4194.756us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
568.140s |
5482.117us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3273.740s |
18242.138us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
136.440s |
2448.861us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
517.300s |
5728.297us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
158.490s |
2652.388us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1069.500s |
9329.774us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
202.810s |
3304.104us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
353.600s |
4530.950us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
171.460s |
3007.822us |
1 |
1 |
100.00
|
| chip_sw_ast_usb_clk_calib |
1 |
1 |
100.00 |
|
chip_sw_usb_ast_clk_calib |
210.350s |
3537.362us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_alerts |
2 |
2 |
100.00 |
|
chip_sw_sensor_ctrl_alert |
542.280s |
6076.653us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
229.480s |
4397.308us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_status |
1 |
1 |
100.00 |
|
chip_sw_sensor_ctrl_status |
115.720s |
2725.640us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
229.480s |
4397.308us |
1 |
1 |
100.00
|
| chip_sw_smoketest |
17 |
17 |
100.00 |
|
chip_sw_flash_scrambling_smoketest |
155.850s |
3167.199us |
1 |
1 |
100.00
|
|
chip_sw_aes_smoketest |
152.300s |
2969.321us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_smoketest |
157.900s |
2915.710us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_smoketest |
151.320s |
2434.848us |
1 |
1 |
100.00
|
|
chip_sw_csrng_smoketest |
159.110s |
2998.087us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_smoketest |
790.490s |
6483.915us |
1 |
1 |
100.00
|
|
chip_sw_gpio_smoketest |
183.490s |
2576.572us |
1 |
1 |
100.00
|
|
chip_sw_hmac_smoketest |
216.150s |
3016.641us |
1 |
1 |
100.00
|
|
chip_sw_kmac_smoketest |
176.150s |
3234.164us |
1 |
1 |
100.00
|
|
chip_sw_otbn_smoketest |
614.060s |
6512.173us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
246.400s |
5962.947us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_usbdev_smoketest |
282.070s |
6064.414us |
1 |
1 |
100.00
|
|
chip_sw_rv_plic_smoketest |
117.790s |
2618.749us |
1 |
1 |
100.00
|
|
chip_sw_rv_timer_smoketest |
132.780s |
2471.487us |
1 |
1 |
100.00
|
|
chip_sw_rstmgr_smoketest |
150.340s |
3060.652us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_smoketest |
112.070s |
3109.560us |
1 |
1 |
100.00
|
|
chip_sw_uart_smoketest |
135.040s |
3420.149us |
1 |
1 |
100.00
|
| chip_sw_otp_smoketest |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_smoketest |
100.380s |
2703.456us |
1 |
1 |
100.00
|
| chip_sw_rom_functests |
1 |
1 |
100.00 |
|
rom_keymgr_functest |
324.000s |
4540.094us |
1 |
1 |
100.00
|
| chip_sw_boot |
1 |
1 |
100.00 |
|
chip_sw_uart_tx_rx_bootstrap |
7910.670s |
61719.112us |
1 |
1 |
100.00
|
| chip_sw_secure_boot |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2557.640s |
14895.463us |
1 |
1 |
100.00
|
| chip_sw_rom_raw_unlock |
1 |
1 |
100.00 |
|
rom_raw_unlock |
152.210s |
6070.967us |
1 |
1 |
100.00
|
| chip_sw_power_idle_load |
0 |
1 |
0.00 |
|
chip_sw_power_idle_load |
193.180s |
3838.054us |
0 |
1 |
0.00
|
| chip_sw_power_sleep_load |
0 |
1 |
0.00 |
|
chip_sw_power_sleep_load |
210.900s |
3026.662us |
0 |
1 |
0.00
|
| chip_sw_exit_test_unlocked_bootstrap |
1 |
1 |
100.00 |
|
chip_sw_exit_test_unlocked_bootstrap |
6822.210s |
52838.873us |
1 |
1 |
100.00
|
| chip_sw_inject_scramble_seed |
1 |
1 |
100.00 |
|
chip_sw_inject_scramble_seed |
7038.150s |
57107.387us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
45.370s |
2925.518us |
0 |
1 |
0.00
|
| tl_d_illegal_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
45.370s |
2925.518us |
0 |
1 |
0.00
|
| tl_d_outstanding_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
5267.350s |
38237.660us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
2088.080s |
29206.836us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
165.960s |
5335.165us |
1 |
1 |
100.00
|
|
chip_csr_rw |
458.530s |
5939.576us |
1 |
1 |
100.00
|
| tl_d_partial_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
5267.350s |
38237.660us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
2088.080s |
29206.836us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
165.960s |
5335.165us |
1 |
1 |
100.00
|
|
chip_csr_rw |
458.530s |
5939.576us |
1 |
1 |
100.00
|
| xbar_base_random_sequence |
1 |
1 |
100.00 |
|
xbar_random |
6.200s |
68.786us |
1 |
1 |
100.00
|
| xbar_random_delay |
6 |
6 |
100.00 |
|
xbar_smoke_zero_delays |
4.500s |
44.941us |
1 |
1 |
100.00
|
|
xbar_smoke_large_delays |
59.960s |
9562.663us |
1 |
1 |
100.00
|
|
xbar_smoke_slow_rsp |
50.700s |
5034.501us |
1 |
1 |
100.00
|
|
xbar_random_zero_delays |
13.710s |
211.067us |
1 |
1 |
100.00
|
|
xbar_random_large_delays |
136.470s |
23108.954us |
1 |
1 |
100.00
|
|
xbar_random_slow_rsp |
149.400s |
17217.407us |
1 |
1 |
100.00
|
| xbar_unmapped_address |
2 |
2 |
100.00 |
|
xbar_unmapped_addr |
36.770s |
1453.598us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
6.190s |
173.748us |
1 |
1 |
100.00
|
| xbar_error_cases |
2 |
2 |
100.00 |
|
xbar_error_random |
21.990s |
558.637us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
6.190s |
173.748us |
1 |
1 |
100.00
|
| xbar_all_access_same_device |
2 |
2 |
100.00 |
|
xbar_access_same_device |
35.940s |
794.562us |
1 |
1 |
100.00
|
|
xbar_access_same_device_slow_rsp |
510.760s |
57202.844us |
1 |
1 |
100.00
|
| xbar_all_hosts_use_same_source_id |
1 |
1 |
100.00 |
|
xbar_same_source |
33.840s |
1676.526us |
1 |
1 |
100.00
|
| xbar_stress_all |
2 |
2 |
100.00 |
|
xbar_stress_all |
87.490s |
3808.386us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_error |
90.940s |
4563.537us |
1 |
1 |
100.00
|
| xbar_stress_with_reset |
2 |
2 |
100.00 |
|
xbar_stress_all_with_rand_reset |
111.230s |
500.084us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_reset_error |
124.730s |
3260.706us |
1 |
1 |
100.00
|
| rom_e2e_smoke |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2557.640s |
14895.463us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_output |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_output |
2158.330s |
24515.350us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_exception_c |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_exception_c |
2563.320s |
15835.202us |
1 |
1 |
100.00
|
| rom_e2e_boot_policy_valid |
5 |
15 |
33.33 |
|
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 |
1968.190s |
12487.873us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_dev |
2509.160s |
15744.659us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod |
2495.700s |
15934.472us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod_end |
2619.650s |
15786.051us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_rma |
2416.970s |
14766.609us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 |
20.120s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_dev |
18.880s |
10.380us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod |
17.120s |
10.200us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end |
17.140s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_rma |
16.480s |
10.360us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 |
16.210s |
10.120us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_dev |
16.750s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod |
16.690s |
10.120us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end |
16.360s |
10.380us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_rma |
16.350s |
10.200us |
0 |
1 |
0.00
|
| rom_e2e_sigverify_always |
0 |
15 |
0.00 |
|
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 |
16.660s |
10.140us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_dev |
17.010s |
10.360us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod |
16.150s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod_end |
20.490s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_rma |
19.600s |
10.200us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 |
16.010s |
10.280us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_dev |
18.060s |
10.280us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod |
17.300s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end |
17.360s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_rma |
18.540s |
10.260us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 |
17.330s |
10.200us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_dev |
16.700s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod |
17.570s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end |
17.570s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_rma |
17.180s |
10.340us |
0 |
1 |
0.00
|
| rom_e2e_asm_init |
5 |
5 |
100.00 |
|
rom_e2e_asm_init_test_unlocked0 |
2081.930s |
14602.102us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_dev |
2438.850s |
16405.718us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod |
2425.050s |
16829.064us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod_end |
2406.650s |
15089.436us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_rma |
2410.600s |
15852.915us |
1 |
1 |
100.00
|
| rom_e2e_keymgr_init |
3 |
3 |
100.00 |
|
rom_e2e_keymgr_init_rom_ext_meas |
2311.100s |
14663.379us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_no_meas |
2391.370s |
15729.931us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_invalid_meas |
2280.210s |
14691.283us |
1 |
1 |
100.00
|
| rom_e2e_static_critical |
1 |
1 |
100.00 |
|
rom_e2e_static_critical |
2497.020s |
16165.417us |
1 |
1 |
100.00
|
| chip_sw_adc_ctrl_debug_cable_irq |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
3144.780s |
34565.332us |
0 |
1 |
0.00
|
| chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
3144.780s |
34565.332us |
0 |
1 |
0.00
|
| chip_sw_aes_enc |
2 |
2 |
100.00 |
|
chip_sw_aes_enc |
156.290s |
2380.280us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
136.440s |
2448.861us |
1 |
1 |
100.00
|
| chip_sw_aes_entropy |
1 |
1 |
100.00 |
|
chip_sw_aes_entropy |
147.700s |
3476.597us |
1 |
1 |
100.00
|
| chip_sw_aes_idle |
1 |
1 |
100.00 |
|
chip_sw_aes_idle |
142.210s |
2430.618us |
1 |
1 |
100.00
|
| chip_sw_aes_sideload |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1653.390s |
13459.503us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_test |
132.010s |
2857.818us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_escalations |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
250.380s |
4906.273us |
1 |
1 |
100.00
|
| chip_sw_all_escalation_resets |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
393.600s |
5153.077us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
527.650s |
5338.986us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
288.060s |
3940.541us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
313.920s |
4157.914us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_entropy |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_entropy |
189.520s |
3073.387us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_crashdump |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
815.820s |
9431.411us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_timeout |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_timeout |
282.440s |
5594.307us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_sleep_mode_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_alerts |
136.250s |
2555.004us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_sleep_mode_pings |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_pings |
0.000s |
0.000us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_clock_off |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
886.040s |
7809.287us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_reset_toggle |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
1036.880s |
7514.219us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_ok |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_ok |
854.990s |
8080.539us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_reverse_ping_in_deep_sleep |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_reverse_ping_in_deep_sleep |
7311.320s |
256171.134us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wakeup_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
225.670s |
3907.871us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_smoketest |
246.400s |
5962.947us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bark_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
225.670s |
3907.871us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
358.460s |
8035.638us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
358.460s |
8035.638us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_sleep_pause |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_sleep_wdog_sleep_pause |
304.440s |
7539.212us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_lc_escalate |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_lc_escalate |
256.750s |
4361.165us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_idle_trans |
4 |
4 |
100.00 |
|
chip_sw_otbn_randomness |
544.550s |
5884.267us |
1 |
1 |
100.00
|
|
chip_sw_aes_idle |
142.210s |
2430.618us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_idle |
123.430s |
2884.003us |
1 |
1 |
100.00
|
|
chip_sw_kmac_idle |
147.310s |
2995.091us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_trans |
4 |
4 |
100.00 |
|
chip_sw_clkmgr_off_aes_trans |
292.870s |
4109.746us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_hmac_trans |
274.480s |
4674.443us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_kmac_trans |
196.190s |
3190.576us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_otbn_trans |
193.810s |
3979.342us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_peri |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_off_peri |
679.960s |
11475.825us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_div |
7 |
7 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
330.750s |
4040.209us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
354.930s |
4578.180us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
401.510s |
3789.129us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
369.370s |
4990.093us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
361.300s |
4371.192us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
360.890s |
4793.112us |
1 |
1 |
100.00
|
|
chip_sw_ast_clk_outputs |
584.110s |
7662.698us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_lc |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_lc |
487.910s |
9218.256us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_sw |
2 |
2 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
401.510s |
3789.129us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
369.370s |
4990.093us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
345.140s |
4194.756us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
568.140s |
5482.117us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3273.740s |
18242.138us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
136.440s |
2448.861us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
517.300s |
5728.297us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
158.490s |
2652.388us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1069.500s |
9329.774us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
202.810s |
3304.104us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
353.600s |
4530.950us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
171.460s |
3007.822us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_extended_range |
11 |
11 |
100.00 |
|
chip_sw_clkmgr_jitter_reduced_freq |
146.300s |
3730.799us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq |
366.230s |
4572.366us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en_reduced_freq |
638.230s |
6990.796us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq |
2991.080s |
25102.953us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en_reduced_freq |
166.390s |
3008.071us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en_reduced_freq |
159.630s |
2925.006us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq |
652.460s |
9186.714us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq |
188.490s |
3821.711us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq |
258.170s |
3749.884us |
1 |
1 |
100.00
|
|
chip_sw_flash_init_reduced_freq |
1473.390s |
26632.674us |
1 |
1 |
100.00
|
|
chip_sw_csrng_edn_concurrency_reduced_freq |
2071.960s |
18991.665us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_deep_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
584.110s |
7662.698us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_sleep_frequency |
295.550s |
4173.111us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_reset_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_reset_frequency |
210.540s |
2968.029us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
393.600s |
5153.077us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_alert_handler_clock_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
886.040s |
7809.287us |
1 |
1 |
100.00
|
| chip_sw_csrng_edn_cmd |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
915.290s |
7559.780us |
1 |
1 |
100.00
|
| chip_sw_csrng_fuse_en_sw_app_read |
1 |
1 |
100.00 |
|
chip_sw_csrng_fuse_en_sw_app_read_test |
273.120s |
3763.083us |
1 |
1 |
100.00
|
| chip_sw_csrng_lc_hw_debug_en |
1 |
1 |
100.00 |
|
chip_sw_csrng_lc_hw_debug_en_test |
393.270s |
5450.211us |
1 |
1 |
100.00
|
| chip_sw_csrng_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_csrng_kat_test |
151.190s |
2269.200us |
1 |
1 |
100.00
|
| chip_sw_edn_entropy_reqs |
3 |
3 |
100.00 |
|
chip_sw_csrng_edn_concurrency |
2267.630s |
13466.703us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_ast_rng_req |
134.130s |
2634.798us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs |
570.940s |
5694.101us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_ast_rng_req |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_ast_rng_req |
134.130s |
2634.798us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_csrng |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
915.290s |
7559.780us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_kat_test |
134.880s |
2913.860us |
1 |
1 |
100.00
|
| chip_sw_flash_init |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1327.660s |
25566.859us |
1 |
1 |
100.00
|
| chip_sw_flash_host_access |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_access |
585.290s |
5502.391us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
568.140s |
5482.117us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_ops |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_ops |
305.030s |
3708.157us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en |
345.140s |
4194.756us |
1 |
1 |
100.00
|
| chip_sw_flash_rma_unlocked |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3491.510s |
44420.145us |
1 |
1 |
100.00
|
| chip_sw_flash_scramble |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1327.660s |
25566.859us |
1 |
1 |
100.00
|
| chip_sw_flash_idle_low_power |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_idle_low_power |
163.650s |
3145.430us |
1 |
1 |
100.00
|
| chip_sw_flash_keymgr_seeds |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1052.000s |
9704.203us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_creator_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
345.480s |
5225.214us |
1 |
1 |
100.00
|
| chip_sw_flash_creator_seed_wipe_on_rma |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3491.510s |
44420.145us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_owner_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
345.480s |
5225.214us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
345.480s |
5225.214us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_wr_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
345.480s |
5225.214us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_seed_hw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
345.480s |
5225.214us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_escalate_en |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
393.600s |
5153.077us |
1 |
1 |
100.00
|
| chip_sw_flash_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
214.540s |
8777.293us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_clock_freqs |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_clock_freqs |
507.630s |
4687.285us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
428.590s |
5867.268us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_write_clear |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
428.590s |
5867.268us |
1 |
1 |
100.00
|
| chip_sw_hmac_enc |
2 |
2 |
100.00 |
|
chip_sw_hmac_enc |
120.890s |
2696.399us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
158.490s |
2652.388us |
1 |
1 |
100.00
|
| chip_sw_hmac_idle |
1 |
1 |
100.00 |
|
chip_sw_hmac_enc_idle |
123.430s |
2884.003us |
1 |
1 |
100.00
|
| chip_sw_hmac_all_configurations |
1 |
1 |
100.00 |
|
chip_sw_hmac_oneshot |
907.170s |
7296.588us |
1 |
1 |
100.00
|
| chip_sw_hmac_multistream_mode |
1 |
1 |
100.00 |
|
chip_sw_hmac_multistream |
660.750s |
5741.365us |
1 |
1 |
100.00
|
| chip_sw_i2c_host_tx_rx |
3 |
3 |
100.00 |
|
chip_sw_i2c_host_tx_rx |
382.350s |
4852.337us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx1 |
386.800s |
5134.056us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx2 |
366.160s |
4736.768us |
1 |
1 |
100.00
|
| chip_sw_i2c_device_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_i2c_device_tx_rx |
255.350s |
3743.113us |
1 |
1 |
100.00
|
| chip_sw_keymgr_key_derivation |
2 |
2 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1052.000s |
9704.203us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1069.500s |
9329.774us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_kmac |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_kmac |
1277.690s |
9832.818us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_aes |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1653.390s |
13459.503us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_otbn |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_otbn |
2374.090s |
13966.302us |
1 |
1 |
100.00
|
| chip_sw_kmac_enc |
3 |
3 |
100.00 |
|
chip_sw_kmac_mode_cshake |
118.250s |
2747.064us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac |
144.260s |
3058.306us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
202.810s |
3304.104us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_keymgr |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1052.000s |
9704.203us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_lc |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
726.420s |
11479.498us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_rom |
1 |
1 |
100.00 |
|
chip_sw_kmac_app_rom |
147.620s |
2595.596us |
1 |
1 |
100.00
|
| chip_sw_kmac_entropy |
1 |
1 |
100.00 |
|
chip_sw_kmac_entropy |
499.640s |
5022.664us |
1 |
1 |
100.00
|
| chip_sw_kmac_idle |
1 |
1 |
100.00 |
|
chip_sw_kmac_idle |
147.310s |
2995.091us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_alert_handler_escalation |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
250.380s |
4906.273us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_jtag_access |
3 |
3 |
100.00 |
|
chip_tap_straps_dev |
176.630s |
3807.216us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
286.830s |
6211.180us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
90.490s |
2496.928us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_otp_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
142.510s |
2839.385us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
726.420s |
11479.498us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_transitions |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
726.420s |
11479.498us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_kmac_req |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
726.420s |
11479.498us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_key_div |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation_prod |
917.770s |
7660.399us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_broadcast |
20 |
22 |
90.91 |
|
chip_prim_tl_access |
214.540s |
8777.293us |
1 |
1 |
100.00
|
|
chip_rv_dm_lc_disabled |
70.400s |
3821.466us |
0 |
1 |
0.00
|
|
chip_sw_flash_ctrl_lc_rw_en |
345.480s |
5225.214us |
1 |
1 |
100.00
|
|
chip_sw_flash_rma_unlocked |
3491.510s |
44420.145us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
164.470s |
3159.396us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
395.810s |
6999.367us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
394.370s |
7147.077us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
361.580s |
5204.239us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
726.420s |
11479.498us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1052.000s |
9704.203us |
1 |
1 |
100.00
|
|
chip_sw_rom_ctrl_integrity_check |
319.920s |
9899.338us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_execution_main |
553.540s |
7002.688us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_lc |
487.910s |
9218.256us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
330.750s |
4040.209us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
354.930s |
4578.180us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
401.510s |
3789.129us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
369.370s |
4990.093us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
361.300s |
4371.192us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
360.890s |
4793.112us |
1 |
1 |
100.00
|
|
chip_tap_straps_dev |
176.630s |
3807.216us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
286.830s |
6211.180us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
90.490s |
2496.928us |
1 |
1 |
100.00
|
| chip_lc_scrap |
4 |
4 |
100.00 |
|
chip_sw_lc_ctrl_rma_to_scrap |
129.890s |
3564.892us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_raw_to_scrap |
85.800s |
3780.403us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_test_locked0_to_scrap |
103.720s |
3577.428us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_rand_to_scrap |
163.820s |
3884.138us |
1 |
1 |
100.00
|
| chip_lc_test_locked |
1 |
2 |
50.00 |
|
chip_rv_dm_lc_disabled |
70.400s |
3821.466us |
0 |
1 |
0.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1539.050s |
33102.112us |
1 |
1 |
100.00
|
| chip_sw_lc_walkthrough |
5 |
5 |
100.00 |
|
chip_sw_lc_walkthrough_dev |
4110.050s |
50516.320us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prod |
4025.890s |
49536.478us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prodend |
488.500s |
9034.489us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_rma |
3320.920s |
44479.309us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1539.050s |
33102.112us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_volatile_raw_unlock |
3 |
3 |
100.00 |
|
chip_sw_lc_ctrl_volatile_raw_unlock |
59.460s |
2803.385us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz |
65.770s |
2744.809us |
1 |
1 |
100.00
|
|
rom_volatile_raw_unlock |
55.810s |
2212.196us |
1 |
1 |
100.00
|
| chip_sw_otbn_op |
2 |
2 |
100.00 |
|
chip_sw_otbn_ecdsa_op_irq |
3319.350s |
17234.209us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3273.740s |
18242.138us |
1 |
1 |
100.00
|
| chip_sw_otbn_rnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
544.550s |
5884.267us |
1 |
1 |
100.00
|
| chip_sw_otbn_urnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
544.550s |
5884.267us |
1 |
1 |
100.00
|
| chip_sw_otbn_idle |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
544.550s |
5884.267us |
1 |
1 |
100.00
|
| chip_sw_otbn_mem_scramble |
1 |
1 |
100.00 |
|
chip_sw_otbn_mem_scramble |
315.340s |
3956.645us |
1 |
1 |
100.00
|
| chip_otp_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
726.420s |
11479.498us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_keys |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1327.660s |
25566.859us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
315.340s |
3956.645us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1052.000s |
9704.203us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
428.780s |
4753.474us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
148.660s |
3122.873us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_entropy |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1327.660s |
25566.859us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
315.340s |
3956.645us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1052.000s |
9704.203us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
428.780s |
4753.474us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
148.660s |
3122.873us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
726.420s |
11479.498us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program_error |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_program_error |
300.860s |
5278.896us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
142.510s |
2839.385us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_lc_signals |
5 |
6 |
83.33 |
|
chip_prim_tl_access |
214.540s |
8777.293us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
164.470s |
3159.396us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
395.810s |
6999.367us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
394.370s |
7147.077us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
361.580s |
5204.239us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
726.420s |
11479.498us |
1 |
1 |
100.00
|
| chip_sw_otp_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
214.540s |
8777.293us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_dai_lock |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_dai_lock |
681.460s |
6656.366us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_external_full_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
196.960s |
8195.603us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_wake_ups |
885.160s |
25557.801us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_normal_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_wake_ups |
287.820s |
8050.234us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_por_reset |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_deep_sleep_por_reset |
205.680s |
6704.793us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_por_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_por_reset |
424.670s |
7549.882us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1212.170s |
22034.176us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
1 |
2 |
50.00 |
|
chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
818.310s |
14523.457us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_wdog_bite_reset |
358.460s |
8035.638us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
618.760s |
11256.489us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_wdog_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_wdog_reset |
316.250s |
4117.786us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_aon_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
196.960s |
8195.603us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_main_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_main_power_glitch_reset |
340.030s |
5152.581us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_power_glitch_reset |
1903.170s |
31240.515us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
376.020s |
7491.924us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_power_glitch_reset |
290.110s |
6019.130us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1382.490s |
22154.597us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
611.150s |
7143.769us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_all_reset_reqs |
917.260s |
9977.027us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_b2b_sleep_reset_req |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_b2b_sleep_reset_req |
1031.540s |
24707.393us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_disabled |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_disabled |
139.660s |
2961.942us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
393.600s |
5153.077us |
1 |
1 |
100.00
|
| chip_sw_rom_access |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
319.920s |
9899.338us |
1 |
1 |
100.00
|
| chip_sw_rom_ctrl_integrity_check |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
319.920s |
9899.338us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_non_sys_reset_info |
4 |
4 |
100.00 |
|
chip_sw_pwrmgr_all_reset_reqs |
917.260s |
9977.027us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1382.490s |
22154.597us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_wdog_reset |
316.250s |
4117.786us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
246.400s |
5962.947us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sys_reset_info |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
243.560s |
3704.933us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_cpu_info |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
244.510s |
4103.791us |
0 |
1 |
0.00
|
| chip_sw_rstmgr_sw_req_reset |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_req |
240.620s |
4142.825us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_info |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
815.820s |
9431.411us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sw_rst |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_rst |
151.080s |
3155.248us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
393.600s |
5153.077us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_handler_reset_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
1036.880s |
7514.219us |
1 |
1 |
100.00
|
| chip_sw_nmi_irq |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_nmi_irq |
499.370s |
4642.474us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_rnd |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_rnd |
484.680s |
4334.636us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_address_translation |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_address_translation |
156.450s |
3088.312us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_icache_scrambled_access |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_icache_invalidate |
148.660s |
3122.873us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_fault_dump |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
244.510s |
4103.791us |
0 |
1 |
0.00
|
| chip_sw_rv_core_ibex_double_fault |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
244.510s |
4103.791us |
0 |
1 |
0.00
|
| chip_jtag_csr_rw |
1 |
1 |
100.00 |
|
chip_jtag_csr_rw |
1478.420s |
17042.915us |
1 |
1 |
100.00
|
| chip_jtag_mem_access |
1 |
1 |
100.00 |
|
chip_jtag_mem_access |
960.680s |
13288.519us |
1 |
1 |
100.00
|
| chip_rv_dm_ndm_reset_req |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
243.560s |
3704.933us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
257.770s |
4679.309us |
1 |
1 |
100.00
|
| chip_rv_dm_access_after_wakeup |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_access_after_wakeup |
274.830s |
6161.550us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_jtag_tap_sel |
1 |
1 |
100.00 |
|
chip_tap_straps_rma |
286.830s |
6211.180us |
1 |
1 |
100.00
|
| chip_rv_dm_lc_disabled |
0 |
1 |
0.00 |
|
chip_rv_dm_lc_disabled |
70.400s |
3821.466us |
0 |
1 |
0.00
|
| chip_sw_plic_all_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
527.650s |
5338.986us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
288.060s |
3940.541us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
313.920s |
4157.914us |
1 |
1 |
100.00
|
| chip_sw_plic_sw_irq |
1 |
1 |
100.00 |
|
chip_sw_plic_sw_irq |
107.870s |
2177.948us |
1 |
1 |
100.00
|
| chip_sw_timer |
1 |
1 |
100.00 |
|
chip_sw_rv_timer_irq |
171.130s |
2987.341us |
1 |
1 |
100.00
|
| chip_sw_spi_device_flash_mode |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2557.640s |
14895.463us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through |
1 |
1 |
100.00 |
|
chip_sw_spi_device_pass_through |
429.520s |
6810.528us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through_collision |
0 |
1 |
0.00 |
|
chip_sw_spi_device_pass_through_collision |
186.650s |
3219.523us |
0 |
1 |
0.00
|
| chip_sw_spi_device_tpm |
1 |
1 |
100.00 |
|
chip_sw_spi_device_tpm |
176.310s |
3261.531us |
1 |
1 |
100.00
|
| chip_sw_spi_host_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_spi_host_tx_rx |
159.250s |
2975.752us |
1 |
1 |
100.00
|
| chip_sw_sram_scrambled_access |
2 |
2 |
100.00 |
|
chip_sw_sram_ctrl_scrambled_access |
428.780s |
4753.474us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
353.600s |
4530.950us |
1 |
1 |
100.00
|
| chip_sw_sleep_sram_ret_contents |
2 |
2 |
100.00 |
|
chip_sw_sleep_sram_ret_contents_no_scramble |
318.880s |
6702.505us |
1 |
1 |
100.00
|
|
chip_sw_sleep_sram_ret_contents_scramble |
393.660s |
7844.736us |
1 |
1 |
100.00
|
| chip_sw_sram_execution |
1 |
1 |
100.00 |
|
chip_sw_sram_ctrl_execution_main |
553.540s |
7002.688us |
1 |
1 |
100.00
|
| chip_sw_sram_lc_escalation |
2 |
2 |
100.00 |
|
chip_sw_all_escalation_resets |
393.600s |
5153.077us |
1 |
1 |
100.00
|
|
chip_sw_data_integrity_escalation |
413.310s |
5799.464us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
611.150s |
7143.769us |
1 |
1 |
100.00
|
|
chip_sw_sysrst_ctrl_reset |
989.870s |
24068.126us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_inputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_inputs |
174.500s |
3390.617us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_outputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_outputs |
234.560s |
3843.172us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_in_irq |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_in_irq |
309.040s |
4672.484us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
989.870s |
24068.126us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_reset |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
989.870s |
24068.126us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_ec_rst_l |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
2507.430s |
20535.448us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_flash_wp_l |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
2507.430s |
20535.448us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_ulp_z3_wakeup |
1 |
2 |
50.00 |
|
chip_sw_sysrst_ctrl_ulp_z3_wakeup |
287.970s |
6868.945us |
1 |
1 |
100.00
|
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
3144.780s |
34565.332us |
0 |
1 |
0.00
|
| chip_sw_usbdev_vbus |
1 |
1 |
100.00 |
|
chip_sw_usbdev_vbus |
119.850s |
2695.553us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pullup |
126.710s |
2718.908us |
1 |
1 |
100.00
|
| chip_sw_usbdev_aon_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_aon_pullup |
262.450s |
3870.824us |
1 |
1 |
100.00
|
| chip_sw_usbdev_setup_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_setuprx |
294.090s |
3761.169us |
1 |
1 |
100.00
|
| chip_sw_usbdev_config_host |
1 |
1 |
100.00 |
|
chip_sw_usbdev_config_host |
1098.550s |
8387.635us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pincfg |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pincfg |
4804.660s |
31800.856us |
1 |
1 |
100.00
|
| chip_sw_usbdev_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_dpi |
1599.200s |
12216.254us |
1 |
1 |
100.00
|
| chip_sw_usbdev_toggle_restore |
1 |
1 |
100.00 |
|
chip_sw_usbdev_toggle_restore |
111.510s |
2969.940us |
1 |
1 |
100.00
|