Simulation Results: i2c

 
27/11/2025 16:30:45 sha: 8a15de8 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 85.14 %
  • code
  • 81.32 %
  • assert
  • 95.98 %
  • func
  • 78.12 %
  • line
  • 96.38 %
  • branch
  • 92.19 %
  • cond
  • 84.52 %
  • toggle
  • 89.45 %
  • FSM
  • 44.05 %
Validation stages
V1
100.00%
V2
89.80%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
host_smoke 1 1 100.00
i2c_host_smoke 19.840s 1902.553us 1 1 100.00
target_smoke 1 1 100.00
i2c_target_smoke 16.570s 3203.535us 1 1 100.00
csr_hw_reset 1 1 100.00
i2c_csr_hw_reset 0.780s 59.146us 1 1 100.00
csr_rw 1 1 100.00
i2c_csr_rw 0.770s 27.769us 1 1 100.00
csr_bit_bash 1 1 100.00
i2c_csr_bit_bash 3.610s 1533.217us 1 1 100.00
csr_aliasing 1 1 100.00
i2c_csr_aliasing 1.550s 380.323us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
i2c_csr_mem_rw_with_rand_reset 0.680s 109.812us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
i2c_csr_rw 0.770s 27.769us 1 1 100.00
i2c_csr_aliasing 1.550s 380.323us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_error_intr 0 1 0.00
i2c_host_error_intr 0.760s 32.810us 0 1 0.00
host_stress_all 0 1 0.00
i2c_host_stress_all 1177.420s 37904.925us 0 1 0.00
host_maxperf 1 1 100.00
i2c_host_perf 602.630s 50640.652us 1 1 100.00
host_override 1 1 100.00
i2c_host_override 0.800s 101.377us 1 1 100.00
host_fifo_watermark 1 1 100.00
i2c_host_fifo_watermark 61.220s 8681.439us 1 1 100.00
host_fifo_overflow 1 1 100.00
i2c_host_fifo_overflow 118.310s 2561.443us 1 1 100.00
host_fifo_reset 3 3 100.00
i2c_host_fifo_reset_fmt 1.060s 249.498us 1 1 100.00
i2c_host_fifo_fmt_empty 3.610s 660.018us 1 1 100.00
i2c_host_fifo_reset_rx 4.380s 181.712us 1 1 100.00
host_fifo_full 1 1 100.00
i2c_host_fifo_full 56.480s 2662.974us 1 1 100.00
host_timeout 1 1 100.00
i2c_host_stretch_timeout 20.320s 2544.179us 1 1 100.00
i2c_host_mode_toggle 0 1 0.00
i2c_host_mode_toggle 0.770s 187.334us 0 1 0.00
target_glitch 0 1 0.00
i2c_target_glitch 2.570s 1974.858us 0 1 0.00
target_stress_all 1 1 100.00
i2c_target_stress_all 346.230s 90945.520us 1 1 100.00
target_maxperf 1 1 100.00
i2c_target_perf 3.050s 2075.713us 1 1 100.00
target_fifo_empty 2 2 100.00
i2c_target_stress_rd 3.100s 370.082us 1 1 100.00
i2c_target_intr_smoke 4.610s 2121.288us 1 1 100.00
target_fifo_reset 2 2 100.00
i2c_target_fifo_reset_acq 0.930s 402.275us 1 1 100.00
i2c_target_fifo_reset_tx 1.450s 844.384us 1 1 100.00
target_fifo_full 3 3 100.00
i2c_target_stress_wr 25.320s 24440.042us 1 1 100.00
i2c_target_stress_rd 3.100s 370.082us 1 1 100.00
i2c_target_intr_stress_wr 4.850s 9904.557us 1 1 100.00
target_timeout 1 1 100.00
i2c_target_timeout 4.490s 1087.966us 1 1 100.00
target_clock_stretch 1 1 100.00
i2c_target_stretch 17.470s 1944.265us 1 1 100.00
bad_address 1 1 100.00
i2c_target_bad_addr 3.160s 3601.595us 1 1 100.00
target_mode_glitch 0 1 0.00
i2c_target_hrst 5.940s 10017.494us 0 1 0.00
target_fifo_watermark 2 2 100.00
i2c_target_fifo_watermarks_acq 1.750s 395.894us 1 1 100.00
i2c_target_fifo_watermarks_tx 0.960s 119.334us 1 1 100.00
host_mode_config_perf 2 2 100.00
i2c_host_perf 602.630s 50640.652us 1 1 100.00
i2c_host_perf_precise 40.080s 1477.602us 1 1 100.00
host_mode_clock_stretching 1 1 100.00
i2c_host_stretch_timeout 20.320s 2544.179us 1 1 100.00
target_mode_tx_stretch_ctrl 1 1 100.00
i2c_target_tx_stretch_ctrl 4.200s 350.922us 1 1 100.00
target_mode_nack_generation 3 3 100.00
i2c_target_nack_acqfull 2.020s 1461.913us 1 1 100.00
i2c_target_nack_acqfull_addr 2.140s 1198.578us 1 1 100.00
i2c_target_nack_txstretch 1.390s 748.548us 1 1 100.00
host_mode_halt_on_nak 1 1 100.00
i2c_host_may_nack 3.250s 316.354us 1 1 100.00
target_mode_smbus_maxlen 1 1 100.00
i2c_target_smbus_maxlen 1.820s 8116.773us 1 1 100.00
alert_test 1 1 100.00
i2c_alert_test 0.580s 30.594us 1 1 100.00
intr_test 1 1 100.00
i2c_intr_test 0.620s 124.966us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
i2c_tl_errors 1.100s 26.608us 1 1 100.00
tl_d_illegal_access 1 1 100.00
i2c_tl_errors 1.100s 26.608us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
i2c_csr_hw_reset 0.780s 59.146us 1 1 100.00
i2c_csr_rw 0.770s 27.769us 1 1 100.00
i2c_csr_aliasing 1.550s 380.323us 1 1 100.00
i2c_same_csr_outstanding 0.980s 59.839us 1 1 100.00
tl_d_partial_access 4 4 100.00
i2c_csr_hw_reset 0.780s 59.146us 1 1 100.00
i2c_csr_rw 0.770s 27.769us 1 1 100.00
i2c_csr_aliasing 1.550s 380.323us 1 1 100.00
i2c_same_csr_outstanding 0.980s 59.839us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
i2c_tl_intg_err 1.740s 1342.503us 1 1 100.00
i2c_sec_cm 1.020s 116.983us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
i2c_tl_intg_err 1.740s 1342.503us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_stress_all_with_rand_reset 0 1 0.00
i2c_host_stress_all_with_rand_reset 6.300s 1668.105us 0 1 0.00
target_error_intr 0 1 0.00
i2c_target_unexp_stop 1.110s 66.409us 0 1 0.00
target_stress_all_with_rand_reset 0 1 0.00
i2c_target_stress_all_with_rand_reset 12.840s 16440.556us 0 1 0.00