Simulation Results: keymgr

 
27/11/2025 16:30:45 sha: 8a15de8 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.03 %
  • code
  • 95.19 %
  • assert
  • 97.72 %
  • func
  • 65.18 %
  • line
  • 98.66 %
  • branch
  • 97.58 %
  • cond
  • 93.61 %
  • toggle
  • 97.72 %
  • FSM
  • 88.37 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 2.430s 93.064us 1 1 100.00
random 1 1 100.00
keymgr_random 2.430s 70.064us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 0.910s 36.117us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.830s 10.824us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 23.170s 5336.917us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 3.360s 73.306us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.100s 25.560us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.830s 10.824us 1 1 100.00
keymgr_csr_aliasing 3.360s 73.306us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 3.070s 119.466us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 3.030s 181.602us 1 1 100.00
keymgr_sideload_kmac 1.620s 95.357us 1 1 100.00
keymgr_sideload_aes 27.790s 1406.195us 1 1 100.00
keymgr_sideload_otbn 2.820s 526.803us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 2.770s 292.207us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.280s 418.209us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 1.800s 202.235us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 3.180s 348.914us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 3.260s 1968.182us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.900s 66.412us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 24.080s 893.282us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.900s 19.488us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.770s 88.803us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 1.860s 114.774us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 1.860s 114.774us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 0.910s 36.117us 1 1 100.00
keymgr_csr_rw 0.830s 10.824us 1 1 100.00
keymgr_csr_aliasing 3.360s 73.306us 1 1 100.00
keymgr_same_csr_outstanding 1.970s 201.714us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 0.910s 36.117us 1 1 100.00
keymgr_csr_rw 0.830s 10.824us 1 1 100.00
keymgr_csr_aliasing 3.360s 73.306us 1 1 100.00
keymgr_same_csr_outstanding 1.970s 201.714us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 6.670s 1773.993us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 6.670s 1773.993us 1 1 100.00
keymgr_tl_intg_err 2.740s 557.072us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 2.300s 353.996us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 2.300s 353.996us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 2.300s 353.996us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 2.300s 353.996us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 6.620s 1153.324us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 6.670s 1773.993us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 6.670s 1773.993us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 2.740s 557.072us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 2.300s 353.996us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 3.070s 119.466us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 2.430s 70.064us 1 1 100.00
keymgr_csr_rw 0.830s 10.824us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 2.430s 70.064us 1 1 100.00
keymgr_csr_rw 0.830s 10.824us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 2.430s 70.064us 1 1 100.00
keymgr_csr_rw 0.830s 10.824us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.280s 418.209us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.260s 1968.182us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.260s 1968.182us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 2.430s 70.064us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 2.220s 639.634us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 6.670s 1773.993us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 6.670s 1773.993us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 6.670s 1773.993us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 2.470s 51.622us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.280s 418.209us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 6.670s 1773.993us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 6.670s 1773.993us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 6.670s 1773.993us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.470s 51.622us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.470s 51.622us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 6.670s 1773.993us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.470s 51.622us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 6.670s 1773.993us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 2.470s 51.622us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 10.560s 571.028us 1 1 100.00