Simulation Results: spi_device

 
27/11/2025 16:30:45 sha: 8a15de8 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 87.49 %
  • code
  • 94.15 %
  • assert
  • 94.41 %
  • func
  • 73.91 %
  • line
  • 99.10 %
  • branch
  • 98.32 %
  • cond
  • 96.25 %
  • toggle
  • 87.74 %
  • FSM
  • 89.36 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
unmapped
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_device_flash_and_tpm 7.560s 1254.697us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_device_csr_hw_reset 0.810s 65.858us 1 1 100.00
csr_rw 1 1 100.00
spi_device_csr_rw 1.040s 61.127us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_device_csr_bit_bash 8.120s 1188.825us 1 1 100.00
csr_aliasing 1 1 100.00
spi_device_csr_aliasing 17.080s 24816.888us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_device_csr_mem_rw_with_rand_reset 2.880s 60.479us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_device_csr_rw 1.040s 61.127us 1 1 100.00
spi_device_csr_aliasing 17.080s 24816.888us 1 1 100.00
mem_walk 1 1 100.00
spi_device_mem_walk 0.600s 31.578us 1 1 100.00
mem_partial_access 1 1 100.00
spi_device_mem_partial_access 1.260s 18.575us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
csb_read 1 1 100.00
spi_device_csb_read 1.080s 14.868us 1 1 100.00
mem_parity 1 1 100.00
spi_device_mem_parity 1.060s 235.409us 1 1 100.00
mem_cfg 1 1 100.00
spi_device_ram_cfg 0.960s 37.486us 1 1 100.00
tpm_read 1 1 100.00
spi_device_tpm_rw 1.050s 35.973us 1 1 100.00
tpm_write 1 1 100.00
spi_device_tpm_rw 1.050s 35.973us 1 1 100.00
tpm_hw_reg 2 2 100.00
spi_device_tpm_read_hw_reg 1.960s 2405.464us 1 1 100.00
spi_device_tpm_sts_read 1.080s 49.994us 1 1 100.00
tpm_fully_random_case 1 1 100.00
spi_device_tpm_all 29.230s 180877.265us 1 1 100.00
pass_cmd_filtering 2 2 100.00
spi_device_pass_cmd_filtering 4.020s 18897.038us 1 1 100.00
spi_device_flash_all 60.870s 17633.852us 1 1 100.00
pass_addr_translation 2 2 100.00
spi_device_pass_addr_payload_swap 2.070s 727.702us 1 1 100.00
spi_device_flash_all 60.870s 17633.852us 1 1 100.00
pass_payload_translation 2 2 100.00
spi_device_pass_addr_payload_swap 2.070s 727.702us 1 1 100.00
spi_device_flash_all 60.870s 17633.852us 1 1 100.00
cmd_info_slots 1 1 100.00
spi_device_flash_all 60.870s 17633.852us 1 1 100.00
cmd_read_status 2 2 100.00
spi_device_intercept 2.020s 492.367us 1 1 100.00
spi_device_flash_all 60.870s 17633.852us 1 1 100.00
cmd_read_jedec 2 2 100.00
spi_device_intercept 2.020s 492.367us 1 1 100.00
spi_device_flash_all 60.870s 17633.852us 1 1 100.00
cmd_read_sfdp 2 2 100.00
spi_device_intercept 2.020s 492.367us 1 1 100.00
spi_device_flash_all 60.870s 17633.852us 1 1 100.00
cmd_fast_read 2 2 100.00
spi_device_intercept 2.020s 492.367us 1 1 100.00
spi_device_flash_all 60.870s 17633.852us 1 1 100.00
cmd_read_pipeline 2 2 100.00
spi_device_intercept 2.020s 492.367us 1 1 100.00
spi_device_flash_all 60.870s 17633.852us 1 1 100.00
flash_cmd_upload 1 1 100.00
spi_device_upload 5.950s 1125.789us 1 1 100.00
mailbox_command 1 1 100.00
spi_device_mailbox 4.520s 468.504us 1 1 100.00
mailbox_cross_outside_command 1 1 100.00
spi_device_mailbox 4.520s 468.504us 1 1 100.00
mailbox_cross_inside_command 1 1 100.00
spi_device_mailbox 4.520s 468.504us 1 1 100.00
cmd_read_buffer 2 2 100.00
spi_device_flash_mode 3.590s 664.292us 1 1 100.00
spi_device_read_buffer_direct 4.830s 3454.310us 1 1 100.00
cmd_dummy_cycle 2 2 100.00
spi_device_mailbox 4.520s 468.504us 1 1 100.00
spi_device_flash_all 60.870s 17633.852us 1 1 100.00
quad_spi 1 1 100.00
spi_device_flash_all 60.870s 17633.852us 1 1 100.00
dual_spi 1 1 100.00
spi_device_flash_all 60.870s 17633.852us 1 1 100.00
4b_3b_feature 1 1 100.00
spi_device_cfg_cmd 3.760s 784.684us 1 1 100.00
write_enable_disable 1 1 100.00
spi_device_cfg_cmd 3.760s 784.684us 1 1 100.00
TPM_with_flash_or_passthrough_mode 1 1 100.00
spi_device_flash_and_tpm 7.560s 1254.697us 1 1 100.00
tpm_and_flash_trans_with_min_inactive_time 1 1 100.00
spi_device_flash_and_tpm_min_idle 49.280s 3993.447us 1 1 100.00
stress_all 1 1 100.00
spi_device_stress_all 115.900s 98147.852us 1 1 100.00
alert_test 1 1 100.00
spi_device_alert_test 0.670s 20.362us 1 1 100.00
intr_test 1 1 100.00
spi_device_intr_test 0.710s 20.246us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_device_tl_errors 3.290s 398.322us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_device_tl_errors 3.290s 398.322us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_device_csr_hw_reset 0.810s 65.858us 1 1 100.00
spi_device_csr_rw 1.040s 61.127us 1 1 100.00
spi_device_csr_aliasing 17.080s 24816.888us 1 1 100.00
spi_device_same_csr_outstanding 2.920s 303.835us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_device_csr_hw_reset 0.810s 65.858us 1 1 100.00
spi_device_csr_rw 1.040s 61.127us 1 1 100.00
spi_device_csr_aliasing 17.080s 24816.888us 1 1 100.00
spi_device_same_csr_outstanding 2.920s 303.835us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_device_sec_cm 0.820s 38.711us 1 1 100.00
spi_device_tl_intg_err 13.680s 862.511us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_device_tl_intg_err 13.680s 862.511us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 0 1 0.00
spi_device_flash_mode_ignore_cmds 100.720s 44623.080us 0 1 0.00