Simulation Results: i2c

 
01/12/2025 17:24:06 sha: a49b553 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 85.11 %
  • code
  • 81.56 %
  • assert
  • 96.19 %
  • func
  • 77.59 %
  • line
  • 96.38 %
  • branch
  • 92.19 %
  • cond
  • 85.12 %
  • toggle
  • 89.45 %
  • FSM
  • 44.64 %
Validation stages
V1
100.00%
V2
91.84%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
host_smoke 1 1 100.00
i2c_host_smoke 13.110s 1261.005us 1 1 100.00
target_smoke 1 1 100.00
i2c_target_smoke 19.640s 960.371us 1 1 100.00
csr_hw_reset 1 1 100.00
i2c_csr_hw_reset 0.790s 16.668us 1 1 100.00
csr_rw 1 1 100.00
i2c_csr_rw 0.820s 17.139us 1 1 100.00
csr_bit_bash 1 1 100.00
i2c_csr_bit_bash 2.310s 236.356us 1 1 100.00
csr_aliasing 1 1 100.00
i2c_csr_aliasing 1.480s 42.039us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
i2c_csr_mem_rw_with_rand_reset 0.920s 75.391us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
i2c_csr_rw 0.820s 17.139us 1 1 100.00
i2c_csr_aliasing 1.480s 42.039us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_error_intr 0 1 0.00
i2c_host_error_intr 0.930s 31.701us 0 1 0.00
host_stress_all 1 1 100.00
i2c_host_stress_all 458.640s 40550.613us 1 1 100.00
host_maxperf 1 1 100.00
i2c_host_perf 358.390s 51810.634us 1 1 100.00
host_override 1 1 100.00
i2c_host_override 0.870s 99.011us 1 1 100.00
host_fifo_watermark 1 1 100.00
i2c_host_fifo_watermark 153.740s 18450.218us 1 1 100.00
host_fifo_overflow 1 1 100.00
i2c_host_fifo_overflow 112.970s 2573.399us 1 1 100.00
host_fifo_reset 3 3 100.00
i2c_host_fifo_reset_fmt 0.830s 91.498us 1 1 100.00
i2c_host_fifo_fmt_empty 4.430s 682.544us 1 1 100.00
i2c_host_fifo_reset_rx 2.550s 141.067us 1 1 100.00
host_fifo_full 1 1 100.00
i2c_host_fifo_full 91.120s 2620.952us 1 1 100.00
host_timeout 1 1 100.00
i2c_host_stretch_timeout 6.700s 2051.087us 1 1 100.00
i2c_host_mode_toggle 1 1 100.00
i2c_host_mode_toggle 1.150s 72.278us 1 1 100.00
target_glitch 0 1 0.00
i2c_target_glitch 2.130s 941.797us 0 1 0.00
target_stress_all 1 1 100.00
i2c_target_stress_all 30.330s 30238.910us 1 1 100.00
target_maxperf 1 1 100.00
i2c_target_perf 4.850s 4417.284us 1 1 100.00
target_fifo_empty 2 2 100.00
i2c_target_stress_rd 3.490s 1004.843us 1 1 100.00
i2c_target_intr_smoke 3.660s 895.759us 1 1 100.00
target_fifo_reset 2 2 100.00
i2c_target_fifo_reset_acq 0.750s 286.717us 1 1 100.00
i2c_target_fifo_reset_tx 1.110s 667.143us 1 1 100.00
target_fifo_full 3 3 100.00
i2c_target_stress_wr 9.080s 6892.877us 1 1 100.00
i2c_target_stress_rd 3.490s 1004.843us 1 1 100.00
i2c_target_intr_stress_wr 93.920s 40462.311us 1 1 100.00
target_timeout 1 1 100.00
i2c_target_timeout 3.890s 5182.671us 1 1 100.00
target_clock_stretch 0 1 0.00
i2c_target_stretch 12.590s 10012.166us 0 1 0.00
bad_address 1 1 100.00
i2c_target_bad_addr 3.980s 17391.028us 1 1 100.00
target_mode_glitch 0 1 0.00
i2c_target_hrst 10.270s 10071.415us 0 1 0.00
target_fifo_watermark 2 2 100.00
i2c_target_fifo_watermarks_acq 1.560s 2619.288us 1 1 100.00
i2c_target_fifo_watermarks_tx 1.170s 143.146us 1 1 100.00
host_mode_config_perf 2 2 100.00
i2c_host_perf 358.390s 51810.634us 1 1 100.00
i2c_host_perf_precise 14.240s 6289.497us 1 1 100.00
host_mode_clock_stretching 1 1 100.00
i2c_host_stretch_timeout 6.700s 2051.087us 1 1 100.00
target_mode_tx_stretch_ctrl 1 1 100.00
i2c_target_tx_stretch_ctrl 2.160s 185.347us 1 1 100.00
target_mode_nack_generation 3 3 100.00
i2c_target_nack_acqfull 1.940s 1023.029us 1 1 100.00
i2c_target_nack_acqfull_addr 1.860s 938.918us 1 1 100.00
i2c_target_nack_txstretch 1.050s 757.714us 1 1 100.00
host_mode_halt_on_nak 1 1 100.00
i2c_host_may_nack 3.600s 1155.064us 1 1 100.00
target_mode_smbus_maxlen 1 1 100.00
i2c_target_smbus_maxlen 1.680s 1521.946us 1 1 100.00
alert_test 1 1 100.00
i2c_alert_test 0.600s 22.778us 1 1 100.00
intr_test 1 1 100.00
i2c_intr_test 0.680s 17.296us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
i2c_tl_errors 1.290s 63.163us 1 1 100.00
tl_d_illegal_access 1 1 100.00
i2c_tl_errors 1.290s 63.163us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
i2c_csr_hw_reset 0.790s 16.668us 1 1 100.00
i2c_csr_rw 0.820s 17.139us 1 1 100.00
i2c_csr_aliasing 1.480s 42.039us 1 1 100.00
i2c_same_csr_outstanding 1.060s 52.768us 1 1 100.00
tl_d_partial_access 4 4 100.00
i2c_csr_hw_reset 0.790s 16.668us 1 1 100.00
i2c_csr_rw 0.820s 17.139us 1 1 100.00
i2c_csr_aliasing 1.480s 42.039us 1 1 100.00
i2c_same_csr_outstanding 1.060s 52.768us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
i2c_tl_intg_err 1.150s 109.645us 1 1 100.00
i2c_sec_cm 0.830s 371.336us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
i2c_tl_intg_err 1.150s 109.645us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_stress_all_with_rand_reset 0 1 0.00
i2c_host_stress_all_with_rand_reset 14.150s 3946.446us 0 1 0.00
target_error_intr 0 1 0.00
i2c_target_unexp_stop 1.080s 471.057us 0 1 0.00
target_stress_all_with_rand_reset 0 1 0.00
i2c_target_stress_all_with_rand_reset 19.470s 2612.447us 0 1 0.00