Simulation Results: keymgr

 
01/12/2025 17:24:06 sha: a49b553 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 84.24 %
  • code
  • 94.04 %
  • assert
  • 97.49 %
  • func
  • 61.20 %
  • line
  • 98.62 %
  • branch
  • 97.76 %
  • cond
  • 94.71 %
  • toggle
  • 93.08 %
  • FSM
  • 86.05 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 1.940s 291.735us 1 1 100.00
random 1 1 100.00
keymgr_random 3.570s 439.264us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.030s 122.013us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.800s 14.895us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 13.810s 18487.628us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 2.930s 73.078us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.570s 63.433us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.800s 14.895us 1 1 100.00
keymgr_csr_aliasing 2.930s 73.078us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 2.080s 132.641us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 4.330s 244.498us 1 1 100.00
keymgr_sideload_kmac 3.910s 138.627us 1 1 100.00
keymgr_sideload_aes 1.790s 105.664us 1 1 100.00
keymgr_sideload_otbn 3.360s 155.635us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 2.590s 67.135us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 1.980s 188.439us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 2.170s 101.369us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 4.760s 179.133us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 2.710s 85.954us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 5.870s 661.232us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 19.030s 730.739us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.750s 24.432us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.770s 35.966us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 1.810s 333.404us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 1.810s 333.404us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.030s 122.013us 1 1 100.00
keymgr_csr_rw 0.800s 14.895us 1 1 100.00
keymgr_csr_aliasing 2.930s 73.078us 1 1 100.00
keymgr_same_csr_outstanding 2.730s 96.941us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.030s 122.013us 1 1 100.00
keymgr_csr_rw 0.800s 14.895us 1 1 100.00
keymgr_csr_aliasing 2.930s 73.078us 1 1 100.00
keymgr_same_csr_outstanding 2.730s 96.941us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 8.800s 485.590us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 8.800s 485.590us 1 1 100.00
keymgr_tl_intg_err 3.280s 344.485us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 1.400s 73.742us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 1.400s 73.742us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 1.400s 73.742us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 1.400s 73.742us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 8.430s 603.479us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 8.800s 485.590us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 8.800s 485.590us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 3.280s 344.485us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 1.400s 73.742us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 2.080s 132.641us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 3.570s 439.264us 1 1 100.00
keymgr_csr_rw 0.800s 14.895us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 3.570s 439.264us 1 1 100.00
keymgr_csr_rw 0.800s 14.895us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 3.570s 439.264us 1 1 100.00
keymgr_csr_rw 0.800s 14.895us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 1.980s 188.439us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.710s 85.954us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.710s 85.954us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 3.570s 439.264us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 3.920s 534.345us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.800s 485.590us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.800s 485.590us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 8.800s 485.590us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 1.660s 99.467us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 1.980s 188.439us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 8.800s 485.590us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.800s 485.590us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 8.800s 485.590us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.660s 99.467us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.660s 99.467us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 8.800s 485.590us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.660s 99.467us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.800s 485.590us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 1.660s 99.467us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
keymgr_stress_all_with_rand_reset 2.340s 241.870us 0 1 0.00