Simulation Results: otp_ctrl

 
01/12/2025 17:24:06 sha: a49b553 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.73 %
  • code
  • 76.49 %
  • assert
  • 93.39 %
  • func
  • 72.30 %
  • line
  • 88.17 %
  • branch
  • 83.12 %
  • cond
  • 89.69 %
  • toggle
  • 79.82 %
  • FSM
  • 41.67 %
Validation stages
V1
100.00%
V2
92.00%
V2S
92.86%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 1.860s 193.722us 1 1 100.00
smoke 1 1 100.00
otp_ctrl_smoke 4.230s 601.546us 1 1 100.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 2.450s 111.995us 1 1 100.00
csr_rw 1 1 100.00
otp_ctrl_csr_rw 2.160s 92.759us 1 1 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 5.020s 504.678us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 3.850s 310.088us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otp_ctrl_csr_mem_rw_with_rand_reset 2.000s 144.151us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otp_ctrl_csr_rw 2.160s 92.759us 1 1 100.00
otp_ctrl_csr_aliasing 3.850s 310.088us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 1.850s 69.887us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 2.330s 497.332us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 1 1 100.00
otp_ctrl_partition_walk 15.910s 1373.436us 1 1 100.00
init_fail 0 1 0.00
otp_ctrl_init_fail 3.930s 1519.751us 0 1 0.00
partition_check 2 2 100.00
otp_ctrl_background_chks 7.960s 1152.036us 1 1 100.00
otp_ctrl_check_fail 4.720s 593.993us 1 1 100.00
regwen_during_otp_init 1 1 100.00
otp_ctrl_regwen 4.330s 2166.634us 1 1 100.00
partition_lock 1 1 100.00
otp_ctrl_dai_lock 15.650s 3065.330us 1 1 100.00
interface_key_check 1 1 100.00
otp_ctrl_parallel_key_req 25.890s 2525.617us 1 1 100.00
lc_interactions 2 2 100.00
otp_ctrl_parallel_lc_req 15.660s 1831.789us 1 1 100.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
otp_dai_errors 1 1 100.00
otp_ctrl_dai_errs 12.060s 2335.304us 1 1 100.00
otp_macro_errors 0 1 0.00
otp_ctrl_macro_errs 7.580s 340.657us 0 1 0.00
test_access 1 1 100.00
otp_ctrl_test_access 15.580s 3748.730us 1 1 100.00
stress_all 1 1 100.00
otp_ctrl_stress_all 3.300s 141.128us 1 1 100.00
intr_test 1 1 100.00
otp_ctrl_intr_test 1.330s 144.247us 1 1 100.00
alert_test 1 1 100.00
otp_ctrl_alert_test 1.640s 879.061us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otp_ctrl_tl_errors 4.380s 392.437us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otp_ctrl_tl_errors 4.380s 392.437us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otp_ctrl_csr_hw_reset 2.450s 111.995us 1 1 100.00
otp_ctrl_csr_rw 2.160s 92.759us 1 1 100.00
otp_ctrl_csr_aliasing 3.850s 310.088us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.070s 161.794us 1 1 100.00
tl_d_partial_access 4 4 100.00
otp_ctrl_csr_hw_reset 2.450s 111.995us 1 1 100.00
otp_ctrl_csr_rw 2.160s 92.759us 1 1 100.00
otp_ctrl_csr_aliasing 3.850s 310.088us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.070s 161.794us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
tl_intg_err 2 2 100.00
otp_ctrl_tl_intg_err 25.020s 20158.413us 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
prim_count_check 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
prim_fsm_check 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otp_ctrl_tl_intg_err 25.020s 20158.413us 1 1 100.00
sec_cm_secret_mem_scramble 1 1 100.00
otp_ctrl_smoke 4.230s 601.546us 1 1 100.00
sec_cm_part_mem_digest 1 1 100.00
otp_ctrl_smoke 4.230s 601.546us 1 1 100.00
sec_cm_dai_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_kdi_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_lci_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_part_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_scrmbl_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_timer_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_dai_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_kdi_seed_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_kdi_entropy_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_lci_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_part_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_scrmbl_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_timer_integ_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_timer_cnsty_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_timer_lfsr_redun 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_dai_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_lci_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
sec_cm_kdi_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
sec_cm_part_fsm_local_esc 1 2 50.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
otp_ctrl_macro_errs 7.580s 340.657us 0 1 0.00
sec_cm_scrmbl_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
sec_cm_timer_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_dai_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_lci_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
sec_cm_kdi_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
sec_cm_part_fsm_global_esc 1 2 50.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
otp_ctrl_macro_errs 7.580s 340.657us 0 1 0.00
sec_cm_scrmbl_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
sec_cm_timer_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 10.670s 649.141us 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_part_data_reg_integrity 0 1 0.00
otp_ctrl_init_fail 3.930s 1519.751us 0 1 0.00
sec_cm_part_data_reg_bkgn_chk 1 1 100.00
otp_ctrl_check_fail 4.720s 593.993us 1 1 100.00
sec_cm_part_mem_regren 1 1 100.00
otp_ctrl_dai_lock 15.650s 3065.330us 1 1 100.00
sec_cm_part_mem_sw_unreadable 1 1 100.00
otp_ctrl_dai_lock 15.650s 3065.330us 1 1 100.00
sec_cm_part_mem_sw_unwritable 1 1 100.00
otp_ctrl_dai_lock 15.650s 3065.330us 1 1 100.00
sec_cm_lc_part_mem_sw_noaccess 1 1 100.00
otp_ctrl_dai_lock 15.650s 3065.330us 1 1 100.00
sec_cm_access_ctrl_mubi 1 1 100.00
otp_ctrl_dai_lock 15.650s 3065.330us 1 1 100.00
sec_cm_token_valid_ctrl_mubi 1 1 100.00
otp_ctrl_smoke 4.230s 601.546us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
otp_ctrl_dai_lock 15.650s 3065.330us 1 1 100.00
sec_cm_test_bus_lc_gated 1 1 100.00
otp_ctrl_smoke 4.230s 601.546us 1 1 100.00
sec_cm_test_tl_lc_gate_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 117.070s 10991.724us 1 1 100.00
sec_cm_direct_access_config_regwen 1 1 100.00
otp_ctrl_regwen 4.330s 2166.634us 1 1 100.00
sec_cm_check_trigger_config_regwen 1 1 100.00
otp_ctrl_smoke 4.230s 601.546us 1 1 100.00
sec_cm_check_config_regwen 1 1 100.00
otp_ctrl_smoke 4.230s 601.546us 1 1 100.00
sec_cm_macro_mem_integrity 0 1 0.00
otp_ctrl_macro_errs 7.580s 340.657us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 1 1 100.00
otp_ctrl_low_freq_read 11.840s 3361.042us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
otp_ctrl_stress_all_with_rand_reset 1.310s 113.169us 0 1 0.00