Simulation Results: spi_device

 
01/12/2025 17:24:06 sha: a49b553 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 85.92 %
  • code
  • 94.01 %
  • assert
  • 94.27 %
  • func
  • 69.49 %
  • line
  • 99.16 %
  • branch
  • 98.44 %
  • cond
  • 95.37 %
  • toggle
  • 87.74 %
  • FSM
  • 89.36 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_device_flash_and_tpm 11.970s 1228.382us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_device_csr_hw_reset 1.100s 152.590us 1 1 100.00
csr_rw 1 1 100.00
spi_device_csr_rw 1.760s 86.915us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_device_csr_bit_bash 9.310s 939.659us 1 1 100.00
csr_aliasing 1 1 100.00
spi_device_csr_aliasing 5.270s 317.949us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_device_csr_mem_rw_with_rand_reset 1.890s 94.452us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_device_csr_rw 1.760s 86.915us 1 1 100.00
spi_device_csr_aliasing 5.270s 317.949us 1 1 100.00
mem_walk 1 1 100.00
spi_device_mem_walk 0.610s 19.791us 1 1 100.00
mem_partial_access 1 1 100.00
spi_device_mem_partial_access 1.640s 136.794us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
csb_read 1 1 100.00
spi_device_csb_read 0.820s 48.602us 1 1 100.00
mem_parity 1 1 100.00
spi_device_mem_parity 0.890s 177.522us 1 1 100.00
mem_cfg 1 1 100.00
spi_device_ram_cfg 0.660s 45.101us 1 1 100.00
tpm_read 1 1 100.00
spi_device_tpm_rw 4.490s 187.934us 1 1 100.00
tpm_write 1 1 100.00
spi_device_tpm_rw 4.490s 187.934us 1 1 100.00
tpm_hw_reg 2 2 100.00
spi_device_tpm_read_hw_reg 5.040s 18643.998us 1 1 100.00
spi_device_tpm_sts_read 0.700s 19.665us 1 1 100.00
tpm_fully_random_case 1 1 100.00
spi_device_tpm_all 16.720s 5409.266us 1 1 100.00
pass_cmd_filtering 2 2 100.00
spi_device_pass_cmd_filtering 13.210s 6538.528us 1 1 100.00
spi_device_flash_all 84.670s 83380.951us 1 1 100.00
pass_addr_translation 2 2 100.00
spi_device_pass_addr_payload_swap 5.300s 3950.032us 1 1 100.00
spi_device_flash_all 84.670s 83380.951us 1 1 100.00
pass_payload_translation 2 2 100.00
spi_device_pass_addr_payload_swap 5.300s 3950.032us 1 1 100.00
spi_device_flash_all 84.670s 83380.951us 1 1 100.00
cmd_info_slots 1 1 100.00
spi_device_flash_all 84.670s 83380.951us 1 1 100.00
cmd_read_status 2 2 100.00
spi_device_intercept 1.590s 365.072us 1 1 100.00
spi_device_flash_all 84.670s 83380.951us 1 1 100.00
cmd_read_jedec 2 2 100.00
spi_device_intercept 1.590s 365.072us 1 1 100.00
spi_device_flash_all 84.670s 83380.951us 1 1 100.00
cmd_read_sfdp 2 2 100.00
spi_device_intercept 1.590s 365.072us 1 1 100.00
spi_device_flash_all 84.670s 83380.951us 1 1 100.00
cmd_fast_read 2 2 100.00
spi_device_intercept 1.590s 365.072us 1 1 100.00
spi_device_flash_all 84.670s 83380.951us 1 1 100.00
cmd_read_pipeline 2 2 100.00
spi_device_intercept 1.590s 365.072us 1 1 100.00
spi_device_flash_all 84.670s 83380.951us 1 1 100.00
flash_cmd_upload 1 1 100.00
spi_device_upload 5.710s 9184.546us 1 1 100.00
mailbox_command 1 1 100.00
spi_device_mailbox 33.280s 11804.731us 1 1 100.00
mailbox_cross_outside_command 1 1 100.00
spi_device_mailbox 33.280s 11804.731us 1 1 100.00
mailbox_cross_inside_command 1 1 100.00
spi_device_mailbox 33.280s 11804.731us 1 1 100.00
cmd_read_buffer 2 2 100.00
spi_device_flash_mode 4.120s 297.758us 1 1 100.00
spi_device_read_buffer_direct 8.690s 10194.920us 1 1 100.00
cmd_dummy_cycle 2 2 100.00
spi_device_mailbox 33.280s 11804.731us 1 1 100.00
spi_device_flash_all 84.670s 83380.951us 1 1 100.00
quad_spi 1 1 100.00
spi_device_flash_all 84.670s 83380.951us 1 1 100.00
dual_spi 1 1 100.00
spi_device_flash_all 84.670s 83380.951us 1 1 100.00
4b_3b_feature 1 1 100.00
spi_device_cfg_cmd 5.900s 6279.402us 1 1 100.00
write_enable_disable 1 1 100.00
spi_device_cfg_cmd 5.900s 6279.402us 1 1 100.00
TPM_with_flash_or_passthrough_mode 1 1 100.00
spi_device_flash_and_tpm 11.970s 1228.382us 1 1 100.00
tpm_and_flash_trans_with_min_inactive_time 1 1 100.00
spi_device_flash_and_tpm_min_idle 118.820s 26580.190us 1 1 100.00
stress_all 1 1 100.00
spi_device_stress_all 325.890s 135391.780us 1 1 100.00
alert_test 1 1 100.00
spi_device_alert_test 0.670s 11.975us 1 1 100.00
intr_test 1 1 100.00
spi_device_intr_test 0.690s 14.493us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_device_tl_errors 1.340s 295.270us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_device_tl_errors 1.340s 295.270us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_device_csr_hw_reset 1.100s 152.590us 1 1 100.00
spi_device_csr_rw 1.760s 86.915us 1 1 100.00
spi_device_csr_aliasing 5.270s 317.949us 1 1 100.00
spi_device_same_csr_outstanding 2.420s 154.983us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_device_csr_hw_reset 1.100s 152.590us 1 1 100.00
spi_device_csr_rw 1.760s 86.915us 1 1 100.00
spi_device_csr_aliasing 5.270s 317.949us 1 1 100.00
spi_device_same_csr_outstanding 2.420s 154.983us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_device_sec_cm 0.880s 128.324us 1 1 100.00
spi_device_tl_intg_err 12.240s 595.796us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_device_tl_intg_err 12.240s 595.796us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
spi_device_flash_mode_ignore_cmds 39.690s 28982.408us 1 1 100.00