| chip_pin_mux |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
132.640s |
4558.055us |
1 |
1 |
100.00
|
| chip_padctrl_attributes |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
132.640s |
4558.055us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_mio_dio_val |
0 |
1 |
0.00 |
|
chip_sw_sleep_pin_mio_dio_val |
178.750s |
3006.612us |
0 |
1 |
0.00
|
| chip_sw_sleep_pin_wake |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_wake |
126.670s |
3540.608us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_retention |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_retention |
246.100s |
4254.207us |
1 |
1 |
100.00
|
| chip_sw_tap_strap_sampling |
4 |
4 |
100.00 |
|
chip_tap_straps_dev |
77.270s |
1951.689us |
1 |
1 |
100.00
|
|
chip_tap_straps_testunlock0 |
480.370s |
7700.141us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
315.470s |
6379.957us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
914.620s |
14428.704us |
1 |
1 |
100.00
|
| chip_sw_pattgen_ios |
1 |
1 |
100.00 |
|
chip_sw_pattgen_ios |
130.960s |
2940.731us |
1 |
1 |
100.00
|
| chip_sw_sleep_pwm_pulses |
1 |
1 |
100.00 |
|
chip_sw_sleep_pwm_pulses |
884.070s |
9292.890us |
1 |
1 |
100.00
|
| chip_sw_data_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
433.260s |
5808.484us |
1 |
1 |
100.00
|
| chip_sw_instruction_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
433.260s |
5808.484us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_outputs |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
582.550s |
7814.212us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_rst_inputs |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_rst_inputs |
2384.070s |
23686.352us |
1 |
1 |
100.00
|
| chip_sw_ast_sys_clk_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
313.320s |
3469.860us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
568.020s |
5964.429us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3283.680s |
18221.990us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
129.850s |
2515.873us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
755.440s |
6605.273us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
148.280s |
3068.262us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1408.600s |
11064.375us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
161.950s |
2808.170us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
279.570s |
4805.356us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
113.450s |
3040.109us |
1 |
1 |
100.00
|
| chip_sw_ast_usb_clk_calib |
1 |
1 |
100.00 |
|
chip_sw_usb_ast_clk_calib |
176.100s |
2974.278us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_alerts |
1 |
2 |
50.00 |
|
chip_sw_sensor_ctrl_alert |
438.980s |
6342.900us |
0 |
1 |
0.00
|
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
219.910s |
4966.377us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_status |
1 |
1 |
100.00 |
|
chip_sw_sensor_ctrl_status |
172.550s |
2730.598us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
219.910s |
4966.377us |
1 |
1 |
100.00
|
| chip_sw_smoketest |
17 |
17 |
100.00 |
|
chip_sw_flash_scrambling_smoketest |
127.000s |
2873.094us |
1 |
1 |
100.00
|
|
chip_sw_aes_smoketest |
130.950s |
2800.889us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_smoketest |
170.400s |
3105.964us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_smoketest |
137.170s |
3075.663us |
1 |
1 |
100.00
|
|
chip_sw_csrng_smoketest |
137.550s |
3231.404us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_smoketest |
966.380s |
8147.898us |
1 |
1 |
100.00
|
|
chip_sw_gpio_smoketest |
176.760s |
3275.955us |
1 |
1 |
100.00
|
|
chip_sw_hmac_smoketest |
177.040s |
3602.009us |
1 |
1 |
100.00
|
|
chip_sw_kmac_smoketest |
159.400s |
2952.993us |
1 |
1 |
100.00
|
|
chip_sw_otbn_smoketest |
1122.660s |
10145.095us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
252.550s |
6516.588us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_usbdev_smoketest |
279.320s |
5770.175us |
1 |
1 |
100.00
|
|
chip_sw_rv_plic_smoketest |
150.340s |
2794.406us |
1 |
1 |
100.00
|
|
chip_sw_rv_timer_smoketest |
156.620s |
3163.927us |
1 |
1 |
100.00
|
|
chip_sw_rstmgr_smoketest |
174.900s |
3373.924us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_smoketest |
97.530s |
2405.538us |
1 |
1 |
100.00
|
|
chip_sw_uart_smoketest |
121.020s |
2769.757us |
1 |
1 |
100.00
|
| chip_sw_otp_smoketest |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_smoketest |
130.100s |
2428.203us |
1 |
1 |
100.00
|
| chip_sw_rom_functests |
1 |
1 |
100.00 |
|
rom_keymgr_functest |
298.160s |
4643.775us |
1 |
1 |
100.00
|
| chip_sw_boot |
1 |
1 |
100.00 |
|
chip_sw_uart_tx_rx_bootstrap |
7599.010s |
61576.077us |
1 |
1 |
100.00
|
| chip_sw_secure_boot |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2349.670s |
14750.366us |
1 |
1 |
100.00
|
| chip_sw_rom_raw_unlock |
0 |
1 |
0.00 |
|
rom_raw_unlock |
873.500s |
13911.416us |
0 |
1 |
0.00
|
| chip_sw_power_idle_load |
0 |
1 |
0.00 |
|
chip_sw_power_idle_load |
231.810s |
3393.824us |
0 |
1 |
0.00
|
| chip_sw_power_sleep_load |
0 |
1 |
0.00 |
|
chip_sw_power_sleep_load |
197.580s |
3506.440us |
0 |
1 |
0.00
|
| chip_sw_exit_test_unlocked_bootstrap |
1 |
1 |
100.00 |
|
chip_sw_exit_test_unlocked_bootstrap |
6789.490s |
52772.897us |
1 |
1 |
100.00
|
| chip_sw_inject_scramble_seed |
1 |
1 |
100.00 |
|
chip_sw_inject_scramble_seed |
7422.350s |
56846.440us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
67.510s |
2382.755us |
0 |
1 |
0.00
|
| tl_d_illegal_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
67.510s |
2382.755us |
0 |
1 |
0.00
|
| tl_d_outstanding_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
4102.860s |
28125.742us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
2419.520s |
29003.458us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
149.490s |
4511.015us |
1 |
1 |
100.00
|
|
chip_csr_rw |
368.660s |
5699.197us |
1 |
1 |
100.00
|
| tl_d_partial_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
4102.860s |
28125.742us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
2419.520s |
29003.458us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
149.490s |
4511.015us |
1 |
1 |
100.00
|
|
chip_csr_rw |
368.660s |
5699.197us |
1 |
1 |
100.00
|
| xbar_base_random_sequence |
1 |
1 |
100.00 |
|
xbar_random |
29.780s |
585.027us |
1 |
1 |
100.00
|
| xbar_random_delay |
6 |
6 |
100.00 |
|
xbar_smoke_zero_delays |
6.530s |
50.225us |
1 |
1 |
100.00
|
|
xbar_smoke_large_delays |
54.440s |
8834.634us |
1 |
1 |
100.00
|
|
xbar_smoke_slow_rsp |
33.460s |
3844.714us |
1 |
1 |
100.00
|
|
xbar_random_zero_delays |
15.470s |
198.398us |
1 |
1 |
100.00
|
|
xbar_random_large_delays |
265.100s |
45790.690us |
1 |
1 |
100.00
|
|
xbar_random_slow_rsp |
243.220s |
28092.704us |
1 |
1 |
100.00
|
| xbar_unmapped_address |
2 |
2 |
100.00 |
|
xbar_unmapped_addr |
12.210s |
154.024us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
16.900s |
220.556us |
1 |
1 |
100.00
|
| xbar_error_cases |
2 |
2 |
100.00 |
|
xbar_error_random |
25.510s |
1249.409us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
16.900s |
220.556us |
1 |
1 |
100.00
|
| xbar_all_access_same_device |
2 |
2 |
100.00 |
|
xbar_access_same_device |
18.910s |
430.868us |
1 |
1 |
100.00
|
|
xbar_access_same_device_slow_rsp |
152.260s |
17550.145us |
1 |
1 |
100.00
|
| xbar_all_hosts_use_same_source_id |
1 |
1 |
100.00 |
|
xbar_same_source |
22.150s |
1158.178us |
1 |
1 |
100.00
|
| xbar_stress_all |
2 |
2 |
100.00 |
|
xbar_stress_all |
205.810s |
10192.402us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_error |
62.480s |
3493.850us |
1 |
1 |
100.00
|
| xbar_stress_with_reset |
2 |
2 |
100.00 |
|
xbar_stress_all_with_rand_reset |
94.690s |
355.274us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_reset_error |
79.430s |
402.022us |
1 |
1 |
100.00
|
| rom_e2e_smoke |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2349.670s |
14750.366us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_output |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_output |
2316.350s |
25937.380us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_exception_c |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_exception_c |
2498.840s |
15708.015us |
1 |
1 |
100.00
|
| rom_e2e_boot_policy_valid |
5 |
15 |
33.33 |
|
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 |
1975.680s |
11806.057us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_dev |
2651.330s |
17276.257us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod |
2514.070s |
16327.085us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod_end |
2541.520s |
17767.157us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_rma |
2444.750s |
14768.767us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 |
20.650s |
10.140us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_dev |
20.270s |
10.380us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod |
16.440s |
10.280us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end |
17.910s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_rma |
21.700s |
10.120us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 |
21.780s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_dev |
17.200s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod |
16.930s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end |
17.820s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_rma |
20.660s |
10.380us |
0 |
1 |
0.00
|
| rom_e2e_sigverify_always |
0 |
15 |
0.00 |
|
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 |
17.340s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_dev |
18.170s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod |
16.180s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod_end |
17.190s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_rma |
28.080s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 |
21.460s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_dev |
21.170s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod |
20.100s |
10.120us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end |
16.810s |
10.120us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_rma |
17.440s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 |
17.990s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_dev |
17.060s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod |
18.020s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end |
17.520s |
10.280us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_rma |
17.210s |
10.240us |
0 |
1 |
0.00
|
| rom_e2e_asm_init |
5 |
5 |
100.00 |
|
rom_e2e_asm_init_test_unlocked0 |
1968.270s |
11418.357us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_dev |
2412.460s |
16048.007us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod |
2539.290s |
17189.485us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod_end |
2445.800s |
15739.565us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_rma |
2361.970s |
15655.841us |
1 |
1 |
100.00
|
| rom_e2e_keymgr_init |
1 |
3 |
33.33 |
|
rom_e2e_keymgr_init_rom_ext_meas |
4150.060s |
31262.005us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_no_meas |
2293.000s |
16088.195us |
0 |
1 |
0.00
|
|
rom_e2e_keymgr_init_rom_ext_invalid_meas |
2297.050s |
15802.875us |
0 |
1 |
0.00
|
| rom_e2e_static_critical |
1 |
1 |
100.00 |
|
rom_e2e_static_critical |
2370.720s |
15891.831us |
1 |
1 |
100.00
|
| chip_sw_adc_ctrl_debug_cable_irq |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2995.090s |
35527.505us |
0 |
1 |
0.00
|
| chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2995.090s |
35527.505us |
0 |
1 |
0.00
|
| chip_sw_aes_enc |
2 |
2 |
100.00 |
|
chip_sw_aes_enc |
183.850s |
3385.461us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
129.850s |
2515.873us |
1 |
1 |
100.00
|
| chip_sw_aes_entropy |
1 |
1 |
100.00 |
|
chip_sw_aes_entropy |
157.750s |
3026.588us |
1 |
1 |
100.00
|
| chip_sw_aes_idle |
1 |
1 |
100.00 |
|
chip_sw_aes_idle |
137.650s |
3001.968us |
1 |
1 |
100.00
|
| chip_sw_aes_sideload |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1305.630s |
10815.114us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_test |
158.210s |
3040.659us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_escalations |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
235.040s |
5357.266us |
1 |
1 |
100.00
|
| chip_sw_all_escalation_resets |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
306.640s |
5228.165us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
553.990s |
5206.607us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
265.100s |
3535.569us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
373.870s |
4175.237us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_entropy |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_entropy |
197.110s |
3643.606us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_crashdump |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
1002.210s |
14433.798us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_timeout |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_timeout |
319.500s |
6090.268us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_sleep_mode_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_alerts |
88.150s |
2139.660us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_sleep_mode_pings |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_pings |
0.000s |
0.000us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_clock_off |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
971.320s |
7715.629us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_reset_toggle |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
934.620s |
7702.360us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_ok |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_ok |
810.930s |
7360.032us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_reverse_ping_in_deep_sleep |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_reverse_ping_in_deep_sleep |
7195.880s |
255494.414us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wakeup_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
237.900s |
3644.318us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_smoketest |
252.550s |
6516.588us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bark_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
237.900s |
3644.318us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
334.270s |
7373.420us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
334.270s |
7373.420us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_sleep_pause |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_sleep_wdog_sleep_pause |
206.030s |
6287.455us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_lc_escalate |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_lc_escalate |
281.040s |
4244.067us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_idle_trans |
4 |
4 |
100.00 |
|
chip_sw_otbn_randomness |
520.150s |
6687.955us |
1 |
1 |
100.00
|
|
chip_sw_aes_idle |
137.650s |
3001.968us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_idle |
158.380s |
2982.242us |
1 |
1 |
100.00
|
|
chip_sw_kmac_idle |
119.450s |
2227.047us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_trans |
4 |
4 |
100.00 |
|
chip_sw_clkmgr_off_aes_trans |
213.880s |
4307.117us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_hmac_trans |
221.800s |
3740.979us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_kmac_trans |
265.180s |
4876.075us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_otbn_trans |
193.400s |
3600.332us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_peri |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_off_peri |
600.190s |
11356.964us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_div |
7 |
7 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
377.620s |
4116.991us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
384.710s |
4590.187us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
393.460s |
4184.371us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
347.150s |
4634.116us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
339.000s |
4436.225us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
386.060s |
5030.978us |
1 |
1 |
100.00
|
|
chip_sw_ast_clk_outputs |
582.550s |
7814.212us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_lc |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_lc |
432.910s |
8100.175us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_sw |
2 |
2 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
393.460s |
4184.371us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
347.150s |
4634.116us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
313.320s |
3469.860us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
568.020s |
5964.429us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3283.680s |
18221.990us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
129.850s |
2515.873us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
755.440s |
6605.273us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
148.280s |
3068.262us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1408.600s |
11064.375us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
161.950s |
2808.170us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
279.570s |
4805.356us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
113.450s |
3040.109us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_extended_range |
11 |
11 |
100.00 |
|
chip_sw_clkmgr_jitter_reduced_freq |
122.200s |
3117.279us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq |
375.180s |
5250.224us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en_reduced_freq |
646.950s |
7050.799us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq |
2895.260s |
24913.338us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en_reduced_freq |
138.110s |
2864.804us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en_reduced_freq |
135.080s |
3328.984us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq |
1113.200s |
10829.729us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq |
170.960s |
3179.828us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq |
354.760s |
4747.103us |
1 |
1 |
100.00
|
|
chip_sw_flash_init_reduced_freq |
1108.820s |
20857.567us |
1 |
1 |
100.00
|
|
chip_sw_csrng_edn_concurrency_reduced_freq |
2706.280s |
24533.687us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_deep_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
582.550s |
7814.212us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_sleep_frequency |
338.680s |
4491.802us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_reset_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_reset_frequency |
245.470s |
3897.170us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
306.640s |
5228.165us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_alert_handler_clock_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
971.320s |
7715.629us |
1 |
1 |
100.00
|
| chip_sw_csrng_edn_cmd |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
1027.760s |
6689.004us |
1 |
1 |
100.00
|
| chip_sw_csrng_fuse_en_sw_app_read |
0 |
1 |
0.00 |
|
chip_sw_csrng_fuse_en_sw_app_read_test |
116.320s |
2160.003us |
0 |
1 |
0.00
|
| chip_sw_csrng_lc_hw_debug_en |
1 |
1 |
100.00 |
|
chip_sw_csrng_lc_hw_debug_en_test |
396.810s |
5598.860us |
1 |
1 |
100.00
|
| chip_sw_csrng_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_csrng_kat_test |
131.090s |
2949.009us |
1 |
1 |
100.00
|
| chip_sw_edn_entropy_reqs |
3 |
3 |
100.00 |
|
chip_sw_csrng_edn_concurrency |
2417.490s |
15530.081us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_ast_rng_req |
105.720s |
2675.764us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs |
607.200s |
5922.193us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_ast_rng_req |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_ast_rng_req |
105.720s |
2675.764us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_csrng |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
1027.760s |
6689.004us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_kat_test |
135.260s |
3022.672us |
1 |
1 |
100.00
|
| chip_sw_flash_init |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1157.240s |
20062.487us |
1 |
1 |
100.00
|
| chip_sw_flash_host_access |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_access |
597.980s |
4973.898us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
568.020s |
5964.429us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_ops |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_ops |
343.240s |
3563.463us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en |
313.320s |
3469.860us |
1 |
1 |
100.00
|
| chip_sw_flash_rma_unlocked |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3643.650s |
42691.677us |
1 |
1 |
100.00
|
| chip_sw_flash_scramble |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1157.240s |
20062.487us |
1 |
1 |
100.00
|
| chip_sw_flash_idle_low_power |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_idle_low_power |
215.040s |
2955.216us |
1 |
1 |
100.00
|
| chip_sw_flash_keymgr_seeds |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1303.360s |
10560.049us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_creator_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
347.230s |
6073.942us |
1 |
1 |
100.00
|
| chip_sw_flash_creator_seed_wipe_on_rma |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3643.650s |
42691.677us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_owner_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
347.230s |
6073.942us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
347.230s |
6073.942us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_wr_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
347.230s |
6073.942us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_seed_hw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
347.230s |
6073.942us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_escalate_en |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
306.640s |
5228.165us |
1 |
1 |
100.00
|
| chip_sw_flash_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
228.940s |
7801.368us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_clock_freqs |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_clock_freqs |
562.040s |
5194.957us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
362.640s |
5584.669us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_write_clear |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
362.640s |
5584.669us |
1 |
1 |
100.00
|
| chip_sw_hmac_enc |
2 |
2 |
100.00 |
|
chip_sw_hmac_enc |
166.700s |
2901.458us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
148.280s |
3068.262us |
1 |
1 |
100.00
|
| chip_sw_hmac_idle |
1 |
1 |
100.00 |
|
chip_sw_hmac_enc_idle |
158.380s |
2982.242us |
1 |
1 |
100.00
|
| chip_sw_hmac_all_configurations |
1 |
1 |
100.00 |
|
chip_sw_hmac_oneshot |
701.360s |
5898.192us |
1 |
1 |
100.00
|
| chip_sw_hmac_multistream_mode |
1 |
1 |
100.00 |
|
chip_sw_hmac_multistream |
753.350s |
5419.849us |
1 |
1 |
100.00
|
| chip_sw_i2c_host_tx_rx |
3 |
3 |
100.00 |
|
chip_sw_i2c_host_tx_rx |
395.180s |
4800.898us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx1 |
453.350s |
5080.901us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx2 |
372.010s |
5208.605us |
1 |
1 |
100.00
|
| chip_sw_i2c_device_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_i2c_device_tx_rx |
236.270s |
3667.336us |
1 |
1 |
100.00
|
| chip_sw_keymgr_key_derivation |
2 |
2 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1303.360s |
10560.049us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1408.600s |
11064.375us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_kmac |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_kmac |
1025.950s |
8694.083us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_aes |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1305.630s |
10815.114us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_otbn |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_otbn |
2826.140s |
16762.913us |
1 |
1 |
100.00
|
| chip_sw_kmac_enc |
3 |
3 |
100.00 |
|
chip_sw_kmac_mode_cshake |
116.950s |
2839.827us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac |
188.200s |
2514.159us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
161.950s |
2808.170us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_keymgr |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1303.360s |
10560.049us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_lc |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
388.400s |
8997.748us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_rom |
1 |
1 |
100.00 |
|
chip_sw_kmac_app_rom |
132.490s |
2547.059us |
1 |
1 |
100.00
|
| chip_sw_kmac_entropy |
1 |
1 |
100.00 |
|
chip_sw_kmac_entropy |
830.010s |
6036.559us |
1 |
1 |
100.00
|
| chip_sw_kmac_idle |
1 |
1 |
100.00 |
|
chip_sw_kmac_idle |
119.450s |
2227.047us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_alert_handler_escalation |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
235.040s |
5357.266us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_jtag_access |
3 |
3 |
100.00 |
|
chip_tap_straps_dev |
77.270s |
1951.689us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
315.470s |
6379.957us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
914.620s |
14428.704us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_otp_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
127.800s |
2680.728us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
388.400s |
8997.748us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_transitions |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
388.400s |
8997.748us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_kmac_req |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
388.400s |
8997.748us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_key_div |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation_prod |
1438.210s |
10828.405us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_broadcast |
20 |
22 |
90.91 |
|
chip_prim_tl_access |
228.940s |
7801.368us |
1 |
1 |
100.00
|
|
chip_rv_dm_lc_disabled |
148.490s |
5349.788us |
0 |
1 |
0.00
|
|
chip_sw_flash_ctrl_lc_rw_en |
347.230s |
6073.942us |
1 |
1 |
100.00
|
|
chip_sw_flash_rma_unlocked |
3643.650s |
42691.677us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
211.720s |
3864.018us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
543.280s |
7194.550us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
399.480s |
4646.340us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
389.200s |
6051.204us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
388.400s |
8997.748us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1303.360s |
10560.049us |
1 |
1 |
100.00
|
|
chip_sw_rom_ctrl_integrity_check |
328.790s |
8993.630us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_execution_main |
472.380s |
7352.937us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_lc |
432.910s |
8100.175us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
377.620s |
4116.991us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
384.710s |
4590.187us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
393.460s |
4184.371us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
347.150s |
4634.116us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
339.000s |
4436.225us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
386.060s |
5030.978us |
1 |
1 |
100.00
|
|
chip_tap_straps_dev |
77.270s |
1951.689us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
315.470s |
6379.957us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
914.620s |
14428.704us |
1 |
1 |
100.00
|
| chip_lc_scrap |
4 |
4 |
100.00 |
|
chip_sw_lc_ctrl_rma_to_scrap |
148.490s |
3252.318us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_raw_to_scrap |
103.170s |
3598.454us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_test_locked0_to_scrap |
86.390s |
3644.615us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_rand_to_scrap |
74.110s |
2698.357us |
1 |
1 |
100.00
|
| chip_lc_test_locked |
1 |
2 |
50.00 |
|
chip_rv_dm_lc_disabled |
148.490s |
5349.788us |
0 |
1 |
0.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1443.370s |
27230.619us |
1 |
1 |
100.00
|
| chip_sw_lc_walkthrough |
5 |
5 |
100.00 |
|
chip_sw_lc_walkthrough_dev |
3809.600s |
49186.049us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prod |
3451.490s |
46738.524us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prodend |
487.570s |
10279.974us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_rma |
3663.960s |
47078.590us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1443.370s |
27230.619us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_volatile_raw_unlock |
3 |
3 |
100.00 |
|
chip_sw_lc_ctrl_volatile_raw_unlock |
72.500s |
2648.277us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz |
67.740s |
2844.644us |
1 |
1 |
100.00
|
|
rom_volatile_raw_unlock |
69.420s |
2479.364us |
1 |
1 |
100.00
|
| chip_sw_otbn_op |
2 |
2 |
100.00 |
|
chip_sw_otbn_ecdsa_op_irq |
3222.050s |
16881.394us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3283.680s |
18221.990us |
1 |
1 |
100.00
|
| chip_sw_otbn_rnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
520.150s |
6687.955us |
1 |
1 |
100.00
|
| chip_sw_otbn_urnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
520.150s |
6687.955us |
1 |
1 |
100.00
|
| chip_sw_otbn_idle |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
520.150s |
6687.955us |
1 |
1 |
100.00
|
| chip_sw_otbn_mem_scramble |
1 |
1 |
100.00 |
|
chip_sw_otbn_mem_scramble |
296.890s |
3869.035us |
1 |
1 |
100.00
|
| chip_otp_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
388.400s |
8997.748us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_keys |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1157.240s |
20062.487us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
296.890s |
3869.035us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1303.360s |
10560.049us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
359.160s |
4651.707us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
170.390s |
3140.830us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_entropy |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1157.240s |
20062.487us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
296.890s |
3869.035us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1303.360s |
10560.049us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
359.160s |
4651.707us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
170.390s |
3140.830us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
388.400s |
8997.748us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program_error |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_program_error |
285.440s |
4497.184us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
127.800s |
2680.728us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_lc_signals |
5 |
6 |
83.33 |
|
chip_prim_tl_access |
228.940s |
7801.368us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
211.720s |
3864.018us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
543.280s |
7194.550us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
399.480s |
4646.340us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
389.200s |
6051.204us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
388.400s |
8997.748us |
1 |
1 |
100.00
|
| chip_sw_otp_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
228.940s |
7801.368us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_dai_lock |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_dai_lock |
803.920s |
7157.493us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_external_full_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
326.190s |
9291.144us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_wake_ups |
1111.670s |
27803.020us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_normal_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_wake_ups |
256.630s |
6857.864us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_por_reset |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_deep_sleep_por_reset |
251.230s |
6584.530us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_por_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_por_reset |
271.060s |
6664.010us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_all_wake_ups |
674.260s |
20573.970us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
1 |
2 |
50.00 |
|
chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
894.350s |
14788.021us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_wdog_bite_reset |
334.270s |
7373.420us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
653.090s |
10726.898us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_wdog_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_wdog_reset |
344.020s |
4088.363us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_aon_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
326.190s |
9291.144us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_main_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_main_power_glitch_reset |
221.430s |
4705.120us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_power_glitch_reset |
1656.890s |
31020.005us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
299.140s |
6165.835us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_power_glitch_reset |
263.730s |
5587.059us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_reset_reqs |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1518.820s |
22947.105us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
756.870s |
7612.753us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_all_reset_reqs |
795.080s |
9498.116us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_b2b_sleep_reset_req |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_b2b_sleep_reset_req |
1535.340s |
27144.049us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_disabled |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_disabled |
183.570s |
3359.742us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
306.640s |
5228.165us |
1 |
1 |
100.00
|
| chip_sw_rom_access |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
328.790s |
8993.630us |
1 |
1 |
100.00
|
| chip_sw_rom_ctrl_integrity_check |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
328.790s |
8993.630us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_non_sys_reset_info |
3 |
4 |
75.00 |
|
chip_sw_pwrmgr_all_reset_reqs |
795.080s |
9498.116us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1518.820s |
22947.105us |
0 |
1 |
0.00
|
|
chip_sw_pwrmgr_wdog_reset |
344.020s |
4088.363us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
252.550s |
6516.588us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sys_reset_info |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
270.990s |
4261.315us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_cpu_info |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
234.210s |
3940.833us |
0 |
1 |
0.00
|
| chip_sw_rstmgr_sw_req_reset |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_req |
211.620s |
3977.410us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_info |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
1002.210s |
14433.798us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sw_rst |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_rst |
136.740s |
3016.503us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
306.640s |
5228.165us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_handler_reset_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
934.620s |
7702.360us |
1 |
1 |
100.00
|
| chip_sw_nmi_irq |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_nmi_irq |
491.620s |
4791.550us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_rnd |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_rnd |
502.160s |
4637.920us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_address_translation |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_address_translation |
177.720s |
2957.328us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_icache_scrambled_access |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_icache_invalidate |
170.390s |
3140.830us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_fault_dump |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
234.210s |
3940.833us |
0 |
1 |
0.00
|
| chip_sw_rv_core_ibex_double_fault |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
234.210s |
3940.833us |
0 |
1 |
0.00
|
| chip_jtag_csr_rw |
1 |
1 |
100.00 |
|
chip_jtag_csr_rw |
1074.780s |
17336.617us |
1 |
1 |
100.00
|
| chip_jtag_mem_access |
1 |
1 |
100.00 |
|
chip_jtag_mem_access |
803.080s |
13645.661us |
1 |
1 |
100.00
|
| chip_rv_dm_ndm_reset_req |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
270.990s |
4261.315us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
309.670s |
5122.523us |
1 |
1 |
100.00
|
| chip_rv_dm_access_after_wakeup |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_access_after_wakeup |
217.880s |
5383.171us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_jtag_tap_sel |
1 |
1 |
100.00 |
|
chip_tap_straps_rma |
315.470s |
6379.957us |
1 |
1 |
100.00
|
| chip_rv_dm_lc_disabled |
0 |
1 |
0.00 |
|
chip_rv_dm_lc_disabled |
148.490s |
5349.788us |
0 |
1 |
0.00
|
| chip_sw_plic_all_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
553.990s |
5206.607us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
265.100s |
3535.569us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
373.870s |
4175.237us |
1 |
1 |
100.00
|
| chip_sw_plic_sw_irq |
1 |
1 |
100.00 |
|
chip_sw_plic_sw_irq |
166.090s |
3076.150us |
1 |
1 |
100.00
|
| chip_sw_timer |
1 |
1 |
100.00 |
|
chip_sw_rv_timer_irq |
125.780s |
2351.092us |
1 |
1 |
100.00
|
| chip_sw_spi_device_flash_mode |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2349.670s |
14750.366us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through |
1 |
1 |
100.00 |
|
chip_sw_spi_device_pass_through |
475.890s |
8068.436us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through_collision |
0 |
1 |
0.00 |
|
chip_sw_spi_device_pass_through_collision |
185.890s |
2554.384us |
0 |
1 |
0.00
|
| chip_sw_spi_device_tpm |
1 |
1 |
100.00 |
|
chip_sw_spi_device_tpm |
218.080s |
3888.053us |
1 |
1 |
100.00
|
| chip_sw_spi_host_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_spi_host_tx_rx |
190.270s |
2612.172us |
1 |
1 |
100.00
|
| chip_sw_sram_scrambled_access |
2 |
2 |
100.00 |
|
chip_sw_sram_ctrl_scrambled_access |
359.160s |
4651.707us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
279.570s |
4805.356us |
1 |
1 |
100.00
|
| chip_sw_sleep_sram_ret_contents |
2 |
2 |
100.00 |
|
chip_sw_sleep_sram_ret_contents_no_scramble |
365.960s |
7928.332us |
1 |
1 |
100.00
|
|
chip_sw_sleep_sram_ret_contents_scramble |
416.100s |
7990.380us |
1 |
1 |
100.00
|
| chip_sw_sram_execution |
1 |
1 |
100.00 |
|
chip_sw_sram_ctrl_execution_main |
472.380s |
7352.937us |
1 |
1 |
100.00
|
| chip_sw_sram_lc_escalation |
2 |
2 |
100.00 |
|
chip_sw_all_escalation_resets |
306.640s |
5228.165us |
1 |
1 |
100.00
|
|
chip_sw_data_integrity_escalation |
433.260s |
5808.484us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
756.870s |
7612.753us |
1 |
1 |
100.00
|
|
chip_sw_sysrst_ctrl_reset |
1031.030s |
21414.272us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_inputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_inputs |
185.660s |
2446.527us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_outputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_outputs |
189.630s |
3401.683us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_in_irq |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_in_irq |
321.510s |
4854.357us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
1031.030s |
21414.272us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_reset |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
1031.030s |
21414.272us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_ec_rst_l |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
740.900s |
12584.231us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_flash_wp_l |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
740.900s |
12584.231us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_ulp_z3_wakeup |
1 |
2 |
50.00 |
|
chip_sw_sysrst_ctrl_ulp_z3_wakeup |
273.880s |
5604.063us |
1 |
1 |
100.00
|
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2995.090s |
35527.505us |
0 |
1 |
0.00
|
| chip_sw_usbdev_vbus |
1 |
1 |
100.00 |
|
chip_sw_usbdev_vbus |
173.330s |
2755.254us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pullup |
157.820s |
3298.488us |
1 |
1 |
100.00
|
| chip_sw_usbdev_aon_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_aon_pullup |
327.640s |
3492.779us |
1 |
1 |
100.00
|
| chip_sw_usbdev_setup_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_setuprx |
278.200s |
4344.213us |
1 |
1 |
100.00
|
| chip_sw_usbdev_config_host |
1 |
1 |
100.00 |
|
chip_sw_usbdev_config_host |
1039.830s |
7781.254us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pincfg |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pincfg |
4913.930s |
31995.898us |
1 |
1 |
100.00
|
| chip_sw_usbdev_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_dpi |
1853.300s |
12025.195us |
1 |
1 |
100.00
|
| chip_sw_usbdev_toggle_restore |
1 |
1 |
100.00 |
|
chip_sw_usbdev_toggle_restore |
138.140s |
2808.769us |
1 |
1 |
100.00
|