Simulation Results: i2c

 
02/12/2025 19:22:53 sha: 06584dc json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 85.33 %
  • code
  • 81.16 %
  • assert
  • 93.02 %
  • func
  • 81.82 %
  • line
  • 96.01 %
  • branch
  • 91.98 %
  • cond
  • 85.31 %
  • toggle
  • 89.66 %
  • FSM
  • 42.86 %
Validation stages
V1
100.00%
V2
87.76%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
host_smoke 1 1 100.00
i2c_host_smoke 38.310s 17758.017us 1 1 100.00
target_smoke 1 1 100.00
i2c_target_smoke 14.020s 2712.757us 1 1 100.00
csr_hw_reset 1 1 100.00
i2c_csr_hw_reset 0.800s 212.249us 1 1 100.00
csr_rw 1 1 100.00
i2c_csr_rw 0.760s 49.982us 1 1 100.00
csr_bit_bash 1 1 100.00
i2c_csr_bit_bash 3.230s 599.621us 1 1 100.00
csr_aliasing 1 1 100.00
i2c_csr_aliasing 1.180s 73.024us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
i2c_csr_mem_rw_with_rand_reset 1.140s 27.990us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
i2c_csr_rw 0.760s 49.982us 1 1 100.00
i2c_csr_aliasing 1.180s 73.024us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_error_intr 0 1 0.00
i2c_host_error_intr 0.810s 9.084us 0 1 0.00
host_stress_all 0 1 0.00
i2c_host_stress_all 3.180s 298.781us 0 1 0.00
host_maxperf 1 1 100.00
i2c_host_perf 314.090s 12101.342us 1 1 100.00
host_override 1 1 100.00
i2c_host_override 0.770s 48.635us 1 1 100.00
host_fifo_watermark 1 1 100.00
i2c_host_fifo_watermark 48.900s 3467.378us 1 1 100.00
host_fifo_overflow 1 1 100.00
i2c_host_fifo_overflow 37.280s 8580.581us 1 1 100.00
host_fifo_reset 3 3 100.00
i2c_host_fifo_reset_fmt 0.910s 508.762us 1 1 100.00
i2c_host_fifo_fmt_empty 11.520s 1311.005us 1 1 100.00
i2c_host_fifo_reset_rx 2.370s 148.833us 1 1 100.00
host_fifo_full 1 1 100.00
i2c_host_fifo_full 99.220s 7685.187us 1 1 100.00
host_timeout 1 1 100.00
i2c_host_stretch_timeout 5.680s 1543.365us 1 1 100.00
i2c_host_mode_toggle 0 1 0.00
i2c_host_mode_toggle 2.520s 133.394us 0 1 0.00
target_glitch 0 1 0.00
i2c_target_glitch 2.250s 470.834us 0 1 0.00
target_stress_all 1 1 100.00
i2c_target_stress_all 317.860s 25368.538us 1 1 100.00
target_maxperf 1 1 100.00
i2c_target_perf 3.780s 12153.782us 1 1 100.00
target_fifo_empty 2 2 100.00
i2c_target_stress_rd 9.890s 642.028us 1 1 100.00
i2c_target_intr_smoke 3.380s 721.640us 1 1 100.00
target_fifo_reset 2 2 100.00
i2c_target_fifo_reset_acq 1.720s 248.147us 1 1 100.00
i2c_target_fifo_reset_tx 2.020s 1063.350us 1 1 100.00
target_fifo_full 3 3 100.00
i2c_target_stress_wr 24.250s 17736.266us 1 1 100.00
i2c_target_stress_rd 9.890s 642.028us 1 1 100.00
i2c_target_intr_stress_wr 24.330s 17456.292us 1 1 100.00
target_timeout 1 1 100.00
i2c_target_timeout 4.710s 1212.454us 1 1 100.00
target_clock_stretch 0 1 0.00
i2c_target_stretch 3.590s 10046.960us 0 1 0.00
bad_address 1 1 100.00
i2c_target_bad_addr 2.480s 1477.896us 1 1 100.00
target_mode_glitch 0 1 0.00
i2c_target_hrst 20.690s 10003.009us 0 1 0.00
target_fifo_watermark 2 2 100.00
i2c_target_fifo_watermarks_acq 2.090s 1767.295us 1 1 100.00
i2c_target_fifo_watermarks_tx 0.990s 158.595us 1 1 100.00
host_mode_config_perf 2 2 100.00
i2c_host_perf 314.090s 12101.342us 1 1 100.00
i2c_host_perf_precise 39.490s 1456.229us 1 1 100.00
host_mode_clock_stretching 1 1 100.00
i2c_host_stretch_timeout 5.680s 1543.365us 1 1 100.00
target_mode_tx_stretch_ctrl 1 1 100.00
i2c_target_tx_stretch_ctrl 1.320s 63.224us 1 1 100.00
target_mode_nack_generation 3 3 100.00
i2c_target_nack_acqfull 2.230s 1115.421us 1 1 100.00
i2c_target_nack_acqfull_addr 1.860s 514.810us 1 1 100.00
i2c_target_nack_txstretch 1.080s 486.677us 1 1 100.00
host_mode_halt_on_nak 1 1 100.00
i2c_host_may_nack 3.600s 1272.912us 1 1 100.00
target_mode_smbus_maxlen 1 1 100.00
i2c_target_smbus_maxlen 1.610s 2098.956us 1 1 100.00
alert_test 1 1 100.00
i2c_alert_test 0.640s 21.580us 1 1 100.00
intr_test 1 1 100.00
i2c_intr_test 0.850s 16.909us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
i2c_tl_errors 1.970s 127.884us 1 1 100.00
tl_d_illegal_access 1 1 100.00
i2c_tl_errors 1.970s 127.884us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
i2c_csr_hw_reset 0.800s 212.249us 1 1 100.00
i2c_csr_rw 0.760s 49.982us 1 1 100.00
i2c_csr_aliasing 1.180s 73.024us 1 1 100.00
i2c_same_csr_outstanding 1.000s 105.126us 1 1 100.00
tl_d_partial_access 4 4 100.00
i2c_csr_hw_reset 0.800s 212.249us 1 1 100.00
i2c_csr_rw 0.760s 49.982us 1 1 100.00
i2c_csr_aliasing 1.180s 73.024us 1 1 100.00
i2c_same_csr_outstanding 1.000s 105.126us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
i2c_tl_intg_err 1.600s 157.265us 1 1 100.00
i2c_sec_cm 0.850s 41.083us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
i2c_tl_intg_err 1.600s 157.265us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_stress_all_with_rand_reset 0 1 0.00
i2c_host_stress_all_with_rand_reset 6.000s 2434.243us 0 1 0.00
target_error_intr 0 1 0.00
i2c_target_unexp_stop 1.110s 73.811us 0 1 0.00
target_stress_all_with_rand_reset 0 1 0.00
i2c_target_stress_all_with_rand_reset 5.410s 2514.728us 0 1 0.00