Simulation Results: keymgr

 
02/12/2025 19:22:53 sha: 06584dc json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.99 %
  • code
  • 95.90 %
  • assert
  • 97.26 %
  • func
  • 67.80 %
  • line
  • 98.78 %
  • branch
  • 97.94 %
  • cond
  • 94.32 %
  • toggle
  • 97.76 %
  • FSM
  • 90.70 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 1.340s 81.107us 1 1 100.00
random 1 1 100.00
keymgr_random 3.820s 130.424us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 0.940s 23.984us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 1.020s 23.058us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 4.450s 721.292us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 10.040s 815.550us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 2.090s 86.240us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 1.020s 23.058us 1 1 100.00
keymgr_csr_aliasing 10.040s 815.550us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 2.850s 61.821us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 1.710s 41.598us 1 1 100.00
keymgr_sideload_kmac 2.550s 84.416us 1 1 100.00
keymgr_sideload_aes 1.890s 48.202us 1 1 100.00
keymgr_sideload_otbn 1.580s 92.372us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 1.860s 58.518us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 1.900s 144.141us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 1.750s 104.828us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 50.060s 6830.734us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 3.870s 559.985us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.390s 96.695us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 24.020s 15120.844us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.870s 13.048us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.830s 82.909us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 1.110s 81.814us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 1.110s 81.814us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 0.940s 23.984us 1 1 100.00
keymgr_csr_rw 1.020s 23.058us 1 1 100.00
keymgr_csr_aliasing 10.040s 815.550us 1 1 100.00
keymgr_same_csr_outstanding 1.430s 67.708us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 0.940s 23.984us 1 1 100.00
keymgr_csr_rw 1.020s 23.058us 1 1 100.00
keymgr_csr_aliasing 10.040s 815.550us 1 1 100.00
keymgr_same_csr_outstanding 1.430s 67.708us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 4.870s 334.269us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 4.870s 334.269us 1 1 100.00
keymgr_tl_intg_err 6.100s 817.449us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 2.780s 207.838us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 2.780s 207.838us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 2.780s 207.838us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 2.780s 207.838us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 5.500s 185.575us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 4.870s 334.269us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 4.870s 334.269us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 6.100s 817.449us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 2.780s 207.838us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 2.850s 61.821us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 3.820s 130.424us 1 1 100.00
keymgr_csr_rw 1.020s 23.058us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 3.820s 130.424us 1 1 100.00
keymgr_csr_rw 1.020s 23.058us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 3.820s 130.424us 1 1 100.00
keymgr_csr_rw 1.020s 23.058us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 1.900s 144.141us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.870s 559.985us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.870s 559.985us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 3.820s 130.424us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 1.920s 133.051us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.870s 334.269us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.870s 334.269us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 4.870s 334.269us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 2.220s 71.234us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 1.900s 144.141us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 4.870s 334.269us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.870s 334.269us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 4.870s 334.269us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.220s 71.234us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.220s 71.234us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 4.870s 334.269us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.220s 71.234us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.870s 334.269us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 2.220s 71.234us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 8.020s 246.236us 1 1 100.00