Simulation Results: otp_ctrl

 
02/12/2025 19:22:53 sha: 06584dc json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 79.25 %
  • code
  • 75.68 %
  • assert
  • 93.84 %
  • func
  • 68.24 %
  • line
  • 88.17 %
  • branch
  • 83.03 %
  • cond
  • 89.47 %
  • toggle
  • 76.23 %
  • FSM
  • 41.49 %
Validation stages
V1
100.00%
V2
84.00%
V2S
92.86%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 2.170s 803.497us 1 1 100.00
smoke 1 1 100.00
otp_ctrl_smoke 4.830s 2718.454us 1 1 100.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 2.070s 407.687us 1 1 100.00
csr_rw 1 1 100.00
otp_ctrl_csr_rw 1.650s 41.324us 1 1 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 8.240s 6287.535us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 2.960s 195.504us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otp_ctrl_csr_mem_rw_with_rand_reset 2.780s 1735.790us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otp_ctrl_csr_rw 1.650s 41.324us 1 1 100.00
otp_ctrl_csr_aliasing 2.960s 195.504us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 1.240s 63.452us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 1.520s 144.087us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 1 1 100.00
otp_ctrl_partition_walk 12.280s 1233.285us 1 1 100.00
init_fail 1 1 100.00
otp_ctrl_init_fail 3.320s 140.674us 1 1 100.00
partition_check 0 2 0.00
otp_ctrl_background_chks 22.860s 11201.316us 0 1 0.00
otp_ctrl_check_fail 2.260s 113.433us 0 1 0.00
regwen_during_otp_init 1 1 100.00
otp_ctrl_regwen 4.230s 156.932us 1 1 100.00
partition_lock 1 1 100.00
otp_ctrl_dai_lock 8.290s 637.814us 1 1 100.00
interface_key_check 1 1 100.00
otp_ctrl_parallel_key_req 31.070s 11552.629us 1 1 100.00
lc_interactions 2 2 100.00
otp_ctrl_parallel_lc_req 12.310s 8012.818us 1 1 100.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
otp_dai_errors 1 1 100.00
otp_ctrl_dai_errs 11.930s 739.358us 1 1 100.00
otp_macro_errors 0 1 0.00
otp_ctrl_macro_errs 2.270s 118.727us 0 1 0.00
test_access 1 1 100.00
otp_ctrl_test_access 17.620s 1214.083us 1 1 100.00
stress_all 0 1 0.00
otp_ctrl_stress_all 45.350s 8103.729us 0 1 0.00
intr_test 1 1 100.00
otp_ctrl_intr_test 1.130s 43.143us 1 1 100.00
alert_test 1 1 100.00
otp_ctrl_alert_test 2.350s 654.863us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otp_ctrl_tl_errors 2.180s 171.288us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otp_ctrl_tl_errors 2.180s 171.288us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otp_ctrl_csr_hw_reset 2.070s 407.687us 1 1 100.00
otp_ctrl_csr_rw 1.650s 41.324us 1 1 100.00
otp_ctrl_csr_aliasing 2.960s 195.504us 1 1 100.00
otp_ctrl_same_csr_outstanding 1.900s 56.619us 1 1 100.00
tl_d_partial_access 4 4 100.00
otp_ctrl_csr_hw_reset 2.070s 407.687us 1 1 100.00
otp_ctrl_csr_rw 1.650s 41.324us 1 1 100.00
otp_ctrl_csr_aliasing 2.960s 195.504us 1 1 100.00
otp_ctrl_same_csr_outstanding 1.900s 56.619us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
tl_intg_err 2 2 100.00
otp_ctrl_tl_intg_err 7.840s 662.396us 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
prim_count_check 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
prim_fsm_check 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otp_ctrl_tl_intg_err 7.840s 662.396us 1 1 100.00
sec_cm_secret_mem_scramble 1 1 100.00
otp_ctrl_smoke 4.830s 2718.454us 1 1 100.00
sec_cm_part_mem_digest 1 1 100.00
otp_ctrl_smoke 4.830s 2718.454us 1 1 100.00
sec_cm_dai_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_kdi_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_lci_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_part_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_scrmbl_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_timer_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_dai_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_kdi_seed_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_kdi_entropy_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_lci_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_part_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_scrmbl_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_timer_integ_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_timer_cnsty_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_timer_lfsr_redun 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_dai_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_lci_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
sec_cm_kdi_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
sec_cm_part_fsm_local_esc 1 2 50.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
otp_ctrl_macro_errs 2.270s 118.727us 0 1 0.00
sec_cm_scrmbl_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
sec_cm_timer_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_dai_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_lci_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
sec_cm_kdi_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
sec_cm_part_fsm_global_esc 1 2 50.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
otp_ctrl_macro_errs 2.270s 118.727us 0 1 0.00
sec_cm_scrmbl_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
sec_cm_timer_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 8.050s 5143.901us 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_part_data_reg_integrity 1 1 100.00
otp_ctrl_init_fail 3.320s 140.674us 1 1 100.00
sec_cm_part_data_reg_bkgn_chk 0 1 0.00
otp_ctrl_check_fail 2.260s 113.433us 0 1 0.00
sec_cm_part_mem_regren 1 1 100.00
otp_ctrl_dai_lock 8.290s 637.814us 1 1 100.00
sec_cm_part_mem_sw_unreadable 1 1 100.00
otp_ctrl_dai_lock 8.290s 637.814us 1 1 100.00
sec_cm_part_mem_sw_unwritable 1 1 100.00
otp_ctrl_dai_lock 8.290s 637.814us 1 1 100.00
sec_cm_lc_part_mem_sw_noaccess 1 1 100.00
otp_ctrl_dai_lock 8.290s 637.814us 1 1 100.00
sec_cm_access_ctrl_mubi 1 1 100.00
otp_ctrl_dai_lock 8.290s 637.814us 1 1 100.00
sec_cm_token_valid_ctrl_mubi 1 1 100.00
otp_ctrl_smoke 4.830s 2718.454us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
otp_ctrl_dai_lock 8.290s 637.814us 1 1 100.00
sec_cm_test_bus_lc_gated 1 1 100.00
otp_ctrl_smoke 4.830s 2718.454us 1 1 100.00
sec_cm_test_tl_lc_gate_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 115.870s 12047.754us 1 1 100.00
sec_cm_direct_access_config_regwen 1 1 100.00
otp_ctrl_regwen 4.230s 156.932us 1 1 100.00
sec_cm_check_trigger_config_regwen 1 1 100.00
otp_ctrl_smoke 4.830s 2718.454us 1 1 100.00
sec_cm_check_config_regwen 1 1 100.00
otp_ctrl_smoke 4.830s 2718.454us 1 1 100.00
sec_cm_macro_mem_integrity 0 1 0.00
otp_ctrl_macro_errs 2.270s 118.727us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 1 1 100.00
otp_ctrl_low_freq_read 14.020s 7633.556us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
otp_ctrl_stress_all_with_rand_reset 1.360s 53.168us 0 1 0.00