| chip_pin_mux |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
106.480s |
3614.152us |
1 |
1 |
100.00
|
| chip_padctrl_attributes |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
106.480s |
3614.152us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_mio_dio_val |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_mio_dio_val |
145.470s |
2978.638us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_wake |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_wake |
159.130s |
2818.768us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_retention |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_retention |
189.920s |
4141.374us |
1 |
1 |
100.00
|
| chip_sw_tap_strap_sampling |
4 |
4 |
100.00 |
|
chip_tap_straps_dev |
799.440s |
13645.018us |
1 |
1 |
100.00
|
|
chip_tap_straps_testunlock0 |
111.740s |
2271.652us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
281.530s |
5647.257us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
75.760s |
2811.519us |
1 |
1 |
100.00
|
| chip_sw_pattgen_ios |
1 |
1 |
100.00 |
|
chip_sw_pattgen_ios |
109.640s |
2652.251us |
1 |
1 |
100.00
|
| chip_sw_sleep_pwm_pulses |
1 |
1 |
100.00 |
|
chip_sw_sleep_pwm_pulses |
906.560s |
9198.696us |
1 |
1 |
100.00
|
| chip_sw_data_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
351.450s |
6149.753us |
1 |
1 |
100.00
|
| chip_sw_instruction_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
351.450s |
6149.753us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_outputs |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
543.870s |
7728.234us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_rst_inputs |
0 |
1 |
0.00 |
|
chip_sw_ast_clk_rst_inputs |
2029.440s |
21522.673us |
0 |
1 |
0.00
|
| chip_sw_ast_sys_clk_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
355.010s |
3824.927us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
585.980s |
6186.631us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3213.860s |
18420.653us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
153.600s |
3409.431us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
699.910s |
6772.034us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
169.100s |
3476.701us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
771.920s |
8189.071us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
188.540s |
2480.768us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
378.300s |
5480.350us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
136.020s |
2370.225us |
1 |
1 |
100.00
|
| chip_sw_ast_usb_clk_calib |
1 |
1 |
100.00 |
|
chip_sw_usb_ast_clk_calib |
233.950s |
3439.690us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_alerts |
2 |
2 |
100.00 |
|
chip_sw_sensor_ctrl_alert |
532.680s |
7150.787us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
267.610s |
4656.711us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_status |
1 |
1 |
100.00 |
|
chip_sw_sensor_ctrl_status |
170.990s |
3355.451us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
267.610s |
4656.711us |
1 |
1 |
100.00
|
| chip_sw_smoketest |
17 |
17 |
100.00 |
|
chip_sw_flash_scrambling_smoketest |
162.830s |
2764.591us |
1 |
1 |
100.00
|
|
chip_sw_aes_smoketest |
136.990s |
3034.314us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_smoketest |
208.910s |
3586.904us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_smoketest |
149.540s |
2658.209us |
1 |
1 |
100.00
|
|
chip_sw_csrng_smoketest |
139.890s |
2474.999us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_smoketest |
866.140s |
7989.842us |
1 |
1 |
100.00
|
|
chip_sw_gpio_smoketest |
136.820s |
2870.677us |
1 |
1 |
100.00
|
|
chip_sw_hmac_smoketest |
194.890s |
3160.155us |
1 |
1 |
100.00
|
|
chip_sw_kmac_smoketest |
228.910s |
3858.658us |
1 |
1 |
100.00
|
|
chip_sw_otbn_smoketest |
1009.740s |
8800.881us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
227.670s |
5659.407us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_usbdev_smoketest |
215.290s |
4801.292us |
1 |
1 |
100.00
|
|
chip_sw_rv_plic_smoketest |
127.630s |
2733.618us |
1 |
1 |
100.00
|
|
chip_sw_rv_timer_smoketest |
129.230s |
2851.191us |
1 |
1 |
100.00
|
|
chip_sw_rstmgr_smoketest |
143.810s |
2742.880us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_smoketest |
94.670s |
2600.645us |
1 |
1 |
100.00
|
|
chip_sw_uart_smoketest |
100.040s |
2187.903us |
1 |
1 |
100.00
|
| chip_sw_otp_smoketest |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_smoketest |
115.850s |
3372.894us |
1 |
1 |
100.00
|
| chip_sw_rom_functests |
1 |
1 |
100.00 |
|
rom_keymgr_functest |
260.030s |
3794.860us |
1 |
1 |
100.00
|
| chip_sw_boot |
1 |
1 |
100.00 |
|
chip_sw_uart_tx_rx_bootstrap |
7349.290s |
61864.490us |
1 |
1 |
100.00
|
| chip_sw_secure_boot |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2462.250s |
14564.442us |
1 |
1 |
100.00
|
| chip_sw_rom_raw_unlock |
0 |
1 |
0.00 |
|
rom_raw_unlock |
609.710s |
15795.933us |
0 |
1 |
0.00
|
| chip_sw_power_idle_load |
0 |
1 |
0.00 |
|
chip_sw_power_idle_load |
149.500s |
2601.945us |
0 |
1 |
0.00
|
| chip_sw_power_sleep_load |
0 |
1 |
0.00 |
|
chip_sw_power_sleep_load |
206.250s |
3560.666us |
0 |
1 |
0.00
|
| chip_sw_exit_test_unlocked_bootstrap |
1 |
1 |
100.00 |
|
chip_sw_exit_test_unlocked_bootstrap |
7211.290s |
55153.157us |
1 |
1 |
100.00
|
| chip_sw_inject_scramble_seed |
1 |
1 |
100.00 |
|
chip_sw_inject_scramble_seed |
7117.630s |
55401.786us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
54.930s |
2413.453us |
0 |
1 |
0.00
|
| tl_d_illegal_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
54.930s |
2413.453us |
0 |
1 |
0.00
|
| tl_d_outstanding_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
3796.970s |
31564.624us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
2102.580s |
29836.237us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
214.490s |
5549.461us |
1 |
1 |
100.00
|
|
chip_csr_rw |
237.600s |
4447.360us |
1 |
1 |
100.00
|
| tl_d_partial_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
3796.970s |
31564.624us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
2102.580s |
29836.237us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
214.490s |
5549.461us |
1 |
1 |
100.00
|
|
chip_csr_rw |
237.600s |
4447.360us |
1 |
1 |
100.00
|
| xbar_base_random_sequence |
1 |
1 |
100.00 |
|
xbar_random |
22.910s |
447.339us |
1 |
1 |
100.00
|
| xbar_random_delay |
6 |
6 |
100.00 |
|
xbar_smoke_zero_delays |
4.860s |
46.982us |
1 |
1 |
100.00
|
|
xbar_smoke_large_delays |
43.890s |
6436.729us |
1 |
1 |
100.00
|
|
xbar_smoke_slow_rsp |
47.480s |
5317.816us |
1 |
1 |
100.00
|
|
xbar_random_zero_delays |
32.650s |
618.222us |
1 |
1 |
100.00
|
|
xbar_random_large_delays |
71.870s |
12382.266us |
1 |
1 |
100.00
|
|
xbar_random_slow_rsp |
37.060s |
4357.845us |
1 |
1 |
100.00
|
| xbar_unmapped_address |
2 |
2 |
100.00 |
|
xbar_unmapped_addr |
8.360s |
285.967us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
27.520s |
1020.469us |
1 |
1 |
100.00
|
| xbar_error_cases |
2 |
2 |
100.00 |
|
xbar_error_random |
25.380s |
1162.964us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
27.520s |
1020.469us |
1 |
1 |
100.00
|
| xbar_all_access_same_device |
2 |
2 |
100.00 |
|
xbar_access_same_device |
9.440s |
324.341us |
1 |
1 |
100.00
|
|
xbar_access_same_device_slow_rsp |
61.920s |
5449.594us |
1 |
1 |
100.00
|
| xbar_all_hosts_use_same_source_id |
1 |
1 |
100.00 |
|
xbar_same_source |
43.760s |
2513.993us |
1 |
1 |
100.00
|
| xbar_stress_all |
2 |
2 |
100.00 |
|
xbar_stress_all |
195.280s |
4255.276us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_error |
181.070s |
8803.117us |
1 |
1 |
100.00
|
| xbar_stress_with_reset |
2 |
2 |
100.00 |
|
xbar_stress_all_with_rand_reset |
259.160s |
2029.407us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_reset_error |
52.890s |
416.093us |
1 |
1 |
100.00
|
| rom_e2e_smoke |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2462.250s |
14564.442us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_output |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_output |
2422.150s |
30185.021us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_exception_c |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_exception_c |
2538.990s |
16008.448us |
1 |
1 |
100.00
|
| rom_e2e_boot_policy_valid |
5 |
15 |
33.33 |
|
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 |
2042.760s |
11447.900us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_dev |
2594.540s |
15568.640us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod |
2426.510s |
15886.298us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod_end |
2608.790s |
16268.132us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_rma |
2506.020s |
15109.730us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 |
20.000s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_dev |
20.220s |
10.200us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod |
16.940s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end |
21.920s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_rma |
18.050s |
10.380us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 |
20.460s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_dev |
19.700s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod |
17.510s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end |
19.930s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_rma |
17.950s |
10.180us |
0 |
1 |
0.00
|
| rom_e2e_sigverify_always |
0 |
15 |
0.00 |
|
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 |
18.990s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_dev |
16.810s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod |
19.430s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod_end |
25.060s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_rma |
20.830s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 |
17.470s |
10.380us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_dev |
20.720s |
10.260us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod |
23.440s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end |
20.560s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_rma |
19.340s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 |
21.210s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_dev |
20.660s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod |
17.340s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end |
15.890s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_rma |
20.300s |
10.120us |
0 |
1 |
0.00
|
| rom_e2e_asm_init |
5 |
5 |
100.00 |
|
rom_e2e_asm_init_test_unlocked0 |
1852.680s |
11084.778us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_dev |
2419.940s |
15811.493us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod |
2540.190s |
16369.948us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod_end |
2406.740s |
16079.650us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_rma |
2376.930s |
16238.073us |
1 |
1 |
100.00
|
| rom_e2e_keymgr_init |
2 |
3 |
66.67 |
|
rom_e2e_keymgr_init_rom_ext_meas |
4157.590s |
28883.062us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_no_meas |
4092.340s |
29384.672us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_invalid_meas |
2297.100s |
15827.039us |
0 |
1 |
0.00
|
| rom_e2e_static_critical |
1 |
1 |
100.00 |
|
rom_e2e_static_critical |
2387.800s |
16462.185us |
1 |
1 |
100.00
|
| chip_sw_adc_ctrl_debug_cable_irq |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
3067.320s |
34370.221us |
0 |
1 |
0.00
|
| chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
3067.320s |
34370.221us |
0 |
1 |
0.00
|
| chip_sw_aes_enc |
2 |
2 |
100.00 |
|
chip_sw_aes_enc |
208.400s |
3059.287us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
153.600s |
3409.431us |
1 |
1 |
100.00
|
| chip_sw_aes_entropy |
1 |
1 |
100.00 |
|
chip_sw_aes_entropy |
127.980s |
2618.193us |
1 |
1 |
100.00
|
| chip_sw_aes_idle |
1 |
1 |
100.00 |
|
chip_sw_aes_idle |
106.590s |
2960.037us |
1 |
1 |
100.00
|
| chip_sw_aes_sideload |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
999.490s |
9688.498us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_test |
179.580s |
2951.930us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_escalations |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
236.930s |
4449.130us |
1 |
1 |
100.00
|
| chip_sw_all_escalation_resets |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
396.930s |
5955.291us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
508.970s |
5225.778us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
255.630s |
3615.914us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
359.300s |
4383.880us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_entropy |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_entropy |
219.420s |
3590.364us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_crashdump |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
946.990s |
10722.721us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_timeout |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_timeout |
302.270s |
4779.168us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_sleep_mode_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_alerts |
147.200s |
3112.863us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_sleep_mode_pings |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_pings |
0.000s |
0.000us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_clock_off |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
974.760s |
7292.202us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_reset_toggle |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
977.180s |
7019.104us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_ok |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_ok |
854.960s |
8172.858us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_reverse_ping_in_deep_sleep |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_reverse_ping_in_deep_sleep |
8152.790s |
253914.866us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wakeup_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
218.300s |
4139.605us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_smoketest |
227.670s |
5659.407us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bark_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
218.300s |
4139.605us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
418.540s |
7194.454us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
418.540s |
7194.454us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_sleep_pause |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_sleep_wdog_sleep_pause |
252.960s |
7452.110us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_lc_escalate |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_lc_escalate |
259.540s |
4345.510us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_idle_trans |
4 |
4 |
100.00 |
|
chip_sw_otbn_randomness |
551.150s |
5603.406us |
1 |
1 |
100.00
|
|
chip_sw_aes_idle |
106.590s |
2960.037us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_idle |
160.310s |
2516.678us |
1 |
1 |
100.00
|
|
chip_sw_kmac_idle |
173.320s |
3186.388us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_trans |
4 |
4 |
100.00 |
|
chip_sw_clkmgr_off_aes_trans |
306.700s |
3432.641us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_hmac_trans |
202.780s |
4221.285us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_kmac_trans |
161.060s |
3724.900us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_otbn_trans |
295.980s |
4260.339us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_peri |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_off_peri |
898.260s |
11709.950us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_div |
7 |
7 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
397.850s |
3786.647us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
337.700s |
4406.891us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
345.540s |
3707.397us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
386.730s |
4618.051us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
385.340s |
3970.915us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
376.220s |
4265.158us |
1 |
1 |
100.00
|
|
chip_sw_ast_clk_outputs |
543.870s |
7728.234us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_lc |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_lc |
341.260s |
7329.204us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_sw |
2 |
2 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
345.540s |
3707.397us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
386.730s |
4618.051us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
355.010s |
3824.927us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
585.980s |
6186.631us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3213.860s |
18420.653us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
153.600s |
3409.431us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
699.910s |
6772.034us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
169.100s |
3476.701us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
771.920s |
8189.071us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
188.540s |
2480.768us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
378.300s |
5480.350us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
136.020s |
2370.225us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_extended_range |
11 |
11 |
100.00 |
|
chip_sw_clkmgr_jitter_reduced_freq |
99.350s |
2747.608us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq |
355.100s |
4730.691us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en_reduced_freq |
667.040s |
7078.583us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq |
2978.080s |
24581.881us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en_reduced_freq |
123.330s |
2269.336us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en_reduced_freq |
130.150s |
2859.383us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq |
465.840s |
6646.820us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq |
200.180s |
3491.268us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq |
387.230s |
5191.756us |
1 |
1 |
100.00
|
|
chip_sw_flash_init_reduced_freq |
1074.240s |
21675.560us |
1 |
1 |
100.00
|
|
chip_sw_csrng_edn_concurrency_reduced_freq |
2228.170s |
20047.429us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_deep_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
543.870s |
7728.234us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_sleep_frequency |
392.520s |
5285.591us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_reset_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_reset_frequency |
255.620s |
4161.370us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
396.930s |
5955.291us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_alert_handler_clock_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
974.760s |
7292.202us |
1 |
1 |
100.00
|
| chip_sw_csrng_edn_cmd |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
879.210s |
7056.948us |
1 |
1 |
100.00
|
| chip_sw_csrng_fuse_en_sw_app_read |
1 |
1 |
100.00 |
|
chip_sw_csrng_fuse_en_sw_app_read_test |
261.140s |
5014.255us |
1 |
1 |
100.00
|
| chip_sw_csrng_lc_hw_debug_en |
1 |
1 |
100.00 |
|
chip_sw_csrng_lc_hw_debug_en_test |
361.720s |
7353.581us |
1 |
1 |
100.00
|
| chip_sw_csrng_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_csrng_kat_test |
184.720s |
2573.140us |
1 |
1 |
100.00
|
| chip_sw_edn_entropy_reqs |
3 |
3 |
100.00 |
|
chip_sw_csrng_edn_concurrency |
3357.100s |
21987.209us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_ast_rng_req |
187.430s |
3161.612us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs |
583.960s |
5747.475us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_ast_rng_req |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_ast_rng_req |
187.430s |
3161.612us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_csrng |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
879.210s |
7056.948us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_kat_test |
127.620s |
2825.701us |
1 |
1 |
100.00
|
| chip_sw_flash_init |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1065.100s |
19025.838us |
1 |
1 |
100.00
|
| chip_sw_flash_host_access |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_access |
555.610s |
5462.242us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
585.980s |
6186.631us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_ops |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_ops |
354.630s |
3400.230us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en |
355.010s |
3824.927us |
1 |
1 |
100.00
|
| chip_sw_flash_rma_unlocked |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3695.170s |
43672.545us |
1 |
1 |
100.00
|
| chip_sw_flash_scramble |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1065.100s |
19025.838us |
1 |
1 |
100.00
|
| chip_sw_flash_idle_low_power |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_idle_low_power |
203.290s |
3494.254us |
1 |
1 |
100.00
|
| chip_sw_flash_keymgr_seeds |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1797.170s |
13451.669us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_creator_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
198.130s |
4510.842us |
1 |
1 |
100.00
|
| chip_sw_flash_creator_seed_wipe_on_rma |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3695.170s |
43672.545us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_owner_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
198.130s |
4510.842us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
198.130s |
4510.842us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_wr_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
198.130s |
4510.842us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_seed_hw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
198.130s |
4510.842us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_escalate_en |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
396.930s |
5955.291us |
1 |
1 |
100.00
|
| chip_sw_flash_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
300.190s |
12160.643us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_clock_freqs |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_clock_freqs |
437.480s |
4646.285us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
437.210s |
6446.908us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_write_clear |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
437.210s |
6446.908us |
1 |
1 |
100.00
|
| chip_sw_hmac_enc |
2 |
2 |
100.00 |
|
chip_sw_hmac_enc |
157.270s |
2909.529us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
169.100s |
3476.701us |
1 |
1 |
100.00
|
| chip_sw_hmac_idle |
1 |
1 |
100.00 |
|
chip_sw_hmac_enc_idle |
160.310s |
2516.678us |
1 |
1 |
100.00
|
| chip_sw_hmac_all_configurations |
1 |
1 |
100.00 |
|
chip_sw_hmac_oneshot |
912.170s |
6954.972us |
1 |
1 |
100.00
|
| chip_sw_hmac_multistream_mode |
1 |
1 |
100.00 |
|
chip_sw_hmac_multistream |
700.520s |
6286.564us |
1 |
1 |
100.00
|
| chip_sw_i2c_host_tx_rx |
3 |
3 |
100.00 |
|
chip_sw_i2c_host_tx_rx |
427.900s |
5390.791us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx1 |
364.850s |
5430.218us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx2 |
509.010s |
5400.819us |
1 |
1 |
100.00
|
| chip_sw_i2c_device_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_i2c_device_tx_rx |
258.290s |
3497.660us |
1 |
1 |
100.00
|
| chip_sw_keymgr_key_derivation |
2 |
2 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1797.170s |
13451.669us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
771.920s |
8189.071us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_kmac |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_kmac |
1039.900s |
8639.634us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_aes |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
999.490s |
9688.498us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_otbn |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_otbn |
2048.710s |
12150.614us |
1 |
1 |
100.00
|
| chip_sw_kmac_enc |
3 |
3 |
100.00 |
|
chip_sw_kmac_mode_cshake |
193.750s |
3190.779us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac |
194.630s |
3247.971us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
188.540s |
2480.768us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_keymgr |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1797.170s |
13451.669us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_lc |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
317.550s |
5114.601us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_rom |
1 |
1 |
100.00 |
|
chip_sw_kmac_app_rom |
104.400s |
3065.538us |
1 |
1 |
100.00
|
| chip_sw_kmac_entropy |
1 |
1 |
100.00 |
|
chip_sw_kmac_entropy |
818.630s |
6487.736us |
1 |
1 |
100.00
|
| chip_sw_kmac_idle |
1 |
1 |
100.00 |
|
chip_sw_kmac_idle |
173.320s |
3186.388us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_alert_handler_escalation |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
236.930s |
4449.130us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_jtag_access |
3 |
3 |
100.00 |
|
chip_tap_straps_dev |
799.440s |
13645.018us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
281.530s |
5647.257us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
75.760s |
2811.519us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_otp_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
168.220s |
2743.940us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
317.550s |
5114.601us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_transitions |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
317.550s |
5114.601us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_kmac_req |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
317.550s |
5114.601us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_key_div |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation_prod |
623.700s |
6121.357us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_broadcast |
20 |
22 |
90.91 |
|
chip_prim_tl_access |
300.190s |
12160.643us |
1 |
1 |
100.00
|
|
chip_rv_dm_lc_disabled |
58.940s |
2452.788us |
0 |
1 |
0.00
|
|
chip_sw_flash_ctrl_lc_rw_en |
198.130s |
4510.842us |
1 |
1 |
100.00
|
|
chip_sw_flash_rma_unlocked |
3695.170s |
43672.545us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
200.480s |
3718.289us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
360.620s |
5291.152us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
558.760s |
5792.362us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
404.860s |
5476.623us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
317.550s |
5114.601us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1797.170s |
13451.669us |
1 |
1 |
100.00
|
|
chip_sw_rom_ctrl_integrity_check |
266.720s |
8327.819us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_execution_main |
483.040s |
9360.630us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_lc |
341.260s |
7329.204us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
397.850s |
3786.647us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
337.700s |
4406.891us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
345.540s |
3707.397us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
386.730s |
4618.051us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
385.340s |
3970.915us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
376.220s |
4265.158us |
1 |
1 |
100.00
|
|
chip_tap_straps_dev |
799.440s |
13645.018us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
281.530s |
5647.257us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
75.760s |
2811.519us |
1 |
1 |
100.00
|
| chip_lc_scrap |
4 |
4 |
100.00 |
|
chip_sw_lc_ctrl_rma_to_scrap |
113.160s |
2887.054us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_raw_to_scrap |
99.230s |
3745.441us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_test_locked0_to_scrap |
82.780s |
3016.456us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_rand_to_scrap |
139.580s |
3570.335us |
1 |
1 |
100.00
|
| chip_lc_test_locked |
1 |
2 |
50.00 |
|
chip_rv_dm_lc_disabled |
58.940s |
2452.788us |
0 |
1 |
0.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1306.920s |
21742.517us |
1 |
1 |
100.00
|
| chip_sw_lc_walkthrough |
5 |
5 |
100.00 |
|
chip_sw_lc_walkthrough_dev |
3596.000s |
47824.366us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prod |
3710.140s |
47925.787us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prodend |
550.480s |
9811.965us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_rma |
4041.300s |
48599.265us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1306.920s |
21742.517us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_volatile_raw_unlock |
3 |
3 |
100.00 |
|
chip_sw_lc_ctrl_volatile_raw_unlock |
68.300s |
2537.637us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz |
69.470s |
2774.438us |
1 |
1 |
100.00
|
|
rom_volatile_raw_unlock |
58.920s |
2378.427us |
1 |
1 |
100.00
|
| chip_sw_otbn_op |
2 |
2 |
100.00 |
|
chip_sw_otbn_ecdsa_op_irq |
3341.480s |
17122.975us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3213.860s |
18420.653us |
1 |
1 |
100.00
|
| chip_sw_otbn_rnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
551.150s |
5603.406us |
1 |
1 |
100.00
|
| chip_sw_otbn_urnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
551.150s |
5603.406us |
1 |
1 |
100.00
|
| chip_sw_otbn_idle |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
551.150s |
5603.406us |
1 |
1 |
100.00
|
| chip_sw_otbn_mem_scramble |
1 |
1 |
100.00 |
|
chip_sw_otbn_mem_scramble |
321.410s |
4072.885us |
1 |
1 |
100.00
|
| chip_otp_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
317.550s |
5114.601us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_keys |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1065.100s |
19025.838us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
321.410s |
4072.885us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1797.170s |
13451.669us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
295.090s |
4191.793us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
109.460s |
2848.405us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_entropy |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1065.100s |
19025.838us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
321.410s |
4072.885us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1797.170s |
13451.669us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
295.090s |
4191.793us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
109.460s |
2848.405us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
317.550s |
5114.601us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program_error |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_program_error |
359.850s |
5542.391us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
168.220s |
2743.940us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_lc_signals |
5 |
6 |
83.33 |
|
chip_prim_tl_access |
300.190s |
12160.643us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
200.480s |
3718.289us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
360.620s |
5291.152us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
558.760s |
5792.362us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
404.860s |
5476.623us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
317.550s |
5114.601us |
1 |
1 |
100.00
|
| chip_sw_otp_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
300.190s |
12160.643us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_dai_lock |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_dai_lock |
842.520s |
7901.380us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_external_full_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
275.430s |
7591.204us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_wake_ups |
1034.930s |
25790.092us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_normal_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_wake_ups |
269.160s |
7466.340us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_por_reset |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_deep_sleep_por_reset |
212.920s |
7719.518us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_por_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_por_reset |
309.670s |
6501.402us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_all_wake_ups |
939.790s |
22272.253us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
1 |
2 |
50.00 |
|
chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
918.770s |
14917.210us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_wdog_bite_reset |
418.540s |
7194.454us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
628.760s |
10389.477us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_wdog_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_wdog_reset |
359.970s |
4271.473us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_aon_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
275.430s |
7591.204us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_main_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_main_power_glitch_reset |
290.800s |
4862.995us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_power_glitch_reset |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_random_sleep_power_glitch_reset |
2132.010s |
37005.423us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
316.050s |
6297.469us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_power_glitch_reset |
245.640s |
5025.586us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1229.270s |
19309.544us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
449.720s |
6628.255us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_all_reset_reqs |
992.890s |
10589.549us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_b2b_sleep_reset_req |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_b2b_sleep_reset_req |
1545.900s |
22085.810us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_disabled |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_disabled |
184.610s |
3085.912us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
396.930s |
5955.291us |
1 |
1 |
100.00
|
| chip_sw_rom_access |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
266.720s |
8327.819us |
1 |
1 |
100.00
|
| chip_sw_rom_ctrl_integrity_check |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
266.720s |
8327.819us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_non_sys_reset_info |
4 |
4 |
100.00 |
|
chip_sw_pwrmgr_all_reset_reqs |
992.890s |
10589.549us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1229.270s |
19309.544us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_wdog_reset |
359.970s |
4271.473us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
227.670s |
5659.407us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sys_reset_info |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
258.760s |
3671.265us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_cpu_info |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
250.570s |
4690.913us |
0 |
1 |
0.00
|
| chip_sw_rstmgr_sw_req_reset |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_req |
230.450s |
4121.073us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_info |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
946.990s |
10722.721us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sw_rst |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_rst |
171.470s |
3027.349us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
396.930s |
5955.291us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_handler_reset_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
977.180s |
7019.104us |
1 |
1 |
100.00
|
| chip_sw_nmi_irq |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_nmi_irq |
500.020s |
5267.535us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_rnd |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_rnd |
444.630s |
4425.030us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_address_translation |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_address_translation |
166.370s |
3099.170us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_icache_scrambled_access |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_icache_invalidate |
109.460s |
2848.405us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_fault_dump |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
250.570s |
4690.913us |
0 |
1 |
0.00
|
| chip_sw_rv_core_ibex_double_fault |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
250.570s |
4690.913us |
0 |
1 |
0.00
|
| chip_jtag_csr_rw |
1 |
1 |
100.00 |
|
chip_jtag_csr_rw |
1283.010s |
16237.461us |
1 |
1 |
100.00
|
| chip_jtag_mem_access |
1 |
1 |
100.00 |
|
chip_jtag_mem_access |
861.870s |
13525.787us |
1 |
1 |
100.00
|
| chip_rv_dm_ndm_reset_req |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
258.760s |
3671.265us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
0 |
1 |
0.00 |
|
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
166.660s |
3143.369us |
0 |
1 |
0.00
|
| chip_rv_dm_access_after_wakeup |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_access_after_wakeup |
303.270s |
6785.767us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_jtag_tap_sel |
1 |
1 |
100.00 |
|
chip_tap_straps_rma |
281.530s |
5647.257us |
1 |
1 |
100.00
|
| chip_rv_dm_lc_disabled |
0 |
1 |
0.00 |
|
chip_rv_dm_lc_disabled |
58.940s |
2452.788us |
0 |
1 |
0.00
|
| chip_sw_plic_all_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
508.970s |
5225.778us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
255.630s |
3615.914us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
359.300s |
4383.880us |
1 |
1 |
100.00
|
| chip_sw_plic_sw_irq |
1 |
1 |
100.00 |
|
chip_sw_plic_sw_irq |
113.860s |
2578.297us |
1 |
1 |
100.00
|
| chip_sw_timer |
1 |
1 |
100.00 |
|
chip_sw_rv_timer_irq |
150.870s |
3421.508us |
1 |
1 |
100.00
|
| chip_sw_spi_device_flash_mode |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2462.250s |
14564.442us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through |
1 |
1 |
100.00 |
|
chip_sw_spi_device_pass_through |
575.870s |
8175.931us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through_collision |
0 |
1 |
0.00 |
|
chip_sw_spi_device_pass_through_collision |
186.880s |
3120.548us |
0 |
1 |
0.00
|
| chip_sw_spi_device_tpm |
1 |
1 |
100.00 |
|
chip_sw_spi_device_tpm |
173.640s |
3270.920us |
1 |
1 |
100.00
|
| chip_sw_spi_host_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_spi_host_tx_rx |
142.600s |
2535.340us |
1 |
1 |
100.00
|
| chip_sw_sram_scrambled_access |
2 |
2 |
100.00 |
|
chip_sw_sram_ctrl_scrambled_access |
295.090s |
4191.793us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
378.300s |
5480.350us |
1 |
1 |
100.00
|
| chip_sw_sleep_sram_ret_contents |
2 |
2 |
100.00 |
|
chip_sw_sleep_sram_ret_contents_no_scramble |
373.960s |
7288.956us |
1 |
1 |
100.00
|
|
chip_sw_sleep_sram_ret_contents_scramble |
388.100s |
7794.362us |
1 |
1 |
100.00
|
| chip_sw_sram_execution |
1 |
1 |
100.00 |
|
chip_sw_sram_ctrl_execution_main |
483.040s |
9360.630us |
1 |
1 |
100.00
|
| chip_sw_sram_lc_escalation |
2 |
2 |
100.00 |
|
chip_sw_all_escalation_resets |
396.930s |
5955.291us |
1 |
1 |
100.00
|
|
chip_sw_data_integrity_escalation |
351.450s |
6149.753us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
449.720s |
6628.255us |
1 |
1 |
100.00
|
|
chip_sw_sysrst_ctrl_reset |
1004.910s |
23750.580us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_inputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_inputs |
112.040s |
2750.349us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_outputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_outputs |
182.910s |
3358.280us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_in_irq |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_in_irq |
285.010s |
3978.286us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
1004.910s |
23750.580us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_reset |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
1004.910s |
23750.580us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_ec_rst_l |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
806.130s |
11368.313us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_flash_wp_l |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
806.130s |
11368.313us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_ulp_z3_wakeup |
1 |
2 |
50.00 |
|
chip_sw_sysrst_ctrl_ulp_z3_wakeup |
221.400s |
5944.639us |
1 |
1 |
100.00
|
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
3067.320s |
34370.221us |
0 |
1 |
0.00
|
| chip_sw_usbdev_vbus |
1 |
1 |
100.00 |
|
chip_sw_usbdev_vbus |
116.880s |
2512.339us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pullup |
109.930s |
2676.710us |
1 |
1 |
100.00
|
| chip_sw_usbdev_aon_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_aon_pullup |
290.580s |
4245.562us |
1 |
1 |
100.00
|
| chip_sw_usbdev_setup_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_setuprx |
319.780s |
3724.688us |
1 |
1 |
100.00
|
| chip_sw_usbdev_config_host |
1 |
1 |
100.00 |
|
chip_sw_usbdev_config_host |
976.700s |
7905.649us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pincfg |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pincfg |
4767.170s |
31258.316us |
1 |
1 |
100.00
|
| chip_sw_usbdev_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_dpi |
1906.040s |
12042.264us |
1 |
1 |
100.00
|
| chip_sw_usbdev_toggle_restore |
1 |
1 |
100.00 |
|
chip_sw_usbdev_toggle_restore |
141.370s |
2545.837us |
1 |
1 |
100.00
|