Simulation Results: i2c

 
03/12/2025 17:57:19 sha: a5eb48e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 87.15 %
  • code
  • 82.08 %
  • assert
  • 96.19 %
  • func
  • 83.19 %
  • line
  • 96.63 %
  • branch
  • 92.76 %
  • cond
  • 87.30 %
  • toggle
  • 89.66 %
  • FSM
  • 44.05 %
Validation stages
V1
100.00%
V2
91.84%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
host_smoke 1 1 100.00
i2c_host_smoke 60.710s 7489.061us 1 1 100.00
target_smoke 1 1 100.00
i2c_target_smoke 12.090s 843.577us 1 1 100.00
csr_hw_reset 1 1 100.00
i2c_csr_hw_reset 0.820s 22.511us 1 1 100.00
csr_rw 1 1 100.00
i2c_csr_rw 0.800s 27.461us 1 1 100.00
csr_bit_bash 1 1 100.00
i2c_csr_bit_bash 3.620s 468.648us 1 1 100.00
csr_aliasing 1 1 100.00
i2c_csr_aliasing 1.740s 154.126us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
i2c_csr_mem_rw_with_rand_reset 1.470s 32.267us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
i2c_csr_rw 0.800s 27.461us 1 1 100.00
i2c_csr_aliasing 1.740s 154.126us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_error_intr 0 1 0.00
i2c_host_error_intr 0.950s 133.854us 0 1 0.00
host_stress_all 1 1 100.00
i2c_host_stress_all 1223.890s 300816.088us 1 1 100.00
host_maxperf 1 1 100.00
i2c_host_perf 41.780s 12420.918us 1 1 100.00
host_override 1 1 100.00
i2c_host_override 0.790s 107.977us 1 1 100.00
host_fifo_watermark 1 1 100.00
i2c_host_fifo_watermark 62.580s 4062.080us 1 1 100.00
host_fifo_overflow 1 1 100.00
i2c_host_fifo_overflow 26.990s 1721.997us 1 1 100.00
host_fifo_reset 3 3 100.00
i2c_host_fifo_reset_fmt 1.190s 132.224us 1 1 100.00
i2c_host_fifo_fmt_empty 3.510s 299.830us 1 1 100.00
i2c_host_fifo_reset_rx 3.330s 190.304us 1 1 100.00
host_fifo_full 1 1 100.00
i2c_host_fifo_full 78.700s 15906.305us 1 1 100.00
host_timeout 1 1 100.00
i2c_host_stretch_timeout 17.820s 5142.061us 1 1 100.00
i2c_host_mode_toggle 0 1 0.00
i2c_host_mode_toggle 0.950s 25.081us 0 1 0.00
target_glitch 0 1 0.00
i2c_target_glitch 2.050s 1689.607us 0 1 0.00
target_stress_all 1 1 100.00
i2c_target_stress_all 27.230s 21591.016us 1 1 100.00
target_maxperf 1 1 100.00
i2c_target_perf 2.440s 2242.652us 1 1 100.00
target_fifo_empty 2 2 100.00
i2c_target_stress_rd 43.110s 5542.840us 1 1 100.00
i2c_target_intr_smoke 3.720s 1499.918us 1 1 100.00
target_fifo_reset 2 2 100.00
i2c_target_fifo_reset_acq 0.870s 414.329us 1 1 100.00
i2c_target_fifo_reset_tx 1.050s 214.618us 1 1 100.00
target_fifo_full 3 3 100.00
i2c_target_stress_wr 13.180s 37375.293us 1 1 100.00
i2c_target_stress_rd 43.110s 5542.840us 1 1 100.00
i2c_target_intr_stress_wr 64.550s 8793.763us 1 1 100.00
target_timeout 1 1 100.00
i2c_target_timeout 5.440s 1528.422us 1 1 100.00
target_clock_stretch 1 1 100.00
i2c_target_stretch 1.860s 1200.401us 1 1 100.00
bad_address 1 1 100.00
i2c_target_bad_addr 3.280s 1115.767us 1 1 100.00
target_mode_glitch 0 1 0.00
i2c_target_hrst 20.140s 10041.352us 0 1 0.00
target_fifo_watermark 2 2 100.00
i2c_target_fifo_watermarks_acq 2.030s 403.470us 1 1 100.00
i2c_target_fifo_watermarks_tx 1.610s 137.279us 1 1 100.00
host_mode_config_perf 2 2 100.00
i2c_host_perf 41.780s 12420.918us 1 1 100.00
i2c_host_perf_precise 105.780s 24391.679us 1 1 100.00
host_mode_clock_stretching 1 1 100.00
i2c_host_stretch_timeout 17.820s 5142.061us 1 1 100.00
target_mode_tx_stretch_ctrl 1 1 100.00
i2c_target_tx_stretch_ctrl 4.830s 474.395us 1 1 100.00
target_mode_nack_generation 3 3 100.00
i2c_target_nack_acqfull 2.620s 490.663us 1 1 100.00
i2c_target_nack_acqfull_addr 2.000s 519.525us 1 1 100.00
i2c_target_nack_txstretch 1.660s 131.134us 1 1 100.00
host_mode_halt_on_nak 1 1 100.00
i2c_host_may_nack 8.800s 2259.448us 1 1 100.00
target_mode_smbus_maxlen 1 1 100.00
i2c_target_smbus_maxlen 1.760s 905.066us 1 1 100.00
alert_test 1 1 100.00
i2c_alert_test 0.620s 14.795us 1 1 100.00
intr_test 1 1 100.00
i2c_intr_test 0.710s 20.617us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
i2c_tl_errors 2.180s 40.853us 1 1 100.00
tl_d_illegal_access 1 1 100.00
i2c_tl_errors 2.180s 40.853us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
i2c_csr_hw_reset 0.820s 22.511us 1 1 100.00
i2c_csr_rw 0.800s 27.461us 1 1 100.00
i2c_csr_aliasing 1.740s 154.126us 1 1 100.00
i2c_same_csr_outstanding 1.140s 38.915us 1 1 100.00
tl_d_partial_access 4 4 100.00
i2c_csr_hw_reset 0.820s 22.511us 1 1 100.00
i2c_csr_rw 0.800s 27.461us 1 1 100.00
i2c_csr_aliasing 1.740s 154.126us 1 1 100.00
i2c_same_csr_outstanding 1.140s 38.915us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
i2c_sec_cm 0.960s 74.456us 1 1 100.00
i2c_tl_intg_err 1.300s 90.127us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
i2c_tl_intg_err 1.300s 90.127us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_stress_all_with_rand_reset 0 1 0.00
i2c_host_stress_all_with_rand_reset 14.030s 3926.305us 0 1 0.00
target_error_intr 0 1 0.00
i2c_target_unexp_stop 1.100s 196.502us 0 1 0.00
target_stress_all_with_rand_reset 0 1 0.00
i2c_target_stress_all_with_rand_reset 6.200s 1551.826us 0 1 0.00