Simulation Results: otp_ctrl

 
03/12/2025 17:57:19 sha: a5eb48e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.15 %
  • code
  • 77.86 %
  • assert
  • 91.81 %
  • func
  • 70.78 %
  • line
  • 87.95 %
  • branch
  • 81.75 %
  • cond
  • 89.52 %
  • toggle
  • 85.09 %
  • FSM
  • 44.97 %
Validation stages
V1
90.91%
V2
96.00%
V2S
55.36%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 2.090s 767.601us 1 1 100.00
smoke 1 1 100.00
otp_ctrl_smoke 7.420s 869.673us 1 1 100.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 1.910s 180.687us 1 1 100.00
csr_rw 1 1 100.00
otp_ctrl_csr_rw 1.360s 143.061us 1 1 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 7.420s 2996.532us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 2.560s 100.122us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
otp_ctrl_csr_mem_rw_with_rand_reset 2.010s 58.775us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otp_ctrl_csr_rw 1.360s 143.061us 1 1 100.00
otp_ctrl_csr_aliasing 2.560s 100.122us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 1.270s 550.983us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 1.190s 136.698us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 1 1 100.00
otp_ctrl_partition_walk 14.720s 1568.448us 1 1 100.00
init_fail 1 1 100.00
otp_ctrl_init_fail 4.220s 1784.592us 1 1 100.00
partition_check 1 2 50.00
otp_ctrl_background_chks 5.870s 882.161us 1 1 100.00
otp_ctrl_check_fail 1.790s 61.962us 0 1 0.00
regwen_during_otp_init 1 1 100.00
otp_ctrl_regwen 4.910s 2583.219us 1 1 100.00
partition_lock 1 1 100.00
otp_ctrl_dai_lock 22.040s 1965.366us 1 1 100.00
interface_key_check 1 1 100.00
otp_ctrl_parallel_key_req 6.370s 628.659us 1 1 100.00
lc_interactions 2 2 100.00
otp_ctrl_parallel_lc_req 10.550s 982.418us 1 1 100.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
otp_dai_errors 1 1 100.00
otp_ctrl_dai_errs 8.220s 503.786us 1 1 100.00
otp_macro_errors 1 1 100.00
otp_ctrl_macro_errs 7.750s 6095.232us 1 1 100.00
test_access 1 1 100.00
otp_ctrl_test_access 18.210s 809.837us 1 1 100.00
stress_all 1 1 100.00
otp_ctrl_stress_all 71.170s 39136.463us 1 1 100.00
intr_test 1 1 100.00
otp_ctrl_intr_test 1.540s 74.173us 1 1 100.00
alert_test 1 1 100.00
otp_ctrl_alert_test 1.470s 104.328us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otp_ctrl_tl_errors 6.870s 628.516us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otp_ctrl_tl_errors 6.870s 628.516us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otp_ctrl_csr_hw_reset 1.910s 180.687us 1 1 100.00
otp_ctrl_csr_rw 1.360s 143.061us 1 1 100.00
otp_ctrl_csr_aliasing 2.560s 100.122us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.340s 980.044us 1 1 100.00
tl_d_partial_access 4 4 100.00
otp_ctrl_csr_hw_reset 1.910s 180.687us 1 1 100.00
otp_ctrl_csr_rw 1.360s 143.061us 1 1 100.00
otp_ctrl_csr_aliasing 2.560s 100.122us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.340s 980.044us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
tl_intg_err 1 2 50.00
otp_ctrl_tl_intg_err 7.630s 2485.941us 1 1 100.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
prim_count_check 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
prim_fsm_check 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_bus_integrity 1 1 100.00
otp_ctrl_tl_intg_err 7.630s 2485.941us 1 1 100.00
sec_cm_secret_mem_scramble 1 1 100.00
otp_ctrl_smoke 7.420s 869.673us 1 1 100.00
sec_cm_part_mem_digest 1 1 100.00
otp_ctrl_smoke 7.420s 869.673us 1 1 100.00
sec_cm_dai_fsm_sparse 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_kdi_fsm_sparse 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_lci_fsm_sparse 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_part_fsm_sparse 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_scrmbl_fsm_sparse 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_timer_fsm_sparse 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_dai_ctr_redun 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_kdi_seed_ctr_redun 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_kdi_entropy_ctr_redun 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_lci_ctr_redun 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_part_ctr_redun 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_scrmbl_ctr_redun 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_timer_integ_ctr_redun 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_timer_cnsty_ctr_redun 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_timer_lfsr_redun 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_dai_fsm_local_esc 1 2 50.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_lci_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
sec_cm_kdi_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
sec_cm_part_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
otp_ctrl_macro_errs 7.750s 6095.232us 1 1 100.00
sec_cm_scrmbl_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
sec_cm_timer_fsm_local_esc 1 2 50.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_dai_fsm_global_esc 1 2 50.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_lci_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
sec_cm_kdi_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
sec_cm_part_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
otp_ctrl_macro_errs 7.750s 6095.232us 1 1 100.00
sec_cm_scrmbl_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
sec_cm_timer_fsm_global_esc 1 2 50.00
otp_ctrl_parallel_lc_esc 5.710s 209.449us 1 1 100.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_part_data_reg_integrity 1 1 100.00
otp_ctrl_init_fail 4.220s 1784.592us 1 1 100.00
sec_cm_part_data_reg_bkgn_chk 0 1 0.00
otp_ctrl_check_fail 1.790s 61.962us 0 1 0.00
sec_cm_part_mem_regren 1 1 100.00
otp_ctrl_dai_lock 22.040s 1965.366us 1 1 100.00
sec_cm_part_mem_sw_unreadable 1 1 100.00
otp_ctrl_dai_lock 22.040s 1965.366us 1 1 100.00
sec_cm_part_mem_sw_unwritable 1 1 100.00
otp_ctrl_dai_lock 22.040s 1965.366us 1 1 100.00
sec_cm_lc_part_mem_sw_noaccess 1 1 100.00
otp_ctrl_dai_lock 22.040s 1965.366us 1 1 100.00
sec_cm_access_ctrl_mubi 1 1 100.00
otp_ctrl_dai_lock 22.040s 1965.366us 1 1 100.00
sec_cm_token_valid_ctrl_mubi 1 1 100.00
otp_ctrl_smoke 7.420s 869.673us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
otp_ctrl_dai_lock 22.040s 1965.366us 1 1 100.00
sec_cm_test_bus_lc_gated 1 1 100.00
otp_ctrl_smoke 7.420s 869.673us 1 1 100.00
sec_cm_test_tl_lc_gate_fsm_sparse 0 1 0.00
otp_ctrl_sec_cm 16.210s 9448.678us 0 1 0.00
sec_cm_direct_access_config_regwen 1 1 100.00
otp_ctrl_regwen 4.910s 2583.219us 1 1 100.00
sec_cm_check_trigger_config_regwen 1 1 100.00
otp_ctrl_smoke 7.420s 869.673us 1 1 100.00
sec_cm_check_config_regwen 1 1 100.00
otp_ctrl_smoke 7.420s 869.673us 1 1 100.00
sec_cm_macro_mem_integrity 1 1 100.00
otp_ctrl_macro_errs 7.750s 6095.232us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 1 1 100.00
otp_ctrl_low_freq_read 9.770s 3070.531us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
otp_ctrl_stress_all_with_rand_reset 1.400s 27.505us 0 1 0.00