Simulation Results: spi_device

 
03/12/2025 17:57:19 sha: a5eb48e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.21 %
  • code
  • 94.12 %
  • assert
  • 94.27 %
  • func
  • 70.24 %
  • line
  • 99.10 %
  • branch
  • 98.30 %
  • cond
  • 96.11 %
  • toggle
  • 87.74 %
  • FSM
  • 89.36 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_device_flash_and_tpm 17.400s 12958.824us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_device_csr_hw_reset 0.920s 81.601us 1 1 100.00
csr_rw 1 1 100.00
spi_device_csr_rw 1.230s 85.266us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_device_csr_bit_bash 23.570s 555.746us 1 1 100.00
csr_aliasing 1 1 100.00
spi_device_csr_aliasing 11.150s 4843.067us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_device_csr_mem_rw_with_rand_reset 2.260s 44.948us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_device_csr_rw 1.230s 85.266us 1 1 100.00
spi_device_csr_aliasing 11.150s 4843.067us 1 1 100.00
mem_walk 1 1 100.00
spi_device_mem_walk 0.650s 44.609us 1 1 100.00
mem_partial_access 1 1 100.00
spi_device_mem_partial_access 1.710s 491.520us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
csb_read 1 1 100.00
spi_device_csb_read 0.930s 12.398us 1 1 100.00
mem_parity 1 1 100.00
spi_device_mem_parity 1.060s 28.580us 1 1 100.00
mem_cfg 1 1 100.00
spi_device_ram_cfg 0.750s 17.920us 1 1 100.00
tpm_read 1 1 100.00
spi_device_tpm_rw 1.170s 51.003us 1 1 100.00
tpm_write 1 1 100.00
spi_device_tpm_rw 1.170s 51.003us 1 1 100.00
tpm_hw_reg 2 2 100.00
spi_device_tpm_read_hw_reg 2.690s 2684.425us 1 1 100.00
spi_device_tpm_sts_read 0.850s 136.062us 1 1 100.00
tpm_fully_random_case 1 1 100.00
spi_device_tpm_all 21.540s 14863.275us 1 1 100.00
pass_cmd_filtering 2 2 100.00
spi_device_pass_cmd_filtering 5.000s 2424.774us 1 1 100.00
spi_device_flash_all 15.670s 4547.051us 1 1 100.00
pass_addr_translation 2 2 100.00
spi_device_pass_addr_payload_swap 3.010s 273.722us 1 1 100.00
spi_device_flash_all 15.670s 4547.051us 1 1 100.00
pass_payload_translation 2 2 100.00
spi_device_pass_addr_payload_swap 3.010s 273.722us 1 1 100.00
spi_device_flash_all 15.670s 4547.051us 1 1 100.00
cmd_info_slots 1 1 100.00
spi_device_flash_all 15.670s 4547.051us 1 1 100.00
cmd_read_status 2 2 100.00
spi_device_intercept 16.510s 2017.972us 1 1 100.00
spi_device_flash_all 15.670s 4547.051us 1 1 100.00
cmd_read_jedec 2 2 100.00
spi_device_intercept 16.510s 2017.972us 1 1 100.00
spi_device_flash_all 15.670s 4547.051us 1 1 100.00
cmd_read_sfdp 2 2 100.00
spi_device_intercept 16.510s 2017.972us 1 1 100.00
spi_device_flash_all 15.670s 4547.051us 1 1 100.00
cmd_fast_read 2 2 100.00
spi_device_intercept 16.510s 2017.972us 1 1 100.00
spi_device_flash_all 15.670s 4547.051us 1 1 100.00
cmd_read_pipeline 2 2 100.00
spi_device_intercept 16.510s 2017.972us 1 1 100.00
spi_device_flash_all 15.670s 4547.051us 1 1 100.00
flash_cmd_upload 1 1 100.00
spi_device_upload 4.660s 906.763us 1 1 100.00
mailbox_command 1 1 100.00
spi_device_mailbox 16.940s 11206.475us 1 1 100.00
mailbox_cross_outside_command 1 1 100.00
spi_device_mailbox 16.940s 11206.475us 1 1 100.00
mailbox_cross_inside_command 1 1 100.00
spi_device_mailbox 16.940s 11206.475us 1 1 100.00
cmd_read_buffer 2 2 100.00
spi_device_flash_mode 20.320s 2875.114us 1 1 100.00
spi_device_read_buffer_direct 2.370s 385.144us 1 1 100.00
cmd_dummy_cycle 2 2 100.00
spi_device_mailbox 16.940s 11206.475us 1 1 100.00
spi_device_flash_all 15.670s 4547.051us 1 1 100.00
quad_spi 1 1 100.00
spi_device_flash_all 15.670s 4547.051us 1 1 100.00
dual_spi 1 1 100.00
spi_device_flash_all 15.670s 4547.051us 1 1 100.00
4b_3b_feature 1 1 100.00
spi_device_cfg_cmd 3.380s 360.245us 1 1 100.00
write_enable_disable 1 1 100.00
spi_device_cfg_cmd 3.380s 360.245us 1 1 100.00
TPM_with_flash_or_passthrough_mode 1 1 100.00
spi_device_flash_and_tpm 17.400s 12958.824us 1 1 100.00
tpm_and_flash_trans_with_min_inactive_time 1 1 100.00
spi_device_flash_and_tpm_min_idle 133.670s 78802.667us 1 1 100.00
stress_all 1 1 100.00
spi_device_stress_all 70.530s 6511.505us 1 1 100.00
alert_test 1 1 100.00
spi_device_alert_test 1.000s 38.409us 1 1 100.00
intr_test 1 1 100.00
spi_device_intr_test 0.820s 16.680us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_device_tl_errors 1.590s 68.142us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_device_tl_errors 1.590s 68.142us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_device_csr_hw_reset 0.920s 81.601us 1 1 100.00
spi_device_csr_rw 1.230s 85.266us 1 1 100.00
spi_device_csr_aliasing 11.150s 4843.067us 1 1 100.00
spi_device_same_csr_outstanding 2.900s 327.420us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_device_csr_hw_reset 0.920s 81.601us 1 1 100.00
spi_device_csr_rw 1.230s 85.266us 1 1 100.00
spi_device_csr_aliasing 11.150s 4843.067us 1 1 100.00
spi_device_same_csr_outstanding 2.900s 327.420us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_device_tl_intg_err 5.120s 150.203us 1 1 100.00
spi_device_sec_cm 1.340s 41.345us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_device_tl_intg_err 5.120s 150.203us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
spi_device_flash_mode_ignore_cmds 7.090s 496.619us 1 1 100.00