| chip_pin_mux |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
158.720s |
3947.619us |
1 |
1 |
100.00
|
| chip_padctrl_attributes |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
158.720s |
3947.619us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_mio_dio_val |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_mio_dio_val |
134.190s |
2599.537us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_wake |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_wake |
116.160s |
2818.109us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_retention |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_retention |
143.520s |
3672.611us |
1 |
1 |
100.00
|
| chip_sw_tap_strap_sampling |
4 |
4 |
100.00 |
|
chip_tap_straps_dev |
545.430s |
9003.492us |
1 |
1 |
100.00
|
|
chip_tap_straps_testunlock0 |
195.400s |
4744.231us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
85.070s |
3140.625us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
762.820s |
11367.194us |
1 |
1 |
100.00
|
| chip_sw_pattgen_ios |
1 |
1 |
100.00 |
|
chip_sw_pattgen_ios |
138.530s |
2820.951us |
1 |
1 |
100.00
|
| chip_sw_sleep_pwm_pulses |
1 |
1 |
100.00 |
|
chip_sw_sleep_pwm_pulses |
710.420s |
8489.578us |
1 |
1 |
100.00
|
| chip_sw_data_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
399.110s |
6344.397us |
1 |
1 |
100.00
|
| chip_sw_instruction_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
399.110s |
6344.397us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_outputs |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
571.900s |
7062.224us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_rst_inputs |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_rst_inputs |
1327.010s |
17523.013us |
1 |
1 |
100.00
|
| chip_sw_ast_sys_clk_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
343.370s |
4040.546us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
590.680s |
5323.961us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3329.150s |
19877.277us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
140.840s |
2924.962us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
475.300s |
5111.707us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
123.130s |
2666.219us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1296.590s |
10619.336us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
197.880s |
3250.427us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
278.260s |
4596.869us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
146.700s |
2323.151us |
1 |
1 |
100.00
|
| chip_sw_ast_usb_clk_calib |
1 |
1 |
100.00 |
|
chip_sw_usb_ast_clk_calib |
184.490s |
3474.759us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_alerts |
2 |
2 |
100.00 |
|
chip_sw_sensor_ctrl_alert |
635.490s |
8142.864us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
288.590s |
5860.807us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_status |
1 |
1 |
100.00 |
|
chip_sw_sensor_ctrl_status |
117.690s |
2678.141us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
288.590s |
5860.807us |
1 |
1 |
100.00
|
| chip_sw_smoketest |
17 |
17 |
100.00 |
|
chip_sw_flash_scrambling_smoketest |
97.380s |
2520.202us |
1 |
1 |
100.00
|
|
chip_sw_aes_smoketest |
149.850s |
3242.213us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_smoketest |
164.680s |
2832.729us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_smoketest |
112.220s |
3145.325us |
1 |
1 |
100.00
|
|
chip_sw_csrng_smoketest |
161.440s |
3496.585us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_smoketest |
800.830s |
6622.982us |
1 |
1 |
100.00
|
|
chip_sw_gpio_smoketest |
233.530s |
3808.080us |
1 |
1 |
100.00
|
|
chip_sw_hmac_smoketest |
164.330s |
2554.357us |
1 |
1 |
100.00
|
|
chip_sw_kmac_smoketest |
170.180s |
2856.596us |
1 |
1 |
100.00
|
|
chip_sw_otbn_smoketest |
1084.870s |
9973.155us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
282.840s |
5649.218us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_usbdev_smoketest |
212.170s |
5007.022us |
1 |
1 |
100.00
|
|
chip_sw_rv_plic_smoketest |
146.140s |
3269.982us |
1 |
1 |
100.00
|
|
chip_sw_rv_timer_smoketest |
183.440s |
3675.462us |
1 |
1 |
100.00
|
|
chip_sw_rstmgr_smoketest |
93.310s |
2370.950us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_smoketest |
149.110s |
2594.083us |
1 |
1 |
100.00
|
|
chip_sw_uart_smoketest |
158.840s |
3211.035us |
1 |
1 |
100.00
|
| chip_sw_otp_smoketest |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_smoketest |
136.620s |
2979.560us |
1 |
1 |
100.00
|
| chip_sw_rom_functests |
1 |
1 |
100.00 |
|
rom_keymgr_functest |
297.250s |
4506.630us |
1 |
1 |
100.00
|
| chip_sw_boot |
1 |
1 |
100.00 |
|
chip_sw_uart_tx_rx_bootstrap |
7891.340s |
62882.918us |
1 |
1 |
100.00
|
| chip_sw_secure_boot |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2453.250s |
14748.128us |
1 |
1 |
100.00
|
| chip_sw_rom_raw_unlock |
0 |
1 |
0.00 |
|
rom_raw_unlock |
635.380s |
15780.946us |
0 |
1 |
0.00
|
| chip_sw_power_idle_load |
0 |
1 |
0.00 |
|
chip_sw_power_idle_load |
214.230s |
3343.162us |
0 |
1 |
0.00
|
| chip_sw_power_sleep_load |
0 |
1 |
0.00 |
|
chip_sw_power_sleep_load |
239.180s |
3490.160us |
0 |
1 |
0.00
|
| chip_sw_exit_test_unlocked_bootstrap |
1 |
1 |
100.00 |
|
chip_sw_exit_test_unlocked_bootstrap |
7034.880s |
54962.604us |
1 |
1 |
100.00
|
| chip_sw_inject_scramble_seed |
1 |
1 |
100.00 |
|
chip_sw_inject_scramble_seed |
7018.580s |
57383.025us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
163.790s |
3612.365us |
0 |
1 |
0.00
|
| tl_d_illegal_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
163.790s |
3612.365us |
0 |
1 |
0.00
|
| tl_d_outstanding_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
4212.050s |
28501.711us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
2600.380s |
31717.692us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
128.020s |
4255.064us |
1 |
1 |
100.00
|
|
chip_csr_rw |
231.780s |
4048.367us |
1 |
1 |
100.00
|
| tl_d_partial_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
4212.050s |
28501.711us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
2600.380s |
31717.692us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
128.020s |
4255.064us |
1 |
1 |
100.00
|
|
chip_csr_rw |
231.780s |
4048.367us |
1 |
1 |
100.00
|
| xbar_base_random_sequence |
1 |
1 |
100.00 |
|
xbar_random |
19.090s |
391.653us |
1 |
1 |
100.00
|
| xbar_random_delay |
6 |
6 |
100.00 |
|
xbar_smoke_zero_delays |
5.160s |
41.186us |
1 |
1 |
100.00
|
|
xbar_smoke_large_delays |
54.540s |
8005.670us |
1 |
1 |
100.00
|
|
xbar_smoke_slow_rsp |
49.820s |
5558.161us |
1 |
1 |
100.00
|
|
xbar_random_zero_delays |
4.340s |
33.826us |
1 |
1 |
100.00
|
|
xbar_random_large_delays |
214.720s |
38310.736us |
1 |
1 |
100.00
|
|
xbar_random_slow_rsp |
245.650s |
30266.700us |
1 |
1 |
100.00
|
| xbar_unmapped_address |
2 |
2 |
100.00 |
|
xbar_unmapped_addr |
21.430s |
798.125us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
13.220s |
179.726us |
1 |
1 |
100.00
|
| xbar_error_cases |
2 |
2 |
100.00 |
|
xbar_error_random |
23.110s |
979.814us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
13.220s |
179.726us |
1 |
1 |
100.00
|
| xbar_all_access_same_device |
2 |
2 |
100.00 |
|
xbar_access_same_device |
31.200s |
668.374us |
1 |
1 |
100.00
|
|
xbar_access_same_device_slow_rsp |
220.410s |
26697.323us |
1 |
1 |
100.00
|
| xbar_all_hosts_use_same_source_id |
1 |
1 |
100.00 |
|
xbar_same_source |
17.130s |
325.316us |
1 |
1 |
100.00
|
| xbar_stress_all |
2 |
2 |
100.00 |
|
xbar_stress_all |
78.180s |
3776.947us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_error |
180.650s |
8940.605us |
1 |
1 |
100.00
|
| xbar_stress_with_reset |
2 |
2 |
100.00 |
|
xbar_stress_all_with_rand_reset |
424.110s |
14455.888us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_reset_error |
451.560s |
7367.933us |
1 |
1 |
100.00
|
| rom_e2e_smoke |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2453.250s |
14748.128us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_output |
0 |
1 |
0.00 |
|
rom_e2e_shutdown_output |
2336.060s |
29533.182us |
0 |
1 |
0.00
|
| rom_e2e_shutdown_exception_c |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_exception_c |
2432.310s |
16984.137us |
1 |
1 |
100.00
|
| rom_e2e_boot_policy_valid |
5 |
15 |
33.33 |
|
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 |
2002.950s |
11039.438us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_dev |
2555.810s |
16735.935us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod |
2581.440s |
17467.695us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod_end |
2541.770s |
15763.769us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_rma |
2550.790s |
16514.778us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 |
26.490s |
10.260us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_dev |
22.240s |
10.120us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod |
19.550s |
10.260us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end |
19.010s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_rma |
20.640s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 |
17.520s |
10.280us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_dev |
17.410s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod |
17.170s |
10.280us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end |
18.550s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_rma |
22.670s |
10.320us |
0 |
1 |
0.00
|
| rom_e2e_sigverify_always |
0 |
15 |
0.00 |
|
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 |
20.540s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_dev |
16.970s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod |
19.840s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod_end |
16.540s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_rma |
17.160s |
10.280us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 |
17.100s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_dev |
17.140s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod |
17.100s |
10.140us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end |
17.460s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_rma |
17.460s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 |
17.050s |
10.240us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_dev |
20.320s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod |
20.110s |
10.240us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end |
20.260s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_rma |
16.500s |
10.220us |
0 |
1 |
0.00
|
| rom_e2e_asm_init |
5 |
5 |
100.00 |
|
rom_e2e_asm_init_test_unlocked0 |
1918.880s |
11441.427us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_dev |
2561.570s |
17581.393us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod |
2491.240s |
15764.178us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod_end |
2476.120s |
15460.706us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_rma |
2362.040s |
15261.519us |
1 |
1 |
100.00
|
| rom_e2e_keymgr_init |
1 |
3 |
33.33 |
|
rom_e2e_keymgr_init_rom_ext_meas |
2324.070s |
18233.935us |
0 |
1 |
0.00
|
|
rom_e2e_keymgr_init_rom_ext_no_meas |
4045.990s |
28770.244us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_invalid_meas |
2416.530s |
21000.628us |
0 |
1 |
0.00
|
| rom_e2e_static_critical |
1 |
1 |
100.00 |
|
rom_e2e_static_critical |
2345.090s |
16429.317us |
1 |
1 |
100.00
|
| chip_sw_adc_ctrl_debug_cable_irq |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2906.170s |
35072.129us |
0 |
1 |
0.00
|
| chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2906.170s |
35072.129us |
0 |
1 |
0.00
|
| chip_sw_aes_enc |
2 |
2 |
100.00 |
|
chip_sw_aes_enc |
134.590s |
2660.093us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
140.840s |
2924.962us |
1 |
1 |
100.00
|
| chip_sw_aes_entropy |
1 |
1 |
100.00 |
|
chip_sw_aes_entropy |
133.410s |
3001.716us |
1 |
1 |
100.00
|
| chip_sw_aes_idle |
1 |
1 |
100.00 |
|
chip_sw_aes_idle |
137.240s |
2916.192us |
1 |
1 |
100.00
|
| chip_sw_aes_sideload |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1272.510s |
9819.658us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_test |
150.650s |
2829.929us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_escalations |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
387.970s |
6102.978us |
1 |
1 |
100.00
|
| chip_sw_all_escalation_resets |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
365.140s |
4958.850us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
512.880s |
5716.591us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
252.670s |
3710.649us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
390.020s |
3973.613us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_entropy |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_entropy |
181.340s |
3351.920us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_crashdump |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
849.850s |
12417.736us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_timeout |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_timeout |
215.700s |
4505.246us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_sleep_mode_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_alerts |
148.210s |
2530.733us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_sleep_mode_pings |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_pings |
0.000s |
0.000us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_clock_off |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
631.210s |
5669.195us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_reset_toggle |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
781.030s |
6809.159us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_ok |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_ok |
862.870s |
8642.478us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_reverse_ping_in_deep_sleep |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_reverse_ping_in_deep_sleep |
7381.260s |
254088.140us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wakeup_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
228.220s |
3454.852us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_smoketest |
282.840s |
5649.218us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bark_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
228.220s |
3454.852us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
326.570s |
7874.007us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
326.570s |
7874.007us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_sleep_pause |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_sleep_wdog_sleep_pause |
205.480s |
7518.596us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_lc_escalate |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_lc_escalate |
328.020s |
4559.476us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_idle_trans |
4 |
4 |
100.00 |
|
chip_sw_otbn_randomness |
561.850s |
5820.195us |
1 |
1 |
100.00
|
|
chip_sw_aes_idle |
137.240s |
2916.192us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_idle |
175.750s |
3305.700us |
1 |
1 |
100.00
|
|
chip_sw_kmac_idle |
144.010s |
2806.228us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_trans |
4 |
4 |
100.00 |
|
chip_sw_clkmgr_off_aes_trans |
294.320s |
5123.601us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_hmac_trans |
254.110s |
4276.458us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_kmac_trans |
267.900s |
5091.537us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_otbn_trans |
228.800s |
3745.532us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_peri |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_off_peri |
625.250s |
9176.622us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_div |
7 |
7 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
377.750s |
4303.280us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
351.380s |
4685.120us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
346.140s |
3525.378us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
338.400s |
4170.988us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
379.410s |
4103.064us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
384.190s |
4953.416us |
1 |
1 |
100.00
|
|
chip_sw_ast_clk_outputs |
571.900s |
7062.224us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_lc |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_lc |
338.650s |
7038.308us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_sw |
2 |
2 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
346.140s |
3525.378us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
338.400s |
4170.988us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
343.370s |
4040.546us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
590.680s |
5323.961us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3329.150s |
19877.277us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
140.840s |
2924.962us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
475.300s |
5111.707us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
123.130s |
2666.219us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1296.590s |
10619.336us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
197.880s |
3250.427us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
278.260s |
4596.869us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
146.700s |
2323.151us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_extended_range |
11 |
11 |
100.00 |
|
chip_sw_clkmgr_jitter_reduced_freq |
107.280s |
2633.928us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq |
337.900s |
4647.075us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en_reduced_freq |
634.550s |
6909.849us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq |
2908.850s |
24637.679us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en_reduced_freq |
148.880s |
3119.290us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en_reduced_freq |
142.610s |
2701.855us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq |
729.870s |
8865.985us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq |
173.890s |
3403.599us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq |
327.710s |
3832.349us |
1 |
1 |
100.00
|
|
chip_sw_flash_init_reduced_freq |
1254.360s |
22325.937us |
1 |
1 |
100.00
|
|
chip_sw_csrng_edn_concurrency_reduced_freq |
6846.290s |
84231.337us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_deep_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
571.900s |
7062.224us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_sleep_frequency |
370.560s |
4037.084us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_reset_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_reset_frequency |
208.120s |
3461.205us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
365.140s |
4958.850us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_alert_handler_clock_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
631.210s |
5669.195us |
1 |
1 |
100.00
|
| chip_sw_csrng_edn_cmd |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
750.340s |
5736.826us |
1 |
1 |
100.00
|
| chip_sw_csrng_fuse_en_sw_app_read |
1 |
1 |
100.00 |
|
chip_sw_csrng_fuse_en_sw_app_read_test |
271.580s |
4632.467us |
1 |
1 |
100.00
|
| chip_sw_csrng_lc_hw_debug_en |
1 |
1 |
100.00 |
|
chip_sw_csrng_lc_hw_debug_en_test |
354.610s |
5150.370us |
1 |
1 |
100.00
|
| chip_sw_csrng_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_csrng_kat_test |
142.370s |
2897.218us |
1 |
1 |
100.00
|
| chip_sw_edn_entropy_reqs |
3 |
3 |
100.00 |
|
chip_sw_csrng_edn_concurrency |
1938.790s |
11752.546us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_ast_rng_req |
138.510s |
2608.772us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs |
858.150s |
7196.071us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_ast_rng_req |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_ast_rng_req |
138.510s |
2608.772us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_csrng |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
750.340s |
5736.826us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_kat_test |
160.160s |
3161.970us |
1 |
1 |
100.00
|
| chip_sw_flash_init |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1084.130s |
22620.604us |
1 |
1 |
100.00
|
| chip_sw_flash_host_access |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_access |
501.790s |
5421.388us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
590.680s |
5323.961us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_ops |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_ops |
358.710s |
3847.796us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en |
343.370s |
4040.546us |
1 |
1 |
100.00
|
| chip_sw_flash_rma_unlocked |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3551.570s |
43581.346us |
1 |
1 |
100.00
|
| chip_sw_flash_scramble |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1084.130s |
22620.604us |
1 |
1 |
100.00
|
| chip_sw_flash_idle_low_power |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_idle_low_power |
204.520s |
3613.529us |
1 |
1 |
100.00
|
| chip_sw_flash_keymgr_seeds |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
969.850s |
9080.971us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_creator_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
200.420s |
3960.669us |
1 |
1 |
100.00
|
| chip_sw_flash_creator_seed_wipe_on_rma |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3551.570s |
43581.346us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_owner_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
200.420s |
3960.669us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
200.420s |
3960.669us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_wr_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
200.420s |
3960.669us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_seed_hw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
200.420s |
3960.669us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_escalate_en |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
365.140s |
4958.850us |
1 |
1 |
100.00
|
| chip_sw_flash_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
244.370s |
10905.357us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_clock_freqs |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_clock_freqs |
487.940s |
5472.385us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
413.890s |
5196.508us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_write_clear |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
413.890s |
5196.508us |
1 |
1 |
100.00
|
| chip_sw_hmac_enc |
2 |
2 |
100.00 |
|
chip_sw_hmac_enc |
177.800s |
2983.356us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
123.130s |
2666.219us |
1 |
1 |
100.00
|
| chip_sw_hmac_idle |
1 |
1 |
100.00 |
|
chip_sw_hmac_enc_idle |
175.750s |
3305.700us |
1 |
1 |
100.00
|
| chip_sw_hmac_all_configurations |
1 |
1 |
100.00 |
|
chip_sw_hmac_oneshot |
879.690s |
8255.401us |
1 |
1 |
100.00
|
| chip_sw_hmac_multistream_mode |
1 |
1 |
100.00 |
|
chip_sw_hmac_multistream |
705.700s |
5574.136us |
1 |
1 |
100.00
|
| chip_sw_i2c_host_tx_rx |
3 |
3 |
100.00 |
|
chip_sw_i2c_host_tx_rx |
416.100s |
5605.323us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx1 |
282.500s |
3752.656us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx2 |
342.950s |
4702.677us |
1 |
1 |
100.00
|
| chip_sw_i2c_device_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_i2c_device_tx_rx |
337.270s |
4671.278us |
1 |
1 |
100.00
|
| chip_sw_keymgr_key_derivation |
2 |
2 |
100.00 |
|
chip_sw_keymgr_key_derivation |
969.850s |
9080.971us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1296.590s |
10619.336us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_kmac |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_kmac |
930.290s |
8674.037us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_aes |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1272.510s |
9819.658us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_otbn |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_otbn |
2179.120s |
13100.714us |
1 |
1 |
100.00
|
| chip_sw_kmac_enc |
3 |
3 |
100.00 |
|
chip_sw_kmac_mode_cshake |
163.940s |
3235.256us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac |
189.920s |
2489.681us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
197.880s |
3250.427us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_keymgr |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
969.850s |
9080.971us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_lc |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
524.190s |
9346.063us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_rom |
1 |
1 |
100.00 |
|
chip_sw_kmac_app_rom |
159.620s |
3247.507us |
1 |
1 |
100.00
|
| chip_sw_kmac_entropy |
1 |
1 |
100.00 |
|
chip_sw_kmac_entropy |
1079.260s |
7774.271us |
1 |
1 |
100.00
|
| chip_sw_kmac_idle |
1 |
1 |
100.00 |
|
chip_sw_kmac_idle |
144.010s |
2806.228us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_alert_handler_escalation |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
387.970s |
6102.978us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_jtag_access |
3 |
3 |
100.00 |
|
chip_tap_straps_dev |
545.430s |
9003.492us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
85.070s |
3140.625us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
762.820s |
11367.194us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_otp_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
121.510s |
2219.679us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
524.190s |
9346.063us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_transitions |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
524.190s |
9346.063us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_kmac_req |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
524.190s |
9346.063us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_key_div |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation_prod |
1265.640s |
10715.445us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_broadcast |
20 |
22 |
90.91 |
|
chip_prim_tl_access |
244.370s |
10905.357us |
1 |
1 |
100.00
|
|
chip_rv_dm_lc_disabled |
176.990s |
8413.329us |
0 |
1 |
0.00
|
|
chip_sw_flash_ctrl_lc_rw_en |
200.420s |
3960.669us |
1 |
1 |
100.00
|
|
chip_sw_flash_rma_unlocked |
3551.570s |
43581.346us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
145.090s |
3035.452us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
499.820s |
6139.338us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
459.930s |
6170.721us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
364.200s |
5545.903us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
524.190s |
9346.063us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
969.850s |
9080.971us |
1 |
1 |
100.00
|
|
chip_sw_rom_ctrl_integrity_check |
334.710s |
9771.640us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_execution_main |
331.880s |
6471.215us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_lc |
338.650s |
7038.308us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
377.750s |
4303.280us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
351.380s |
4685.120us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
346.140s |
3525.378us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
338.400s |
4170.988us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
379.410s |
4103.064us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
384.190s |
4953.416us |
1 |
1 |
100.00
|
|
chip_tap_straps_dev |
545.430s |
9003.492us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
85.070s |
3140.625us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
762.820s |
11367.194us |
1 |
1 |
100.00
|
| chip_lc_scrap |
4 |
4 |
100.00 |
|
chip_sw_lc_ctrl_rma_to_scrap |
130.200s |
3205.446us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_raw_to_scrap |
93.030s |
2756.817us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_test_locked0_to_scrap |
98.040s |
3121.831us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_rand_to_scrap |
97.860s |
3493.173us |
1 |
1 |
100.00
|
| chip_lc_test_locked |
1 |
2 |
50.00 |
|
chip_rv_dm_lc_disabled |
176.990s |
8413.329us |
0 |
1 |
0.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1226.130s |
23942.569us |
1 |
1 |
100.00
|
| chip_sw_lc_walkthrough |
5 |
5 |
100.00 |
|
chip_sw_lc_walkthrough_dev |
3929.060s |
46721.089us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prod |
3755.370s |
48037.103us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prodend |
525.130s |
8450.568us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_rma |
3594.170s |
48495.858us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1226.130s |
23942.569us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_volatile_raw_unlock |
3 |
3 |
100.00 |
|
chip_sw_lc_ctrl_volatile_raw_unlock |
61.360s |
2786.848us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz |
58.520s |
1908.896us |
1 |
1 |
100.00
|
|
rom_volatile_raw_unlock |
65.420s |
2487.254us |
1 |
1 |
100.00
|
| chip_sw_otbn_op |
2 |
2 |
100.00 |
|
chip_sw_otbn_ecdsa_op_irq |
3158.480s |
16849.618us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3329.150s |
19877.277us |
1 |
1 |
100.00
|
| chip_sw_otbn_rnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
561.850s |
5820.195us |
1 |
1 |
100.00
|
| chip_sw_otbn_urnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
561.850s |
5820.195us |
1 |
1 |
100.00
|
| chip_sw_otbn_idle |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
561.850s |
5820.195us |
1 |
1 |
100.00
|
| chip_sw_otbn_mem_scramble |
1 |
1 |
100.00 |
|
chip_sw_otbn_mem_scramble |
255.820s |
3412.705us |
1 |
1 |
100.00
|
| chip_otp_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
524.190s |
9346.063us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_keys |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1084.130s |
22620.604us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
255.820s |
3412.705us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
969.850s |
9080.971us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
308.690s |
4297.177us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
102.940s |
2934.458us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_entropy |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1084.130s |
22620.604us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
255.820s |
3412.705us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
969.850s |
9080.971us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
308.690s |
4297.177us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
102.940s |
2934.458us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
524.190s |
9346.063us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program_error |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_program_error |
323.360s |
5027.777us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
121.510s |
2219.679us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_lc_signals |
5 |
6 |
83.33 |
|
chip_prim_tl_access |
244.370s |
10905.357us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
145.090s |
3035.452us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
499.820s |
6139.338us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
459.930s |
6170.721us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
364.200s |
5545.903us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
524.190s |
9346.063us |
1 |
1 |
100.00
|
| chip_sw_otp_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
244.370s |
10905.357us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_dai_lock |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_dai_lock |
838.340s |
8006.458us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_external_full_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
217.680s |
7515.029us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_wake_ups |
1125.550s |
26453.345us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_normal_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_wake_ups |
301.870s |
7706.320us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_por_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_por_reset |
345.650s |
7606.858us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_normal_sleep_por_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_por_reset |
334.660s |
6351.239us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_all_wake_ups |
881.690s |
23930.497us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
1 |
2 |
50.00 |
|
chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
832.900s |
13123.407us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_wdog_bite_reset |
326.570s |
7874.007us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
585.650s |
10377.637us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_wdog_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_wdog_reset |
374.320s |
5102.688us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_aon_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
217.680s |
7515.029us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_main_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_main_power_glitch_reset |
262.050s |
5297.304us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_power_glitch_reset |
1699.460s |
35632.511us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
288.820s |
8077.287us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_power_glitch_reset |
243.540s |
4938.883us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1125.810s |
22086.369us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
696.440s |
8060.759us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_all_reset_reqs |
921.470s |
12073.600us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_b2b_sleep_reset_req |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_b2b_sleep_reset_req |
1512.680s |
25359.363us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_disabled |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_disabled |
117.640s |
2308.172us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
365.140s |
4958.850us |
1 |
1 |
100.00
|
| chip_sw_rom_access |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
334.710s |
9771.640us |
1 |
1 |
100.00
|
| chip_sw_rom_ctrl_integrity_check |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
334.710s |
9771.640us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_non_sys_reset_info |
4 |
4 |
100.00 |
|
chip_sw_pwrmgr_all_reset_reqs |
921.470s |
12073.600us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1125.810s |
22086.369us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_wdog_reset |
374.320s |
5102.688us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
282.840s |
5649.218us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sys_reset_info |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
163.710s |
4093.379us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_cpu_info |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
180.830s |
3313.567us |
0 |
1 |
0.00
|
| chip_sw_rstmgr_sw_req_reset |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_req |
274.160s |
3832.626us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_info |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
849.850s |
12417.736us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sw_rst |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_rst |
128.430s |
2699.130us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
365.140s |
4958.850us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_handler_reset_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
781.030s |
6809.159us |
1 |
1 |
100.00
|
| chip_sw_nmi_irq |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_nmi_irq |
459.610s |
4840.214us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_rnd |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_rnd |
509.020s |
4973.783us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_address_translation |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_address_translation |
128.450s |
3146.516us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_icache_scrambled_access |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_icache_invalidate |
102.940s |
2934.458us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_fault_dump |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
180.830s |
3313.567us |
0 |
1 |
0.00
|
| chip_sw_rv_core_ibex_double_fault |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
180.830s |
3313.567us |
0 |
1 |
0.00
|
| chip_jtag_csr_rw |
1 |
1 |
100.00 |
|
chip_jtag_csr_rw |
1301.460s |
18985.517us |
1 |
1 |
100.00
|
| chip_jtag_mem_access |
1 |
1 |
100.00 |
|
chip_jtag_mem_access |
926.290s |
13361.457us |
1 |
1 |
100.00
|
| chip_rv_dm_ndm_reset_req |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
163.710s |
4093.379us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
0 |
1 |
0.00 |
|
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
201.650s |
3188.567us |
0 |
1 |
0.00
|
| chip_rv_dm_access_after_wakeup |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_access_after_wakeup |
299.880s |
5913.987us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_jtag_tap_sel |
1 |
1 |
100.00 |
|
chip_tap_straps_rma |
85.070s |
3140.625us |
1 |
1 |
100.00
|
| chip_rv_dm_lc_disabled |
0 |
1 |
0.00 |
|
chip_rv_dm_lc_disabled |
176.990s |
8413.329us |
0 |
1 |
0.00
|
| chip_sw_plic_all_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
512.880s |
5716.591us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
252.670s |
3710.649us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
390.020s |
3973.613us |
1 |
1 |
100.00
|
| chip_sw_plic_sw_irq |
1 |
1 |
100.00 |
|
chip_sw_plic_sw_irq |
120.570s |
2366.022us |
1 |
1 |
100.00
|
| chip_sw_timer |
1 |
1 |
100.00 |
|
chip_sw_rv_timer_irq |
128.520s |
3306.567us |
1 |
1 |
100.00
|
| chip_sw_spi_device_flash_mode |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2453.250s |
14748.128us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through |
1 |
1 |
100.00 |
|
chip_sw_spi_device_pass_through |
489.170s |
6796.873us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through_collision |
0 |
1 |
0.00 |
|
chip_sw_spi_device_pass_through_collision |
227.560s |
4050.583us |
0 |
1 |
0.00
|
| chip_sw_spi_device_tpm |
1 |
1 |
100.00 |
|
chip_sw_spi_device_tpm |
187.390s |
3583.784us |
1 |
1 |
100.00
|
| chip_sw_spi_host_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_spi_host_tx_rx |
184.260s |
3023.393us |
1 |
1 |
100.00
|
| chip_sw_sram_scrambled_access |
2 |
2 |
100.00 |
|
chip_sw_sram_ctrl_scrambled_access |
308.690s |
4297.177us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
278.260s |
4596.869us |
1 |
1 |
100.00
|
| chip_sw_sleep_sram_ret_contents |
2 |
2 |
100.00 |
|
chip_sw_sleep_sram_ret_contents_no_scramble |
438.560s |
6993.182us |
1 |
1 |
100.00
|
|
chip_sw_sleep_sram_ret_contents_scramble |
329.550s |
6582.290us |
1 |
1 |
100.00
|
| chip_sw_sram_execution |
1 |
1 |
100.00 |
|
chip_sw_sram_ctrl_execution_main |
331.880s |
6471.215us |
1 |
1 |
100.00
|
| chip_sw_sram_lc_escalation |
2 |
2 |
100.00 |
|
chip_sw_all_escalation_resets |
365.140s |
4958.850us |
1 |
1 |
100.00
|
|
chip_sw_data_integrity_escalation |
399.110s |
6344.397us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
696.440s |
8060.759us |
1 |
1 |
100.00
|
|
chip_sw_sysrst_ctrl_reset |
981.860s |
22718.845us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_inputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_inputs |
171.220s |
3052.000us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_outputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_outputs |
196.820s |
3566.448us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_in_irq |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_in_irq |
323.630s |
4464.824us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
981.860s |
22718.845us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_reset |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
981.860s |
22718.845us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_ec_rst_l |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
787.120s |
11667.669us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_flash_wp_l |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
787.120s |
11667.669us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_ulp_z3_wakeup |
1 |
2 |
50.00 |
|
chip_sw_sysrst_ctrl_ulp_z3_wakeup |
244.000s |
5611.988us |
1 |
1 |
100.00
|
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2906.170s |
35072.129us |
0 |
1 |
0.00
|
| chip_sw_usbdev_vbus |
1 |
1 |
100.00 |
|
chip_sw_usbdev_vbus |
173.250s |
2800.124us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pullup |
182.950s |
3267.156us |
1 |
1 |
100.00
|
| chip_sw_usbdev_aon_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_aon_pullup |
249.480s |
2825.934us |
1 |
1 |
100.00
|
| chip_sw_usbdev_setup_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_setuprx |
318.070s |
3978.825us |
1 |
1 |
100.00
|
| chip_sw_usbdev_config_host |
1 |
1 |
100.00 |
|
chip_sw_usbdev_config_host |
1007.080s |
8240.966us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pincfg |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pincfg |
4775.510s |
31380.553us |
1 |
1 |
100.00
|
| chip_sw_usbdev_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_dpi |
1808.060s |
11815.064us |
1 |
1 |
100.00
|
| chip_sw_usbdev_toggle_restore |
1 |
1 |
100.00 |
|
chip_sw_usbdev_toggle_restore |
107.580s |
2811.525us |
1 |
1 |
100.00
|