Simulation Results: spi_device

 
04/12/2025 17:27:49 sha: 45431ee json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.62 %
  • code
  • 94.06 %
  • assert
  • 94.27 %
  • func
  • 71.53 %
  • line
  • 99.11 %
  • branch
  • 98.33 %
  • cond
  • 95.74 %
  • toggle
  • 87.74 %
  • FSM
  • 89.36 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_device_flash_and_tpm 20.910s 8557.780us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_device_csr_hw_reset 1.120s 253.373us 1 1 100.00
csr_rw 1 1 100.00
spi_device_csr_rw 1.020s 40.578us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_device_csr_bit_bash 8.620s 2534.989us 1 1 100.00
csr_aliasing 1 1 100.00
spi_device_csr_aliasing 11.180s 775.722us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_device_csr_mem_rw_with_rand_reset 2.890s 166.496us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_device_csr_rw 1.020s 40.578us 1 1 100.00
spi_device_csr_aliasing 11.180s 775.722us 1 1 100.00
mem_walk 1 1 100.00
spi_device_mem_walk 0.710s 17.227us 1 1 100.00
mem_partial_access 1 1 100.00
spi_device_mem_partial_access 1.800s 68.830us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
csb_read 1 1 100.00
spi_device_csb_read 1.040s 17.767us 1 1 100.00
mem_parity 1 1 100.00
spi_device_mem_parity 1.190s 62.475us 1 1 100.00
mem_cfg 1 1 100.00
spi_device_ram_cfg 0.680s 40.917us 1 1 100.00
tpm_read 1 1 100.00
spi_device_tpm_rw 1.660s 603.961us 1 1 100.00
tpm_write 1 1 100.00
spi_device_tpm_rw 1.660s 603.961us 1 1 100.00
tpm_hw_reg 2 2 100.00
spi_device_tpm_read_hw_reg 12.920s 5835.360us 1 1 100.00
spi_device_tpm_sts_read 0.820s 68.890us 1 1 100.00
tpm_fully_random_case 1 1 100.00
spi_device_tpm_all 17.310s 4613.578us 1 1 100.00
pass_cmd_filtering 2 2 100.00
spi_device_pass_cmd_filtering 8.820s 19764.077us 1 1 100.00
spi_device_flash_all 8.100s 5973.565us 1 1 100.00
pass_addr_translation 2 2 100.00
spi_device_pass_addr_payload_swap 3.050s 947.200us 1 1 100.00
spi_device_flash_all 8.100s 5973.565us 1 1 100.00
pass_payload_translation 2 2 100.00
spi_device_pass_addr_payload_swap 3.050s 947.200us 1 1 100.00
spi_device_flash_all 8.100s 5973.565us 1 1 100.00
cmd_info_slots 1 1 100.00
spi_device_flash_all 8.100s 5973.565us 1 1 100.00
cmd_read_status 2 2 100.00
spi_device_intercept 1.860s 35.549us 1 1 100.00
spi_device_flash_all 8.100s 5973.565us 1 1 100.00
cmd_read_jedec 2 2 100.00
spi_device_intercept 1.860s 35.549us 1 1 100.00
spi_device_flash_all 8.100s 5973.565us 1 1 100.00
cmd_read_sfdp 2 2 100.00
spi_device_intercept 1.860s 35.549us 1 1 100.00
spi_device_flash_all 8.100s 5973.565us 1 1 100.00
cmd_fast_read 2 2 100.00
spi_device_intercept 1.860s 35.549us 1 1 100.00
spi_device_flash_all 8.100s 5973.565us 1 1 100.00
cmd_read_pipeline 2 2 100.00
spi_device_intercept 1.860s 35.549us 1 1 100.00
spi_device_flash_all 8.100s 5973.565us 1 1 100.00
flash_cmd_upload 1 1 100.00
spi_device_upload 14.560s 6471.417us 1 1 100.00
mailbox_command 1 1 100.00
spi_device_mailbox 3.760s 500.994us 1 1 100.00
mailbox_cross_outside_command 1 1 100.00
spi_device_mailbox 3.760s 500.994us 1 1 100.00
mailbox_cross_inside_command 1 1 100.00
spi_device_mailbox 3.760s 500.994us 1 1 100.00
cmd_read_buffer 2 2 100.00
spi_device_flash_mode 2.820s 393.263us 1 1 100.00
spi_device_read_buffer_direct 5.980s 5309.839us 1 1 100.00
cmd_dummy_cycle 2 2 100.00
spi_device_mailbox 3.760s 500.994us 1 1 100.00
spi_device_flash_all 8.100s 5973.565us 1 1 100.00
quad_spi 1 1 100.00
spi_device_flash_all 8.100s 5973.565us 1 1 100.00
dual_spi 1 1 100.00
spi_device_flash_all 8.100s 5973.565us 1 1 100.00
4b_3b_feature 1 1 100.00
spi_device_cfg_cmd 4.100s 1114.443us 1 1 100.00
write_enable_disable 1 1 100.00
spi_device_cfg_cmd 4.100s 1114.443us 1 1 100.00
TPM_with_flash_or_passthrough_mode 1 1 100.00
spi_device_flash_and_tpm 20.910s 8557.780us 1 1 100.00
tpm_and_flash_trans_with_min_inactive_time 1 1 100.00
spi_device_flash_and_tpm_min_idle 217.640s 27230.276us 1 1 100.00
stress_all 1 1 100.00
spi_device_stress_all 190.250s 31087.802us 1 1 100.00
alert_test 1 1 100.00
spi_device_alert_test 0.740s 27.322us 1 1 100.00
intr_test 1 1 100.00
spi_device_intr_test 0.760s 49.400us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_device_tl_errors 1.490s 58.338us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_device_tl_errors 1.490s 58.338us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_device_csr_hw_reset 1.120s 253.373us 1 1 100.00
spi_device_csr_rw 1.020s 40.578us 1 1 100.00
spi_device_csr_aliasing 11.180s 775.722us 1 1 100.00
spi_device_same_csr_outstanding 2.850s 245.890us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_device_csr_hw_reset 1.120s 253.373us 1 1 100.00
spi_device_csr_rw 1.020s 40.578us 1 1 100.00
spi_device_csr_aliasing 11.180s 775.722us 1 1 100.00
spi_device_same_csr_outstanding 2.850s 245.890us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_device_tl_intg_err 4.270s 203.586us 1 1 100.00
spi_device_sec_cm 1.100s 137.761us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_device_tl_intg_err 4.270s 203.586us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
spi_device_flash_mode_ignore_cmds 20.450s 5218.615us 1 1 100.00