Simulation Results: spi_device

 
08/12/2025 17:17:43 sha: cbcfe8e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 85.32 %
  • code
  • 93.25 %
  • assert
  • 94.30 %
  • func
  • 68.40 %
  • line
  • 99.10 %
  • branch
  • 98.35 %
  • cond
  • 95.91 %
  • toggle
  • 83.54 %
  • FSM
  • 89.36 %
Validation stages
V1
100.00%
V2
96.15%
V2S
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_device_flash_and_tpm 23.440s 2294.560us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_device_csr_hw_reset 0.880s 61.514us 1 1 100.00
csr_rw 1 1 100.00
spi_device_csr_rw 1.430s 59.327us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_device_csr_bit_bash 14.880s 1975.260us 1 1 100.00
csr_aliasing 1 1 100.00
spi_device_csr_aliasing 15.090s 1831.671us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_device_csr_mem_rw_with_rand_reset 1.330s 86.648us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_device_csr_rw 1.430s 59.327us 1 1 100.00
spi_device_csr_aliasing 15.090s 1831.671us 1 1 100.00
mem_walk 1 1 100.00
spi_device_mem_walk 0.690s 42.445us 1 1 100.00
mem_partial_access 1 1 100.00
spi_device_mem_partial_access 1.410s 47.511us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
csb_read 1 1 100.00
spi_device_csb_read 0.830s 15.984us 1 1 100.00
mem_parity 0 1 0.00
spi_device_mem_parity 0.900s 19.053us 0 1 0.00
mem_cfg 0 1 0.00
spi_device_ram_cfg 0.670s 3.260us 0 1 0.00
tpm_read 1 1 100.00
spi_device_tpm_rw 3.030s 217.104us 1 1 100.00
tpm_write 1 1 100.00
spi_device_tpm_rw 3.030s 217.104us 1 1 100.00
tpm_hw_reg 2 2 100.00
spi_device_tpm_read_hw_reg 4.210s 2069.590us 1 1 100.00
spi_device_tpm_sts_read 0.790s 160.105us 1 1 100.00
tpm_fully_random_case 1 1 100.00
spi_device_tpm_all 3.730s 2089.603us 1 1 100.00
pass_cmd_filtering 2 2 100.00
spi_device_pass_cmd_filtering 2.390s 1849.311us 1 1 100.00
spi_device_flash_all 94.390s 23052.753us 1 1 100.00
pass_addr_translation 2 2 100.00
spi_device_pass_addr_payload_swap 6.580s 9477.033us 1 1 100.00
spi_device_flash_all 94.390s 23052.753us 1 1 100.00
pass_payload_translation 2 2 100.00
spi_device_pass_addr_payload_swap 6.580s 9477.033us 1 1 100.00
spi_device_flash_all 94.390s 23052.753us 1 1 100.00
cmd_info_slots 1 1 100.00
spi_device_flash_all 94.390s 23052.753us 1 1 100.00
cmd_read_status 2 2 100.00
spi_device_intercept 3.880s 1539.877us 1 1 100.00
spi_device_flash_all 94.390s 23052.753us 1 1 100.00
cmd_read_jedec 2 2 100.00
spi_device_intercept 3.880s 1539.877us 1 1 100.00
spi_device_flash_all 94.390s 23052.753us 1 1 100.00
cmd_read_sfdp 2 2 100.00
spi_device_intercept 3.880s 1539.877us 1 1 100.00
spi_device_flash_all 94.390s 23052.753us 1 1 100.00
cmd_fast_read 2 2 100.00
spi_device_intercept 3.880s 1539.877us 1 1 100.00
spi_device_flash_all 94.390s 23052.753us 1 1 100.00
cmd_read_pipeline 2 2 100.00
spi_device_intercept 3.880s 1539.877us 1 1 100.00
spi_device_flash_all 94.390s 23052.753us 1 1 100.00
flash_cmd_upload 1 1 100.00
spi_device_upload 3.370s 276.232us 1 1 100.00
mailbox_command 1 1 100.00
spi_device_mailbox 1.490s 33.424us 1 1 100.00
mailbox_cross_outside_command 1 1 100.00
spi_device_mailbox 1.490s 33.424us 1 1 100.00
mailbox_cross_inside_command 1 1 100.00
spi_device_mailbox 1.490s 33.424us 1 1 100.00
cmd_read_buffer 2 2 100.00
spi_device_flash_mode 3.250s 1815.141us 1 1 100.00
spi_device_read_buffer_direct 12.220s 4104.810us 1 1 100.00
cmd_dummy_cycle 2 2 100.00
spi_device_mailbox 1.490s 33.424us 1 1 100.00
spi_device_flash_all 94.390s 23052.753us 1 1 100.00
quad_spi 1 1 100.00
spi_device_flash_all 94.390s 23052.753us 1 1 100.00
dual_spi 1 1 100.00
spi_device_flash_all 94.390s 23052.753us 1 1 100.00
4b_3b_feature 1 1 100.00
spi_device_cfg_cmd 2.230s 118.677us 1 1 100.00
write_enable_disable 1 1 100.00
spi_device_cfg_cmd 2.230s 118.677us 1 1 100.00
TPM_with_flash_or_passthrough_mode 1 1 100.00
spi_device_flash_and_tpm 23.440s 2294.560us 1 1 100.00
tpm_and_flash_trans_with_min_inactive_time 1 1 100.00
spi_device_flash_and_tpm_min_idle 18.440s 1862.636us 1 1 100.00
stress_all 1 1 100.00
spi_device_stress_all 467.730s 84743.834us 1 1 100.00
alert_test 1 1 100.00
spi_device_alert_test 0.660s 15.868us 1 1 100.00
intr_test 1 1 100.00
spi_device_intr_test 0.690s 60.438us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_device_tl_errors 2.130s 169.896us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_device_tl_errors 2.130s 169.896us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_device_csr_hw_reset 0.880s 61.514us 1 1 100.00
spi_device_csr_rw 1.430s 59.327us 1 1 100.00
spi_device_csr_aliasing 15.090s 1831.671us 1 1 100.00
spi_device_same_csr_outstanding 2.540s 90.870us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_device_csr_hw_reset 0.880s 61.514us 1 1 100.00
spi_device_csr_rw 1.430s 59.327us 1 1 100.00
spi_device_csr_aliasing 15.090s 1831.671us 1 1 100.00
spi_device_same_csr_outstanding 2.540s 90.870us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_device_sec_cm 0.920s 80.408us 1 1 100.00
spi_device_tl_intg_err 5.620s 1676.081us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_device_tl_intg_err 5.620s 1676.081us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
spi_device_flash_mode_ignore_cmds 6.260s 925.112us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
spi_device_mem_parity 65960779744441936617200857607082946520952360898352757156693727383387601263564 73
UVM_ERROR @ 10302792 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[53])
Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR @ 10302792 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))
UVM_ERROR @ 10302792 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[949])
Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])
spi_device_ram_cfg 18786138177534309685089816693040537818101542263405741574078433818154968300531 73
UVM_ERROR @ 839231 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xfdb291 [111111011011001010010001] vs 0x0 [0])
UVM_ERROR @ 852231 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xdf5b60 [110111110101101101100000] vs 0x0 [0])
UVM_ERROR @ 942231 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xc32d69 [110000110010110101101001] vs 0x0 [0])
UVM_ERROR @ 944231 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x690010 [11010010000000000010000] vs 0x0 [0])
UVM_ERROR @ 1012231 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xeb366c [111010110011011001101100] vs 0x0 [0])