Simulation Results: aes

 
09/12/2025 17:14:15 sha: 42dbfeb json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 89.83 %
  • code
  • 91.71 %
  • assert
  • 97.50 %
  • func
  • 80.28 %
  • block
  • 92.40 %
  • line
  • 94.21 %
  • branch
  • 85.76 %
  • toggle
  • 97.99 %
  • FSM
  • 88.89 %
Validation stages
V1
100.00%
V2
100.00%
V2S
87.30%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 114.218us 1 1 100.00
smoke 1 1 100.00
aes_smoke 2.000s 105.208us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 100.146us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 100.860us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 5.000s 185.337us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 131.928us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 149.456us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 100.860us 1 1 100.00
aes_csr_aliasing 2.000s 131.928us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 2.000s 105.208us 1 1 100.00
aes_config_error 3.000s 272.218us 1 1 100.00
aes_stress 2.000s 88.868us 1 1 100.00
key_length 3 3 100.00
aes_smoke 2.000s 105.208us 1 1 100.00
aes_config_error 3.000s 272.218us 1 1 100.00
aes_stress 2.000s 88.868us 1 1 100.00
back2back 2 2 100.00
aes_stress 2.000s 88.868us 1 1 100.00
aes_b2b 5.000s 300.959us 1 1 100.00
backpressure 1 1 100.00
aes_stress 2.000s 88.868us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 2.000s 105.208us 1 1 100.00
aes_config_error 3.000s 272.218us 1 1 100.00
aes_stress 2.000s 88.868us 1 1 100.00
aes_alert_reset 2.000s 69.547us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 88.088us 1 1 100.00
aes_config_error 3.000s 272.218us 1 1 100.00
aes_alert_reset 2.000s 69.547us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 2.000s 86.717us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 3.000s 111.041us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 2.000s 69.547us 1 1 100.00
stress 1 1 100.00
aes_stress 2.000s 88.868us 1 1 100.00
sideload 2 2 100.00
aes_stress 2.000s 88.868us 1 1 100.00
aes_sideload 2.000s 85.496us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 2.000s 75.433us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 15.000s 633.742us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 1.000s 56.167us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 3.000s 693.294us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 3.000s 693.294us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 100.146us 1 1 100.00
aes_csr_rw 2.000s 100.860us 1 1 100.00
aes_csr_aliasing 2.000s 131.928us 1 1 100.00
aes_same_csr_outstanding 2.000s 218.799us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 100.146us 1 1 100.00
aes_csr_rw 2.000s 100.860us 1 1 100.00
aes_csr_aliasing 2.000s 131.928us 1 1 100.00
aes_same_csr_outstanding 2.000s 218.799us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 2.000s 151.601us 1 1 100.00
fault_inject 2 3 66.67
aes_fi 3.000s 67.771us 1 1 100.00
aes_control_fi 2.000s 59.031us 1 1 100.00
aes_cipher_fi 0.000s 0.000us 0 1 0.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 116.763us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 116.763us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 116.763us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 116.763us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 268.665us 1 1 100.00
tl_intg_err 2 2 100.00
aes_tl_intg_err 2.000s 261.675us 1 1 100.00
aes_sec_cm 3.000s 2117.197us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 261.675us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 2.000s 69.547us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 116.763us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 2.000s 105.208us 1 1 100.00
aes_stress 2.000s 88.868us 1 1 100.00
aes_alert_reset 2.000s 69.547us 1 1 100.00
aes_core_fi 2.000s 320.011us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 116.763us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 74.356us 1 1 100.00
aes_stress 2.000s 88.868us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 2.000s 88.868us 1 1 100.00
aes_sideload 2.000s 85.496us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 74.356us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 74.356us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 74.356us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 74.356us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 74.356us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 2.000s 88.868us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 2.000s 88.868us 1 1 100.00
sec_cm_main_fsm_sparse 1 1 100.00
aes_fi 3.000s 67.771us 1 1 100.00
sec_cm_main_fsm_redun 3 4 75.00
aes_fi 3.000s 67.771us 1 1 100.00
aes_control_fi 2.000s 59.031us 1 1 100.00
aes_cipher_fi 0.000s 0.000us 0 1 0.00
aes_ctr_fi 2.000s 49.788us 1 1 100.00
sec_cm_cipher_fsm_sparse 1 1 100.00
aes_fi 3.000s 67.771us 1 1 100.00
sec_cm_cipher_fsm_redun 2 3 66.67
aes_fi 3.000s 67.771us 1 1 100.00
aes_control_fi 2.000s 59.031us 1 1 100.00
aes_cipher_fi 0.000s 0.000us 0 1 0.00
sec_cm_cipher_ctr_redun 0 1 0.00
aes_cipher_fi 0.000s 0.000us 0 1 0.00
sec_cm_ctr_fsm_sparse 1 1 100.00
aes_fi 3.000s 67.771us 1 1 100.00
sec_cm_ctr_fsm_redun 3 3 100.00
aes_fi 3.000s 67.771us 1 1 100.00
aes_control_fi 2.000s 59.031us 1 1 100.00
aes_ctr_fi 2.000s 49.788us 1 1 100.00
sec_cm_ctrl_sparse 3 4 75.00
aes_fi 3.000s 67.771us 1 1 100.00
aes_control_fi 2.000s 59.031us 1 1 100.00
aes_cipher_fi 0.000s 0.000us 0 1 0.00
aes_ctr_fi 2.000s 49.788us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 2.000s 69.547us 1 1 100.00
sec_cm_main_fsm_local_esc 3 4 75.00
aes_fi 3.000s 67.771us 1 1 100.00
aes_control_fi 2.000s 59.031us 1 1 100.00
aes_cipher_fi 0.000s 0.000us 0 1 0.00
aes_ctr_fi 2.000s 49.788us 1 1 100.00
sec_cm_cipher_fsm_local_esc 3 4 75.00
aes_fi 3.000s 67.771us 1 1 100.00
aes_control_fi 2.000s 59.031us 1 1 100.00
aes_cipher_fi 0.000s 0.000us 0 1 0.00
aes_ctr_fi 2.000s 49.788us 1 1 100.00
sec_cm_ctr_fsm_local_esc 3 3 100.00
aes_fi 3.000s 67.771us 1 1 100.00
aes_control_fi 2.000s 59.031us 1 1 100.00
aes_ctr_fi 2.000s 49.788us 1 1 100.00
sec_cm_data_reg_local_esc 2 3 66.67
aes_fi 3.000s 67.771us 1 1 100.00
aes_control_fi 2.000s 59.031us 1 1 100.00
aes_cipher_fi 0.000s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 6.000s 271.799us 0 1 0.00

Error Messages

   Test seed line log context
Job timed out after * minutes
aes_cipher_fi 113292920981817328200971406188982737174500357025031053612422130964610475616517 None
Job timed out after 1 minutes
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 93516304295409827002130093810663583126507746981923008334169438028538474485785 484
UVM_ERROR @ 271798851 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 271798851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---