Simulation Results: keymgr

 
09/12/2025 17:14:15 sha: 42dbfeb json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 84.77 %
  • code
  • 95.14 %
  • assert
  • 97.49 %
  • func
  • 61.69 %
  • line
  • 98.74 %
  • branch
  • 97.67 %
  • cond
  • 93.92 %
  • toggle
  • 97.01 %
  • FSM
  • 88.37 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 1.970s 47.145us 1 1 100.00
random 1 1 100.00
keymgr_random 3.710s 1516.495us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 0.880s 109.572us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 1.350s 91.759us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 5.150s 131.911us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 5.870s 126.702us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.170s 28.379us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 1.350s 91.759us 1 1 100.00
keymgr_csr_aliasing 5.870s 126.702us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 2.030s 34.937us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 2.370s 238.033us 1 1 100.00
keymgr_sideload_kmac 4.000s 195.979us 1 1 100.00
keymgr_sideload_aes 2.620s 109.765us 1 1 100.00
keymgr_sideload_otbn 2.250s 55.382us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 2.010s 384.951us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 3.140s 289.073us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 1.880s 137.056us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 2.900s 122.438us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 28.120s 5501.758us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 2.370s 269.222us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 23.850s 3209.850us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.780s 11.100us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.900s 15.651us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.480s 196.368us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.480s 196.368us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 0.880s 109.572us 1 1 100.00
keymgr_csr_rw 1.350s 91.759us 1 1 100.00
keymgr_csr_aliasing 5.870s 126.702us 1 1 100.00
keymgr_same_csr_outstanding 2.130s 349.104us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 0.880s 109.572us 1 1 100.00
keymgr_csr_rw 1.350s 91.759us 1 1 100.00
keymgr_csr_aliasing 5.870s 126.702us 1 1 100.00
keymgr_same_csr_outstanding 2.130s 349.104us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 8.210s 5155.819us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_tl_intg_err 3.220s 102.383us 1 1 100.00
keymgr_sec_cm 8.210s 5155.819us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 5.170s 288.964us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 5.170s 288.964us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 5.170s 288.964us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 5.170s 288.964us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 4.100s 116.566us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 8.210s 5155.819us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 8.210s 5155.819us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 3.220s 102.383us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 5.170s 288.964us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 2.030s 34.937us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_csr_rw 1.350s 91.759us 1 1 100.00
keymgr_random 3.710s 1516.495us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_csr_rw 1.350s 91.759us 1 1 100.00
keymgr_random 3.710s 1516.495us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_csr_rw 1.350s 91.759us 1 1 100.00
keymgr_random 3.710s 1516.495us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 3.140s 289.073us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 28.120s 5501.758us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 28.120s 5501.758us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 3.710s 1516.495us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 2.900s 155.746us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.210s 5155.819us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.210s 5155.819us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 8.210s 5155.819us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 2.900s 85.939us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 3.140s 289.073us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 8.210s 5155.819us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.210s 5155.819us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 8.210s 5155.819us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.900s 85.939us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.900s 85.939us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 8.210s 5155.819us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.900s 85.939us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.210s 5155.819us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 2.900s 85.939us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 8.310s 321.186us 1 1 100.00

Error Messages

   Test seed line log context