Simulation Results: pwm

 
09/12/2025 17:14:15 sha: 42dbfeb json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 97.58 %
  • code
  • 96.07 %
  • assert
  • 98.00 %
  • func
  • 98.68 %
  • block
  • 98.95 %
  • line
  • 99.21 %
  • branch
  • 98.14 %
  • toggle
  • 90.87 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
pwm_smoke 4.000s 538.199us 1 1 100.00
csr_hw_reset 1 1 100.00
pwm_csr_hw_reset 1.000s 19.564us 1 1 100.00
csr_rw 1 1 100.00
pwm_csr_rw 1.000s 24.062us 1 1 100.00
csr_bit_bash 1 1 100.00
pwm_csr_bit_bash 7.000s 275.150us 1 1 100.00
csr_aliasing 1 1 100.00
pwm_csr_aliasing 2.000s 138.016us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
pwm_csr_mem_rw_with_rand_reset 1.000s 35.057us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
pwm_csr_rw 1.000s 24.062us 1 1 100.00
pwm_csr_aliasing 2.000s 138.016us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dutycycle 1 1 100.00
pwm_rand_output 30.000s 22340.580us 1 1 100.00
pulse 1 1 100.00
pwm_rand_output 30.000s 22340.580us 1 1 100.00
blink 1 1 100.00
pwm_rand_output 30.000s 22340.580us 1 1 100.00
heartbeat 1 1 100.00
pwm_rand_output 30.000s 22340.580us 1 1 100.00
resolution 1 1 100.00
pwm_rand_output 30.000s 22340.580us 1 1 100.00
multi_channel 1 1 100.00
pwm_rand_output 30.000s 22340.580us 1 1 100.00
polarity 1 1 100.00
pwm_rand_output 30.000s 22340.580us 1 1 100.00
phase 2 2 100.00
pwm_rand_output 30.000s 22340.580us 1 1 100.00
pwm_phase 30.000s 11234.635us 1 1 100.00
lowpower 1 1 100.00
pwm_rand_output 30.000s 22340.580us 1 1 100.00
perf 1 1 100.00
pwm_perf 39.000s 41097.034us 1 1 100.00
regwen 1 1 100.00
pwm_regwen 135.000s 10835.376us 1 1 100.00
stress_all 1 1 100.00
pwm_stress_all 105.000s 135535.874us 1 1 100.00
alert_test 1 1 100.00
pwm_alert_test 2.000s 24.529us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
pwm_tl_errors 2.000s 43.481us 1 1 100.00
tl_d_illegal_access 1 1 100.00
pwm_tl_errors 2.000s 43.481us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
pwm_csr_hw_reset 1.000s 19.564us 1 1 100.00
pwm_csr_rw 1.000s 24.062us 1 1 100.00
pwm_csr_aliasing 2.000s 138.016us 1 1 100.00
pwm_same_csr_outstanding 2.000s 217.383us 1 1 100.00
tl_d_partial_access 4 4 100.00
pwm_csr_hw_reset 1.000s 19.564us 1 1 100.00
pwm_csr_rw 1.000s 24.062us 1 1 100.00
pwm_csr_aliasing 2.000s 138.016us 1 1 100.00
pwm_same_csr_outstanding 2.000s 217.383us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
pwm_sec_cm 1.000s 65.320us 1 1 100.00
pwm_tl_intg_err 2.000s 123.404us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
pwm_tl_intg_err 2.000s 123.404us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
heartbeat_wrap 1 1 100.00
pwm_heartbeat_wrap 35.000s 10828.644us 1 1 100.00

Error Messages

   Test seed line log context