spi_device Simulation Results

Simulation Results: spi_device

09/12/2025 17:14:15 sha: 42dbfeb json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
89.29 %

code
93.27 %

assert
94.30 %

func
80.31 %

line
99.11 %

branch
98.37 %

cond
95.97 %

toggle
83.54 %

FSM
89.36 %

Validation stages

V1		100.00%
V2		96.15%
V2S		100.00%
unmapped		100.00%

10/10 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	spi_device_flash_and_tpm	172.410s	63125.435us	1	1	100.00
csr_hw_reset				1	1	100.00
	spi_device_csr_hw_reset	1.410s	32.312us	1	1	100.00
csr_rw				1	1	100.00
	spi_device_csr_rw	1.340s	147.390us	1	1	100.00
csr_bit_bash				1	1	100.00
	spi_device_csr_bit_bash	9.550s	824.711us	1	1	100.00
csr_aliasing				1	1	100.00
	spi_device_csr_aliasing	7.600s	2271.212us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	spi_device_csr_mem_rw_with_rand_reset	3.060s	50.052us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	spi_device_csr_rw	1.340s	147.390us	1	1	100.00
	spi_device_csr_aliasing	7.600s	2271.212us	1	1	100.00
mem_walk				1	1	100.00
	spi_device_mem_walk	0.970s	10.605us	1	1	100.00
mem_partial_access				1	1	100.00
	spi_device_mem_partial_access	1.630s	47.898us	1	1	100.00

50/52 passed

96.15 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
csb_read				1	1	100.00
	spi_device_csb_read	0.790s	21.810us	1	1	100.00
mem_parity				0	1	0.00
	spi_device_mem_parity	0.650s	6.660us	0	1	0.00
mem_cfg				0	1	0.00
	spi_device_ram_cfg	0.700s	6.808us	0	1	0.00
tpm_read				1	1	100.00
	spi_device_tpm_rw	1.290s	98.676us	1	1	100.00
tpm_write				1	1	100.00
	spi_device_tpm_rw	1.290s	98.676us	1	1	100.00
tpm_hw_reg				2	2	100.00
	spi_device_tpm_read_hw_reg	4.660s	4390.376us	1	1	100.00
	spi_device_tpm_sts_read	0.860s	579.483us	1	1	100.00
tpm_fully_random_case				1	1	100.00
	spi_device_tpm_all	21.260s	5870.253us	1	1	100.00
pass_cmd_filtering				2	2	100.00
	spi_device_pass_cmd_filtering	5.460s	9559.807us	1	1	100.00
	spi_device_flash_all	33.900s	7420.629us	1	1	100.00
pass_addr_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	15.370s	36522.748us	1	1	100.00
	spi_device_flash_all	33.900s	7420.629us	1	1	100.00
pass_payload_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	15.370s	36522.748us	1	1	100.00
	spi_device_flash_all	33.900s	7420.629us	1	1	100.00
cmd_info_slots				1	1	100.00
	spi_device_flash_all	33.900s	7420.629us	1	1	100.00
cmd_read_status				2	2	100.00
	spi_device_intercept	2.630s	93.164us	1	1	100.00
	spi_device_flash_all	33.900s	7420.629us	1	1	100.00
cmd_read_jedec				2	2	100.00
	spi_device_intercept	2.630s	93.164us	1	1	100.00
	spi_device_flash_all	33.900s	7420.629us	1	1	100.00
cmd_read_sfdp				2	2	100.00
	spi_device_intercept	2.630s	93.164us	1	1	100.00
	spi_device_flash_all	33.900s	7420.629us	1	1	100.00
cmd_fast_read				2	2	100.00
	spi_device_intercept	2.630s	93.164us	1	1	100.00
	spi_device_flash_all	33.900s	7420.629us	1	1	100.00
cmd_read_pipeline				2	2	100.00
	spi_device_intercept	2.630s	93.164us	1	1	100.00
	spi_device_flash_all	33.900s	7420.629us	1	1	100.00
flash_cmd_upload				1	1	100.00
	spi_device_upload	2.920s	168.544us	1	1	100.00
mailbox_command				1	1	100.00
	spi_device_mailbox	14.310s	1735.920us	1	1	100.00
mailbox_cross_outside_command				1	1	100.00
	spi_device_mailbox	14.310s	1735.920us	1	1	100.00
mailbox_cross_inside_command				1	1	100.00
	spi_device_mailbox	14.310s	1735.920us	1	1	100.00
cmd_read_buffer				2	2	100.00
	spi_device_flash_mode	2.630s	140.593us	1	1	100.00
	spi_device_read_buffer_direct	10.860s	3906.325us	1	1	100.00
cmd_dummy_cycle				2	2	100.00
	spi_device_mailbox	14.310s	1735.920us	1	1	100.00
	spi_device_flash_all	33.900s	7420.629us	1	1	100.00
quad_spi				1	1	100.00
	spi_device_flash_all	33.900s	7420.629us	1	1	100.00
dual_spi				1	1	100.00
	spi_device_flash_all	33.900s	7420.629us	1	1	100.00
4b_3b_feature				1	1	100.00
	spi_device_cfg_cmd	2.360s	174.162us	1	1	100.00
write_enable_disable				1	1	100.00
	spi_device_cfg_cmd	2.360s	174.162us	1	1	100.00
TPM_with_flash_or_passthrough_mode				1	1	100.00
	spi_device_flash_and_tpm	172.410s	63125.435us	1	1	100.00
tpm_and_flash_trans_with_min_inactive_time				1	1	100.00
	spi_device_flash_and_tpm_min_idle	458.630s	85919.981us	1	1	100.00
stress_all				1	1	100.00
	spi_device_stress_all	372.740s	201686.209us	1	1	100.00
alert_test				1	1	100.00
	spi_device_alert_test	0.950s	53.191us	1	1	100.00
intr_test				1	1	100.00
	spi_device_intr_test	0.910s	19.737us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	spi_device_tl_errors	1.930s	87.656us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	spi_device_tl_errors	1.930s	87.656us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	spi_device_csr_hw_reset	1.410s	32.312us	1	1	100.00
	spi_device_csr_rw	1.340s	147.390us	1	1	100.00
	spi_device_csr_aliasing	7.600s	2271.212us	1	1	100.00
	spi_device_same_csr_outstanding	1.770s	244.869us	1	1	100.00
tl_d_partial_access				4	4	100.00
	spi_device_csr_hw_reset	1.410s	32.312us	1	1	100.00
	spi_device_csr_rw	1.340s	147.390us	1	1	100.00
	spi_device_csr_aliasing	7.600s	2271.212us	1	1	100.00
	spi_device_same_csr_outstanding	1.770s	244.869us	1	1	100.00

V2S

3/3 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	spi_device_tl_intg_err	11.990s	2292.020us	1	1	100.00
	spi_device_sec_cm	0.940s	192.885us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	spi_device_tl_intg_err	11.990s	2292.020us	1	1	100.00

unmapped

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				1	1	100.00
	spi_device_flash_mode_ignore_cmds	27.510s	3457.421us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
	spi_device_mem_parity	106652221296477852192740638934033744914230855916146173368431215953731316942883	73	UVM_ERROR @ 3826712 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[55]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name UVM_ERROR @ 3826712 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data)) UVM_ERROR @ 3826712 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[951]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [] vs [*])
	spi_device_ram_cfg	47500295259811703409658111102207923821476116080868615609245202142287807417629	73	UVM_ERROR @ 4193419 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x8ab27a [100010101011001001111010] vs 0x0 [0]) UVM_ERROR @ 4216419 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x807b80 [100000000111101110000000] vs 0x0 [0]) UVM_ERROR @ 4269419 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xdf74f0 [110111110111010011110000] vs 0x0 [0]) UVM_ERROR @ 4306419 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x6028bf [11000000010100010111111] vs 0x0 [0]) UVM_ERROR @ 4361419 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x51eda9 [10100011110110110101001] vs 0x0 [0])