spi_device Simulation Results

Simulation Results: spi_device

10/12/2025 17:25:01 sha: 94ad61f json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
87.91 %

code
93.27 %

assert
94.16 %

func
76.29 %

line
99.08 %

branch
98.30 %

cond
96.06 %

toggle
83.54 %

FSM
89.36 %

Validation stages

V1		100.00%
V2		96.15%
V2S		100.00%
unmapped		100.00%

10/10 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	spi_device_flash_and_tpm	276.120s	46511.716us	1	1	100.00
csr_hw_reset				1	1	100.00
	spi_device_csr_hw_reset	1.240s	47.710us	1	1	100.00
csr_rw				1	1	100.00
	spi_device_csr_rw	1.680s	300.192us	1	1	100.00
csr_bit_bash				1	1	100.00
	spi_device_csr_bit_bash	23.250s	5219.663us	1	1	100.00
csr_aliasing				1	1	100.00
	spi_device_csr_aliasing	14.170s	1233.493us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	spi_device_csr_mem_rw_with_rand_reset	1.620s	112.806us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	spi_device_csr_rw	1.680s	300.192us	1	1	100.00
	spi_device_csr_aliasing	14.170s	1233.493us	1	1	100.00
mem_walk				1	1	100.00
	spi_device_mem_walk	0.640s	35.407us	1	1	100.00
mem_partial_access				1	1	100.00
	spi_device_mem_partial_access	1.420s	106.951us	1	1	100.00

50/52 passed

96.15 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
csb_read				1	1	100.00
	spi_device_csb_read	0.960s	33.337us	1	1	100.00
mem_parity				0	1	0.00
	spi_device_mem_parity	0.880s	1.394us	0	1	0.00
mem_cfg				0	1	0.00
	spi_device_ram_cfg	0.700s	7.096us	0	1	0.00
tpm_read				1	1	100.00
	spi_device_tpm_rw	2.990s	699.883us	1	1	100.00
tpm_write				1	1	100.00
	spi_device_tpm_rw	2.990s	699.883us	1	1	100.00
tpm_hw_reg				2	2	100.00
	spi_device_tpm_read_hw_reg	2.430s	438.081us	1	1	100.00
	spi_device_tpm_sts_read	1.100s	195.694us	1	1	100.00
tpm_fully_random_case				1	1	100.00
	spi_device_tpm_all	19.240s	7468.177us	1	1	100.00
pass_cmd_filtering				2	2	100.00
	spi_device_pass_cmd_filtering	2.820s	349.882us	1	1	100.00
	spi_device_flash_all	79.810s	18904.695us	1	1	100.00
pass_addr_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	1.840s	350.387us	1	1	100.00
	spi_device_flash_all	79.810s	18904.695us	1	1	100.00
pass_payload_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	1.840s	350.387us	1	1	100.00
	spi_device_flash_all	79.810s	18904.695us	1	1	100.00
cmd_info_slots				1	1	100.00
	spi_device_flash_all	79.810s	18904.695us	1	1	100.00
cmd_read_status				2	2	100.00
	spi_device_intercept	5.440s	3629.165us	1	1	100.00
	spi_device_flash_all	79.810s	18904.695us	1	1	100.00
cmd_read_jedec				2	2	100.00
	spi_device_intercept	5.440s	3629.165us	1	1	100.00
	spi_device_flash_all	79.810s	18904.695us	1	1	100.00
cmd_read_sfdp				2	2	100.00
	spi_device_intercept	5.440s	3629.165us	1	1	100.00
	spi_device_flash_all	79.810s	18904.695us	1	1	100.00
cmd_fast_read				2	2	100.00
	spi_device_intercept	5.440s	3629.165us	1	1	100.00
	spi_device_flash_all	79.810s	18904.695us	1	1	100.00
cmd_read_pipeline				2	2	100.00
	spi_device_intercept	5.440s	3629.165us	1	1	100.00
	spi_device_flash_all	79.810s	18904.695us	1	1	100.00
flash_cmd_upload				1	1	100.00
	spi_device_upload	7.940s	4811.360us	1	1	100.00
mailbox_command				1	1	100.00
	spi_device_mailbox	10.550s	1073.009us	1	1	100.00
mailbox_cross_outside_command				1	1	100.00
	spi_device_mailbox	10.550s	1073.009us	1	1	100.00
mailbox_cross_inside_command				1	1	100.00
	spi_device_mailbox	10.550s	1073.009us	1	1	100.00
cmd_read_buffer				2	2	100.00
	spi_device_flash_mode	32.090s	3814.386us	1	1	100.00
	spi_device_read_buffer_direct	7.920s	1335.251us	1	1	100.00
cmd_dummy_cycle				2	2	100.00
	spi_device_mailbox	10.550s	1073.009us	1	1	100.00
	spi_device_flash_all	79.810s	18904.695us	1	1	100.00
quad_spi				1	1	100.00
	spi_device_flash_all	79.810s	18904.695us	1	1	100.00
dual_spi				1	1	100.00
	spi_device_flash_all	79.810s	18904.695us	1	1	100.00
4b_3b_feature				1	1	100.00
	spi_device_cfg_cmd	2.530s	98.338us	1	1	100.00
write_enable_disable				1	1	100.00
	spi_device_cfg_cmd	2.530s	98.338us	1	1	100.00
TPM_with_flash_or_passthrough_mode				1	1	100.00
	spi_device_flash_and_tpm	276.120s	46511.716us	1	1	100.00
tpm_and_flash_trans_with_min_inactive_time				1	1	100.00
	spi_device_flash_and_tpm_min_idle	42.780s	9310.527us	1	1	100.00
stress_all				1	1	100.00
	spi_device_stress_all	107.850s	10515.798us	1	1	100.00
alert_test				1	1	100.00
	spi_device_alert_test	0.880s	11.828us	1	1	100.00
intr_test				1	1	100.00
	spi_device_intr_test	0.790s	86.349us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	spi_device_tl_errors	4.760s	295.415us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	spi_device_tl_errors	4.760s	295.415us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	spi_device_csr_hw_reset	1.240s	47.710us	1	1	100.00
	spi_device_csr_rw	1.680s	300.192us	1	1	100.00
	spi_device_csr_aliasing	14.170s	1233.493us	1	1	100.00
	spi_device_same_csr_outstanding	2.400s	138.805us	1	1	100.00
tl_d_partial_access				4	4	100.00
	spi_device_csr_hw_reset	1.240s	47.710us	1	1	100.00
	spi_device_csr_rw	1.680s	300.192us	1	1	100.00
	spi_device_csr_aliasing	14.170s	1233.493us	1	1	100.00
	spi_device_same_csr_outstanding	2.400s	138.805us	1	1	100.00

V2S

3/3 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	spi_device_tl_intg_err	14.970s	830.641us	1	1	100.00
	spi_device_sec_cm	1.220s	90.398us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	spi_device_tl_intg_err	14.970s	830.641us	1	1	100.00

unmapped

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				1	1	100.00
	spi_device_flash_mode_ignore_cmds	6.990s	1986.140us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
	spi_device_mem_parity	36371488775637244008560109101533455584392641954051167447165140505956346214909	73	UVM_ERROR @ 821446 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[108]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name UVM_ERROR @ 821446 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data)) UVM_ERROR @ 821446 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[1004]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [] vs [*])
	spi_device_ram_cfg	34032556222697181630547688912578819573335430040711842855748954052628288835687	73	UVM_ERROR @ 4719705 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xf8189a [111110000001100010011010] vs 0x0 [0]) UVM_ERROR @ 4799705 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x43db80 [10000111101101110000000] vs 0x0 [0]) UVM_ERROR @ 4897705 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x87f64a [100001111111011001001010] vs 0x0 [0]) UVM_ERROR @ 4945705 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x9dac20 [100111011010110000100000] vs 0x0 [0]) UVM_ERROR @ 5005705 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x3bd5b6 [1110111101010110110110] vs 0x0 [0])