Simulation Results: chip

 
11/12/2025 17:35:48 sha: 6dd517f json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 77.04 %
  • code
  • 85.32 %
  • assert
  • 96.44 %
  • func
  • 49.37 %
  • line
  • 94.39 %
  • branch
  • 93.68 %
  • cond
  • 89.98 %
  • toggle
  • 91.43 %
  • FSM
  • 57.14 %
Validation stages
V1
65.22%
V2
82.35%
V2S
100.00%
V3
60.00%
unmapped
62.50%
Testpoint Test Max Runtime Sim Time Pass Total %
chip_sw_example_tests 1 4 25.00
chip_sw_example_flash 69.126s 0.000us 0 1 0.00
chip_sw_example_rom 54.278s 0.000us 0 1 0.00
chip_sw_example_manufacturer 39.054s 0.000us 0 1 0.00
chip_sw_example_concurrency 93.440s 2527.465us 1 1 100.00
csr_hw_reset 1 1 100.00
chip_csr_hw_reset 116.720s 4617.798us 1 1 100.00
csr_rw 1 1 100.00
chip_csr_rw 292.200s 5700.611us 1 1 100.00
csr_bit_bash 1 1 100.00
chip_csr_bit_bash 2956.820s 42877.081us 1 1 100.00
csr_aliasing 1 1 100.00
chip_csr_aliasing 3742.510s 31269.880us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
chip_csr_mem_rw_with_rand_reset 401.260s 8953.642us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
chip_csr_aliasing 3742.510s 31269.880us 1 1 100.00
chip_csr_rw 292.200s 5700.611us 1 1 100.00
xbar_smoke 1 1 100.00
xbar_smoke 3.980s 48.484us 1 1 100.00
chip_sw_gpio_out 1 1 100.00
chip_sw_gpio 312.970s 4575.219us 1 1 100.00
chip_sw_gpio_in 1 1 100.00
chip_sw_gpio 312.970s 4575.219us 1 1 100.00
chip_sw_gpio_irq 1 1 100.00
chip_sw_gpio 312.970s 4575.219us 1 1 100.00
chip_sw_uart_tx_rx 0 1 0.00
chip_sw_uart_tx_rx 138.994s 0.000us 0 1 0.00
chip_sw_uart_rx_overflow 1 4 25.00
chip_sw_uart_tx_rx 138.994s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_idx1 51.239s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_idx2 361.420s 4289.913us 1 1 100.00
chip_sw_uart_tx_rx_idx3 158.054s 0.000us 0 1 0.00
chip_sw_uart_baud_rate 1 1 100.00
chip_sw_uart_rand_baudrate 972.490s 7288.727us 1 1 100.00
chip_sw_uart_tx_rx_alt_clk_freq 1 2 50.00
chip_sw_uart_tx_rx_alt_clk_freq 128.351s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_alt_clk_freq_low_speed 259.430s 4177.324us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
chip_pin_mux 1 1 100.00
chip_padctrl_attributes 145.860s 5661.465us 1 1 100.00
chip_padctrl_attributes 1 1 100.00
chip_padctrl_attributes 145.860s 5661.465us 1 1 100.00
chip_sw_sleep_pin_mio_dio_val 1 1 100.00
chip_sw_sleep_pin_mio_dio_val 163.720s 3369.883us 1 1 100.00
chip_sw_sleep_pin_wake 0 1 0.00
chip_sw_sleep_pin_wake 264.628s 0.000us 0 1 0.00
chip_sw_sleep_pin_retention 0 1 0.00
chip_sw_sleep_pin_retention 105.380s 0.000us 0 1 0.00
chip_sw_tap_strap_sampling 4 4 100.00
chip_tap_straps_dev 96.950s 2884.468us 1 1 100.00
chip_tap_straps_testunlock0 176.040s 3459.807us 1 1 100.00
chip_tap_straps_rma 582.910s 11278.721us 1 1 100.00
chip_tap_straps_prod 855.500s 13873.707us 1 1 100.00
chip_sw_pattgen_ios 1 1 100.00
chip_sw_pattgen_ios 132.660s 2533.111us 1 1 100.00
chip_sw_sleep_pwm_pulses 1 1 100.00
chip_sw_sleep_pwm_pulses 750.060s 9601.728us 1 1 100.00
chip_sw_data_integrity 0 1 0.00
chip_sw_data_integrity_escalation 27.579s 0.000us 0 1 0.00
chip_sw_instruction_integrity 0 1 0.00
chip_sw_data_integrity_escalation 27.579s 0.000us 0 1 0.00
chip_sw_ast_clk_outputs 1 1 100.00
chip_sw_ast_clk_outputs 600.660s 7538.561us 1 1 100.00
chip_sw_ast_clk_rst_inputs 1 1 100.00
chip_sw_ast_clk_rst_inputs 2045.530s 22870.598us 1 1 100.00
chip_sw_ast_sys_clk_jitter 10 10 100.00
chip_sw_flash_ctrl_ops_jitter_en 341.360s 3643.804us 1 1 100.00
chip_sw_flash_ctrl_access_jitter_en 496.550s 5702.073us 1 1 100.00
chip_sw_otbn_ecdsa_op_irq_jitter_en 3338.390s 18751.254us 1 1 100.00
chip_sw_aes_enc_jitter_en 109.810s 2710.854us 1 1 100.00
chip_sw_edn_entropy_reqs_jitter 525.360s 6887.782us 1 1 100.00
chip_sw_hmac_enc_jitter_en 178.480s 3514.822us 1 1 100.00
chip_sw_keymgr_key_derivation_jitter_en 686.310s 7015.020us 1 1 100.00
chip_sw_kmac_mode_kmac_jitter_en 165.810s 3053.203us 1 1 100.00
chip_sw_sram_ctrl_scrambled_access_jitter_en 334.400s 5548.313us 1 1 100.00
chip_sw_clkmgr_jitter 139.270s 2943.907us 1 1 100.00
chip_sw_ast_usb_clk_calib 1 1 100.00
chip_sw_usb_ast_clk_calib 150.030s 3281.424us 1 1 100.00
chip_sw_sensor_ctrl_ast_alerts 2 2 100.00
chip_sw_sensor_ctrl_alert 504.190s 7305.081us 1 1 100.00
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 259.670s 5713.427us 1 1 100.00
chip_sw_sensor_ctrl_ast_status 1 1 100.00
chip_sw_sensor_ctrl_status 143.270s 2841.647us 1 1 100.00
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 1 1 100.00
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 259.670s 5713.427us 1 1 100.00
chip_sw_smoketest 17 17 100.00
chip_sw_flash_scrambling_smoketest 95.610s 2514.718us 1 1 100.00
chip_sw_aes_smoketest 126.130s 2582.386us 1 1 100.00
chip_sw_aon_timer_smoketest 223.860s 3352.261us 1 1 100.00
chip_sw_clkmgr_smoketest 166.170s 2827.890us 1 1 100.00
chip_sw_csrng_smoketest 144.420s 2691.115us 1 1 100.00
chip_sw_entropy_src_smoketest 648.050s 6205.439us 1 1 100.00
chip_sw_gpio_smoketest 139.670s 2713.657us 1 1 100.00
chip_sw_hmac_smoketest 164.850s 3134.954us 1 1 100.00
chip_sw_kmac_smoketest 150.670s 3351.831us 1 1 100.00
chip_sw_otbn_smoketest 863.230s 7889.280us 1 1 100.00
chip_sw_pwrmgr_smoketest 170.130s 6139.162us 1 1 100.00
chip_sw_pwrmgr_usbdev_smoketest 229.460s 5588.384us 1 1 100.00
chip_sw_rv_plic_smoketest 147.390s 2947.575us 1 1 100.00
chip_sw_rv_timer_smoketest 104.460s 3001.681us 1 1 100.00
chip_sw_rstmgr_smoketest 118.960s 2817.488us 1 1 100.00
chip_sw_sram_ctrl_smoketest 142.530s 2173.387us 1 1 100.00
chip_sw_uart_smoketest 138.460s 2950.696us 1 1 100.00
chip_sw_otp_smoketest 1 1 100.00
chip_sw_otp_ctrl_smoketest 172.040s 2928.248us 1 1 100.00
chip_sw_rom_functests 1 1 100.00
rom_keymgr_functest 347.670s 4172.231us 1 1 100.00
chip_sw_boot 0 1 0.00
chip_sw_uart_tx_rx_bootstrap 104.377s 0.000us 0 1 0.00
chip_sw_secure_boot 1 1 100.00
rom_e2e_smoke 2483.300s 17607.446us 1 1 100.00
chip_sw_rom_raw_unlock 1 1 100.00
rom_raw_unlock 140.060s 4942.116us 1 1 100.00
chip_sw_power_idle_load 0 1 0.00
chip_sw_power_idle_load 176.820s 3271.300us 0 1 0.00
chip_sw_power_sleep_load 0 1 0.00
chip_sw_power_sleep_load 169.590s 3108.947us 0 1 0.00
chip_sw_exit_test_unlocked_bootstrap 1 1 100.00
chip_sw_exit_test_unlocked_bootstrap 6577.830s 52833.956us 1 1 100.00
chip_sw_inject_scramble_seed 1 1 100.00
chip_sw_inject_scramble_seed 6712.070s 57778.391us 1 1 100.00
tl_d_oob_addr_access 0 1 0.00
chip_tl_errors 52.650s 3025.596us 0 1 0.00
tl_d_illegal_access 0 1 0.00
chip_tl_errors 52.650s 3025.596us 0 1 0.00
tl_d_outstanding_access 4 4 100.00
chip_csr_aliasing 3742.510s 31269.880us 1 1 100.00
chip_same_csr_outstanding 2502.150s 26066.754us 1 1 100.00
chip_csr_hw_reset 116.720s 4617.798us 1 1 100.00
chip_csr_rw 292.200s 5700.611us 1 1 100.00
tl_d_partial_access 4 4 100.00
chip_csr_aliasing 3742.510s 31269.880us 1 1 100.00
chip_same_csr_outstanding 2502.150s 26066.754us 1 1 100.00
chip_csr_hw_reset 116.720s 4617.798us 1 1 100.00
chip_csr_rw 292.200s 5700.611us 1 1 100.00
xbar_base_random_sequence 1 1 100.00
xbar_random 20.260s 451.018us 1 1 100.00
xbar_random_delay 6 6 100.00
xbar_smoke_zero_delays 3.800s 41.142us 1 1 100.00
xbar_smoke_large_delays 54.550s 10217.141us 1 1 100.00
xbar_smoke_slow_rsp 35.590s 4445.578us 1 1 100.00
xbar_random_zero_delays 23.630s 560.868us 1 1 100.00
xbar_random_large_delays 227.430s 42785.301us 1 1 100.00
xbar_random_slow_rsp 148.250s 17444.551us 1 1 100.00
xbar_unmapped_address 2 2 100.00
xbar_unmapped_addr 10.750s 175.256us 1 1 100.00
xbar_error_and_unmapped_addr 9.900s 400.057us 1 1 100.00
xbar_error_cases 2 2 100.00
xbar_error_random 34.740s 2110.744us 1 1 100.00
xbar_error_and_unmapped_addr 9.900s 400.057us 1 1 100.00
xbar_all_access_same_device 2 2 100.00
xbar_access_same_device 13.170s 639.261us 1 1 100.00
xbar_access_same_device_slow_rsp 522.130s 71846.748us 1 1 100.00
xbar_all_hosts_use_same_source_id 1 1 100.00
xbar_same_source 20.840s 517.298us 1 1 100.00
xbar_stress_all 2 2 100.00
xbar_stress_all 132.420s 3408.520us 1 1 100.00
xbar_stress_all_with_error 186.230s 10990.597us 1 1 100.00
xbar_stress_with_reset 2 2 100.00
xbar_stress_all_with_rand_reset 162.050s 3066.678us 1 1 100.00
xbar_stress_all_with_reset_error 89.690s 541.230us 1 1 100.00
rom_e2e_smoke 1 1 100.00
rom_e2e_smoke 2483.300s 17607.446us 1 1 100.00
rom_e2e_shutdown_output 1 1 100.00
rom_e2e_shutdown_output 2365.880s 37740.692us 1 1 100.00
rom_e2e_shutdown_exception_c 1 1 100.00
rom_e2e_shutdown_exception_c 2530.570s 16356.467us 1 1 100.00
rom_e2e_boot_policy_valid 5 15 33.33
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 1998.410s 11401.517us 1 1 100.00
rom_e2e_boot_policy_valid_a_good_b_good_dev 2518.730s 16145.894us 1 1 100.00
rom_e2e_boot_policy_valid_a_good_b_good_prod 2506.260s 16256.588us 1 1 100.00
rom_e2e_boot_policy_valid_a_good_b_good_prod_end 2505.780s 15899.636us 1 1 100.00
rom_e2e_boot_policy_valid_a_good_b_good_rma 2322.450s 15162.555us 1 1 100.00
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 22.510s 10.160us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_dev 18.800s 10.100us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_prod 19.540s 10.280us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end 16.490s 10.240us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_rma 16.060s 10.340us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 20.910s 10.160us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_dev 17.240s 10.240us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_prod 16.280s 10.300us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end 16.950s 10.400us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_rma 17.350s 10.400us 0 1 0.00
rom_e2e_sigverify_always 0 15 0.00
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 21.550s 10.380us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_dev 19.080s 10.280us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_prod 22.070s 10.380us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_prod_end 17.620s 10.180us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_rma 16.050s 10.140us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 22.050s 10.280us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_dev 18.920s 10.120us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_prod 21.890s 10.300us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end 17.730s 10.120us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_rma 17.950s 10.160us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 19.570s 10.320us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_dev 17.790s 10.300us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_prod 17.980s 10.360us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end 17.800s 10.280us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_rma 16.520s 10.100us 0 1 0.00
rom_e2e_asm_init 5 5 100.00
rom_e2e_asm_init_test_unlocked0 1962.870s 12496.625us 1 1 100.00
rom_e2e_asm_init_dev 2507.260s 15432.611us 1 1 100.00
rom_e2e_asm_init_prod 2513.860s 16410.729us 1 1 100.00
rom_e2e_asm_init_prod_end 2432.290s 17716.261us 1 1 100.00
rom_e2e_asm_init_rma 2305.960s 15071.812us 1 1 100.00
rom_e2e_keymgr_init 3 3 100.00
rom_e2e_keymgr_init_rom_ext_meas 4128.010s 29489.376us 1 1 100.00
rom_e2e_keymgr_init_rom_ext_no_meas 4158.690s 30517.484us 1 1 100.00
rom_e2e_keymgr_init_rom_ext_invalid_meas 4186.520s 28398.844us 1 1 100.00
rom_e2e_static_critical 1 1 100.00
rom_e2e_static_critical 2367.960s 15564.112us 1 1 100.00
chip_sw_adc_ctrl_debug_cable_irq 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 3032.780s 34127.814us 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 3032.780s 34127.814us 0 1 0.00
chip_sw_aes_enc 2 2 100.00
chip_sw_aes_enc 138.660s 3221.274us 1 1 100.00
chip_sw_aes_enc_jitter_en 109.810s 2710.854us 1 1 100.00
chip_sw_aes_entropy 1 1 100.00
chip_sw_aes_entropy 170.790s 2608.669us 1 1 100.00
chip_sw_aes_idle 1 1 100.00
chip_sw_aes_idle 96.370s 2999.555us 1 1 100.00
chip_sw_aes_sideload 1 1 100.00
chip_sw_keymgr_sideload_aes 1662.520s 12712.498us 1 1 100.00
chip_sw_alert_handler_alerts 0 1 0.00
chip_sw_alert_test 183.230s 3162.573us 0 1 0.00
chip_sw_alert_handler_escalations 1 1 100.00
chip_sw_alert_handler_escalation 372.590s 5722.925us 1 1 100.00
chip_sw_all_escalation_resets 0 1 0.00
chip_sw_all_escalation_resets 135.492s 0.000us 0 1 0.00
chip_sw_alert_handler_irqs 3 3 100.00
chip_plic_all_irqs_0 545.070s 5344.152us 1 1 100.00
chip_plic_all_irqs_10 243.410s 3512.977us 1 1 100.00
chip_plic_all_irqs_20 369.770s 4516.201us 1 1 100.00
chip_sw_alert_handler_entropy 1 1 100.00
chip_sw_alert_handler_entropy 140.920s 3346.856us 1 1 100.00
chip_sw_alert_handler_crashdump 1 1 100.00
chip_sw_rstmgr_alert_info 872.870s 10443.809us 1 1 100.00
chip_sw_alert_handler_ping_timeout 1 1 100.00
chip_sw_alert_handler_ping_timeout 277.820s 5609.901us 1 1 100.00
chip_sw_alert_handler_lpg_sleep_mode_alerts 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_alerts 139.140s 3041.566us 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_pings 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_pings 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_lpg_clock_off 1 1 100.00
chip_sw_alert_handler_lpg_clkoff 542.590s 5512.701us 1 1 100.00
chip_sw_alert_handler_lpg_reset_toggle 1 1 100.00
chip_sw_alert_handler_lpg_reset_toggle 940.310s 7715.171us 1 1 100.00
chip_sw_alert_handler_ping_ok 1 1 100.00
chip_sw_alert_handler_ping_ok 758.260s 8005.893us 1 1 100.00
chip_sw_alert_handler_reverse_ping_in_deep_sleep 1 1 100.00
chip_sw_alert_handler_reverse_ping_in_deep_sleep 7294.020s 256280.855us 1 1 100.00
chip_sw_aon_timer_wakeup_irq 1 1 100.00
chip_sw_aon_timer_irq 215.510s 4428.198us 1 1 100.00
chip_sw_aon_timer_sleep_wakeup 1 1 100.00
chip_sw_pwrmgr_smoketest 170.130s 6139.162us 1 1 100.00
chip_sw_aon_timer_wdog_bark_irq 1 1 100.00
chip_sw_aon_timer_irq 215.510s 4428.198us 1 1 100.00
chip_sw_aon_timer_wdog_bite_reset 0 1 0.00
chip_sw_aon_timer_wdog_bite_reset 365.590s 7588.584us 0 1 0.00
chip_sw_aon_timer_sleep_wdog_bite_reset 0 1 0.00
chip_sw_aon_timer_wdog_bite_reset 365.590s 7588.584us 0 1 0.00
chip_sw_aon_timer_sleep_wdog_sleep_pause 1 1 100.00
chip_sw_aon_timer_sleep_wdog_sleep_pause 238.650s 7684.940us 1 1 100.00
chip_sw_aon_timer_wdog_lc_escalate 1 1 100.00
chip_sw_aon_timer_wdog_lc_escalate 296.960s 4406.132us 1 1 100.00
chip_sw_clkmgr_idle_trans 4 4 100.00
chip_sw_otbn_randomness 636.910s 6708.585us 1 1 100.00
chip_sw_aes_idle 96.370s 2999.555us 1 1 100.00
chip_sw_hmac_enc_idle 114.950s 2942.063us 1 1 100.00
chip_sw_kmac_idle 161.450s 2885.842us 1 1 100.00
chip_sw_clkmgr_off_trans 4 4 100.00
chip_sw_clkmgr_off_aes_trans 285.830s 4608.263us 1 1 100.00
chip_sw_clkmgr_off_hmac_trans 266.650s 4082.510us 1 1 100.00
chip_sw_clkmgr_off_kmac_trans 291.730s 3560.367us 1 1 100.00
chip_sw_clkmgr_off_otbn_trans 225.780s 4685.325us 1 1 100.00
chip_sw_clkmgr_off_peri 1 1 100.00
chip_sw_clkmgr_off_peri 580.330s 8500.971us 1 1 100.00
chip_sw_clkmgr_div 7 7 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 351.240s 3520.812us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 341.490s 4880.815us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 322.280s 4363.278us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 347.500s 4482.414us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma 358.390s 4113.522us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma 365.980s 4618.836us 1 1 100.00
chip_sw_ast_clk_outputs 600.660s 7538.561us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_lc 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_lc 227.060s 5732.242us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw 2 2 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 322.280s 4363.278us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 347.500s 4482.414us 1 1 100.00
chip_sw_clkmgr_jitter 10 10 100.00
chip_sw_flash_ctrl_ops_jitter_en 341.360s 3643.804us 1 1 100.00
chip_sw_flash_ctrl_access_jitter_en 496.550s 5702.073us 1 1 100.00
chip_sw_otbn_ecdsa_op_irq_jitter_en 3338.390s 18751.254us 1 1 100.00
chip_sw_aes_enc_jitter_en 109.810s 2710.854us 1 1 100.00
chip_sw_edn_entropy_reqs_jitter 525.360s 6887.782us 1 1 100.00
chip_sw_hmac_enc_jitter_en 178.480s 3514.822us 1 1 100.00
chip_sw_keymgr_key_derivation_jitter_en 686.310s 7015.020us 1 1 100.00
chip_sw_kmac_mode_kmac_jitter_en 165.810s 3053.203us 1 1 100.00
chip_sw_sram_ctrl_scrambled_access_jitter_en 334.400s 5548.313us 1 1 100.00
chip_sw_clkmgr_jitter 139.270s 2943.907us 1 1 100.00
chip_sw_clkmgr_extended_range 11 11 100.00
chip_sw_clkmgr_jitter_reduced_freq 130.410s 3446.492us 1 1 100.00
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq 368.590s 4620.371us 1 1 100.00
chip_sw_flash_ctrl_access_jitter_en_reduced_freq 667.920s 7009.282us 1 1 100.00
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq 3038.760s 24591.631us 1 1 100.00
chip_sw_aes_enc_jitter_en_reduced_freq 132.120s 2852.110us 1 1 100.00
chip_sw_hmac_enc_jitter_en_reduced_freq 153.370s 3428.651us 1 1 100.00
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq 1173.490s 12450.062us 1 1 100.00
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq 191.890s 3390.088us 1 1 100.00
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq 269.670s 3914.303us 1 1 100.00
chip_sw_flash_init_reduced_freq 962.470s 17673.630us 1 1 100.00
chip_sw_csrng_edn_concurrency_reduced_freq 12559.760s 157076.736us 1 1 100.00
chip_sw_clkmgr_deep_sleep_frequency 1 1 100.00
chip_sw_ast_clk_outputs 600.660s 7538.561us 1 1 100.00
chip_sw_clkmgr_sleep_frequency 1 1 100.00
chip_sw_clkmgr_sleep_frequency 309.990s 4990.995us 1 1 100.00
chip_sw_clkmgr_reset_frequency 1 1 100.00
chip_sw_clkmgr_reset_frequency 224.460s 3310.419us 1 1 100.00
chip_sw_clkmgr_escalation_reset 0 1 0.00
chip_sw_all_escalation_resets 135.492s 0.000us 0 1 0.00
chip_sw_clkmgr_alert_handler_clock_enables 1 1 100.00
chip_sw_alert_handler_lpg_clkoff 542.590s 5512.701us 1 1 100.00
chip_sw_csrng_edn_cmd 1 1 100.00
chip_sw_entropy_src_csrng 738.020s 6147.052us 1 1 100.00
chip_sw_csrng_fuse_en_sw_app_read 1 1 100.00
chip_sw_csrng_fuse_en_sw_app_read_test 251.130s 3760.969us 1 1 100.00
chip_sw_csrng_lc_hw_debug_en 1 1 100.00
chip_sw_csrng_lc_hw_debug_en_test 331.890s 5063.274us 1 1 100.00
chip_sw_csrng_known_answer_tests 1 1 100.00
chip_sw_csrng_kat_test 131.090s 3242.921us 1 1 100.00
chip_sw_edn_entropy_reqs 3 3 100.00
chip_sw_csrng_edn_concurrency 5483.640s 37104.410us 1 1 100.00
chip_sw_entropy_src_ast_rng_req 115.510s 2341.395us 1 1 100.00
chip_sw_edn_entropy_reqs 854.250s 7793.381us 1 1 100.00
chip_sw_entropy_src_ast_rng_req 1 1 100.00
chip_sw_entropy_src_ast_rng_req 115.510s 2341.395us 1 1 100.00
chip_sw_entropy_src_csrng 1 1 100.00
chip_sw_entropy_src_csrng 738.020s 6147.052us 1 1 100.00
chip_sw_entropy_src_known_answer_tests 1 1 100.00
chip_sw_entropy_src_kat_test 140.230s 3189.749us 1 1 100.00
chip_sw_flash_init 1 1 100.00
chip_sw_flash_init 1334.690s 20964.370us 1 1 100.00
chip_sw_flash_host_access 2 2 100.00
chip_sw_flash_ctrl_access 478.430s 5128.955us 1 1 100.00
chip_sw_flash_ctrl_access_jitter_en 496.550s 5702.073us 1 1 100.00
chip_sw_flash_ctrl_ops 2 2 100.00
chip_sw_flash_ctrl_ops 355.280s 3742.993us 1 1 100.00
chip_sw_flash_ctrl_ops_jitter_en 341.360s 3643.804us 1 1 100.00
chip_sw_flash_rma_unlocked 1 1 100.00
chip_sw_flash_rma_unlocked 3336.200s 43413.713us 1 1 100.00
chip_sw_flash_scramble 1 1 100.00
chip_sw_flash_init 1334.690s 20964.370us 1 1 100.00
chip_sw_flash_idle_low_power 1 1 100.00
chip_sw_flash_ctrl_idle_low_power 178.190s 3506.504us 1 1 100.00
chip_sw_flash_keymgr_seeds 1 1 100.00
chip_sw_keymgr_key_derivation 999.860s 8599.594us 1 1 100.00
chip_sw_flash_lc_creator_seed_sw_rw_en 1 1 100.00
chip_sw_flash_ctrl_lc_rw_en 314.530s 5684.887us 1 1 100.00
chip_sw_flash_creator_seed_wipe_on_rma 1 1 100.00
chip_sw_flash_rma_unlocked 3336.200s 43413.713us 1 1 100.00
chip_sw_flash_lc_owner_seed_sw_rw_en 1 1 100.00
chip_sw_flash_ctrl_lc_rw_en 314.530s 5684.887us 1 1 100.00
chip_sw_flash_lc_iso_part_sw_rd_en 1 1 100.00
chip_sw_flash_ctrl_lc_rw_en 314.530s 5684.887us 1 1 100.00
chip_sw_flash_lc_iso_part_sw_wr_en 1 1 100.00
chip_sw_flash_ctrl_lc_rw_en 314.530s 5684.887us 1 1 100.00
chip_sw_flash_lc_seed_hw_rd_en 1 1 100.00
chip_sw_flash_ctrl_lc_rw_en 314.530s 5684.887us 1 1 100.00
chip_sw_flash_lc_escalate_en 0 1 0.00
chip_sw_all_escalation_resets 135.492s 0.000us 0 1 0.00
chip_sw_flash_prim_tl_access 1 1 100.00
chip_prim_tl_access 64.820s 4156.615us 1 1 100.00
chip_sw_flash_ctrl_clock_freqs 1 1 100.00
chip_sw_flash_ctrl_clock_freqs 501.280s 5145.996us 1 1 100.00
chip_sw_flash_ctrl_escalation_reset 1 1 100.00
chip_sw_flash_crash_alert 393.510s 5005.856us 1 1 100.00
chip_sw_flash_ctrl_write_clear 1 1 100.00
chip_sw_flash_crash_alert 393.510s 5005.856us 1 1 100.00
chip_sw_hmac_enc 2 2 100.00
chip_sw_hmac_enc 148.130s 3039.680us 1 1 100.00
chip_sw_hmac_enc_jitter_en 178.480s 3514.822us 1 1 100.00
chip_sw_hmac_idle 1 1 100.00
chip_sw_hmac_enc_idle 114.950s 2942.063us 1 1 100.00
chip_sw_hmac_all_configurations 1 1 100.00
chip_sw_hmac_oneshot 543.950s 5295.804us 1 1 100.00
chip_sw_hmac_multistream_mode 1 1 100.00
chip_sw_hmac_multistream 690.840s 5457.625us 1 1 100.00
chip_sw_i2c_host_tx_rx 2 3 66.67
chip_sw_i2c_host_tx_rx 508.740s 5555.942us 1 1 100.00
chip_sw_i2c_host_tx_rx_idx1 101.453s 0.000us 0 1 0.00
chip_sw_i2c_host_tx_rx_idx2 404.600s 5706.704us 1 1 100.00
chip_sw_i2c_device_tx_rx 1 1 100.00
chip_sw_i2c_device_tx_rx 289.340s 3726.188us 1 1 100.00
chip_sw_keymgr_key_derivation 2 2 100.00
chip_sw_keymgr_key_derivation 999.860s 8599.594us 1 1 100.00
chip_sw_keymgr_key_derivation_jitter_en 686.310s 7015.020us 1 1 100.00
chip_sw_keymgr_sideload_kmac 1 1 100.00
chip_sw_keymgr_sideload_kmac 1137.840s 9302.685us 1 1 100.00
chip_sw_keymgr_sideload_aes 1 1 100.00
chip_sw_keymgr_sideload_aes 1662.520s 12712.498us 1 1 100.00
chip_sw_keymgr_sideload_otbn 1 1 100.00
chip_sw_keymgr_sideload_otbn 2430.140s 14630.246us 1 1 100.00
chip_sw_kmac_enc 3 3 100.00
chip_sw_kmac_mode_cshake 143.510s 3320.951us 1 1 100.00
chip_sw_kmac_mode_kmac 164.180s 3019.824us 1 1 100.00
chip_sw_kmac_mode_kmac_jitter_en 165.810s 3053.203us 1 1 100.00
chip_sw_kmac_app_keymgr 1 1 100.00
chip_sw_keymgr_key_derivation 999.860s 8599.594us 1 1 100.00
chip_sw_kmac_app_lc 1 1 100.00
chip_sw_lc_ctrl_transition 291.790s 5191.782us 1 1 100.00
chip_sw_kmac_app_rom 1 1 100.00
chip_sw_kmac_app_rom 145.700s 3301.740us 1 1 100.00
chip_sw_kmac_entropy 1 1 100.00
chip_sw_kmac_entropy 765.670s 6586.697us 1 1 100.00
chip_sw_kmac_idle 1 1 100.00
chip_sw_kmac_idle 161.450s 2885.842us 1 1 100.00
chip_sw_lc_ctrl_alert_handler_escalation 1 1 100.00
chip_sw_alert_handler_escalation 372.590s 5722.925us 1 1 100.00
chip_sw_lc_ctrl_jtag_access 3 3 100.00
chip_tap_straps_dev 96.950s 2884.468us 1 1 100.00
chip_tap_straps_rma 582.910s 11278.721us 1 1 100.00
chip_tap_straps_prod 855.500s 13873.707us 1 1 100.00
chip_sw_lc_ctrl_otp_hw_cfg0 1 1 100.00
chip_sw_lc_ctrl_otp_hw_cfg0 126.120s 2715.874us 1 1 100.00
chip_sw_lc_ctrl_init 1 1 100.00
chip_sw_lc_ctrl_transition 291.790s 5191.782us 1 1 100.00
chip_sw_lc_ctrl_transitions 1 1 100.00
chip_sw_lc_ctrl_transition 291.790s 5191.782us 1 1 100.00
chip_sw_lc_ctrl_kmac_req 1 1 100.00
chip_sw_lc_ctrl_transition 291.790s 5191.782us 1 1 100.00
chip_sw_lc_ctrl_key_div 1 1 100.00
chip_sw_keymgr_key_derivation_prod 1519.290s 11225.578us 1 1 100.00
chip_sw_lc_ctrl_broadcast 20 22 90.91
chip_prim_tl_access 64.820s 4156.615us 1 1 100.00
chip_rv_dm_lc_disabled 91.610s 5602.922us 0 1 0.00
chip_sw_flash_ctrl_lc_rw_en 314.530s 5684.887us 1 1 100.00
chip_sw_flash_rma_unlocked 3336.200s 43413.713us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_test_unlocked0 150.400s 2762.070us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_dev 505.170s 6590.360us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_prod 327.230s 5497.490us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_rma 480.100s 6710.771us 0 1 0.00
chip_sw_lc_ctrl_transition 291.790s 5191.782us 1 1 100.00
chip_sw_keymgr_key_derivation 999.860s 8599.594us 1 1 100.00
chip_sw_rom_ctrl_integrity_check 339.160s 10025.226us 1 1 100.00
chip_sw_sram_ctrl_execution_main 521.930s 7990.421us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_lc 227.060s 5732.242us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 351.240s 3520.812us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 341.490s 4880.815us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 322.280s 4363.278us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 347.500s 4482.414us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma 358.390s 4113.522us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma 365.980s 4618.836us 1 1 100.00
chip_tap_straps_dev 96.950s 2884.468us 1 1 100.00
chip_tap_straps_rma 582.910s 11278.721us 1 1 100.00
chip_tap_straps_prod 855.500s 13873.707us 1 1 100.00
chip_lc_scrap 3 4 75.00
chip_sw_lc_ctrl_rma_to_scrap 110.170s 3795.355us 1 1 100.00
chip_sw_lc_ctrl_raw_to_scrap 95.170s 2853.167us 1 1 100.00
chip_sw_lc_ctrl_test_locked0_to_scrap 82.430s 2639.851us 1 1 100.00
chip_sw_lc_ctrl_rand_to_scrap 1887.920s 27058.332us 0 1 0.00
chip_lc_test_locked 1 2 50.00
chip_rv_dm_lc_disabled 91.610s 5602.922us 0 1 0.00
chip_sw_lc_walkthrough_testunlocks 1094.540s 24789.615us 1 1 100.00
chip_sw_lc_walkthrough 5 5 100.00
chip_sw_lc_walkthrough_dev 3975.030s 47884.036us 1 1 100.00
chip_sw_lc_walkthrough_prod 3683.340s 47849.745us 1 1 100.00
chip_sw_lc_walkthrough_prodend 605.900s 11269.201us 1 1 100.00
chip_sw_lc_walkthrough_rma 3576.860s 46360.569us 1 1 100.00
chip_sw_lc_walkthrough_testunlocks 1094.540s 24789.615us 1 1 100.00
chip_sw_lc_ctrl_volatile_raw_unlock 3 3 100.00
chip_sw_lc_ctrl_volatile_raw_unlock 56.700s 3040.305us 1 1 100.00
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz 74.720s 2717.851us 1 1 100.00
rom_volatile_raw_unlock 64.070s 2641.704us 1 1 100.00
chip_sw_otbn_op 2 2 100.00
chip_sw_otbn_ecdsa_op_irq 3159.480s 17044.243us 1 1 100.00
chip_sw_otbn_ecdsa_op_irq_jitter_en 3338.390s 18751.254us 1 1 100.00
chip_sw_otbn_rnd_entropy 1 1 100.00
chip_sw_otbn_randomness 636.910s 6708.585us 1 1 100.00
chip_sw_otbn_urnd_entropy 1 1 100.00
chip_sw_otbn_randomness 636.910s 6708.585us 1 1 100.00
chip_sw_otbn_idle 1 1 100.00
chip_sw_otbn_randomness 636.910s 6708.585us 1 1 100.00
chip_sw_otbn_mem_scramble 1 1 100.00
chip_sw_otbn_mem_scramble 253.340s 3129.014us 1 1 100.00
chip_otp_ctrl_init 1 1 100.00
chip_sw_lc_ctrl_transition 291.790s 5191.782us 1 1 100.00
chip_sw_otp_ctrl_keys 5 5 100.00
chip_sw_flash_init 1334.690s 20964.370us 1 1 100.00
chip_sw_otbn_mem_scramble 253.340s 3129.014us 1 1 100.00
chip_sw_keymgr_key_derivation 999.860s 8599.594us 1 1 100.00
chip_sw_sram_ctrl_scrambled_access 285.680s 4395.167us 1 1 100.00
chip_sw_rv_core_ibex_icache_invalidate 125.790s 2764.857us 1 1 100.00
chip_sw_otp_ctrl_entropy 5 5 100.00
chip_sw_flash_init 1334.690s 20964.370us 1 1 100.00
chip_sw_otbn_mem_scramble 253.340s 3129.014us 1 1 100.00
chip_sw_keymgr_key_derivation 999.860s 8599.594us 1 1 100.00
chip_sw_sram_ctrl_scrambled_access 285.680s 4395.167us 1 1 100.00
chip_sw_rv_core_ibex_icache_invalidate 125.790s 2764.857us 1 1 100.00
chip_sw_otp_ctrl_program 1 1 100.00
chip_sw_lc_ctrl_transition 291.790s 5191.782us 1 1 100.00
chip_sw_otp_ctrl_program_error 1 1 100.00
chip_sw_lc_ctrl_program_error 344.130s 5476.733us 1 1 100.00
chip_sw_otp_ctrl_hw_cfg0 1 1 100.00
chip_sw_lc_ctrl_otp_hw_cfg0 126.120s 2715.874us 1 1 100.00
chip_sw_otp_ctrl_lc_signals 5 6 83.33
chip_prim_tl_access 64.820s 4156.615us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_test_unlocked0 150.400s 2762.070us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_dev 505.170s 6590.360us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_prod 327.230s 5497.490us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_rma 480.100s 6710.771us 0 1 0.00
chip_sw_lc_ctrl_transition 291.790s 5191.782us 1 1 100.00
chip_sw_otp_prim_tl_access 1 1 100.00
chip_prim_tl_access 64.820s 4156.615us 1 1 100.00
chip_sw_otp_ctrl_dai_lock 1 1 100.00
chip_sw_otp_ctrl_dai_lock 678.180s 6496.011us 1 1 100.00
chip_sw_pwrmgr_external_full_reset 1 1 100.00
chip_sw_pwrmgr_full_aon_reset 303.970s 6966.896us 1 1 100.00
chip_sw_pwrmgr_random_sleep_all_wake_ups 1 1 100.00
chip_sw_pwrmgr_random_sleep_all_wake_ups 744.380s 22547.816us 1 1 100.00
chip_sw_pwrmgr_normal_sleep_all_wake_ups 1 1 100.00
chip_sw_pwrmgr_normal_sleep_all_wake_ups 254.940s 7529.906us 1 1 100.00
chip_sw_pwrmgr_deep_sleep_por_reset 0 1 0.00
chip_sw_pwrmgr_deep_sleep_por_reset 306.300s 7079.221us 0 1 0.00
chip_sw_pwrmgr_normal_sleep_por_reset 1 1 100.00
chip_sw_pwrmgr_normal_sleep_por_reset 265.590s 5203.483us 1 1 100.00
chip_sw_pwrmgr_deep_sleep_all_wake_ups 1 1 100.00
chip_sw_pwrmgr_deep_sleep_all_wake_ups 786.550s 22887.200us 1 1 100.00
chip_sw_pwrmgr_deep_sleep_all_reset_reqs 0 2 0.00
chip_sw_pwrmgr_deep_sleep_all_reset_reqs 196.810s 5498.761us 0 1 0.00
chip_sw_aon_timer_wdog_bite_reset 365.590s 7588.584us 0 1 0.00
chip_sw_pwrmgr_normal_sleep_all_reset_reqs 1 1 100.00
chip_sw_pwrmgr_normal_sleep_all_reset_reqs 666.350s 9747.719us 1 1 100.00
chip_sw_pwrmgr_wdog_reset 1 1 100.00
chip_sw_pwrmgr_wdog_reset 404.420s 5688.084us 1 1 100.00
chip_sw_pwrmgr_aon_power_glitch_reset 1 1 100.00
chip_sw_pwrmgr_full_aon_reset 303.970s 6966.896us 1 1 100.00
chip_sw_pwrmgr_main_power_glitch_reset 1 1 100.00
chip_sw_pwrmgr_main_power_glitch_reset 228.460s 4431.598us 1 1 100.00
chip_sw_pwrmgr_random_sleep_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_random_sleep_power_glitch_reset 244.340s 5771.059us 0 1 0.00
chip_sw_pwrmgr_deep_sleep_power_glitch_reset 1 1 100.00
chip_sw_pwrmgr_deep_sleep_power_glitch_reset 186.540s 5771.853us 1 1 100.00
chip_sw_pwrmgr_sleep_power_glitch_reset 1 1 100.00
chip_sw_pwrmgr_sleep_power_glitch_reset 276.560s 5158.946us 1 1 100.00
chip_sw_pwrmgr_random_sleep_all_reset_reqs 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_reset_reqs 561.090s 13388.325us 0 1 0.00
chip_sw_pwrmgr_sysrst_ctrl_reset 2 2 100.00
chip_sw_pwrmgr_sysrst_ctrl_reset 671.800s 6959.303us 1 1 100.00
chip_sw_pwrmgr_all_reset_reqs 989.820s 10330.494us 1 1 100.00
chip_sw_pwrmgr_b2b_sleep_reset_req 1 1 100.00
chip_sw_pwrmgr_b2b_sleep_reset_req 1826.190s 27572.809us 1 1 100.00
chip_sw_pwrmgr_sleep_disabled 1 1 100.00
chip_sw_pwrmgr_sleep_disabled 112.320s 2354.494us 1 1 100.00
chip_sw_pwrmgr_escalation_reset 0 1 0.00
chip_sw_all_escalation_resets 135.492s 0.000us 0 1 0.00
chip_sw_rom_access 1 1 100.00
chip_sw_rom_ctrl_integrity_check 339.160s 10025.226us 1 1 100.00
chip_sw_rom_ctrl_integrity_check 1 1 100.00
chip_sw_rom_ctrl_integrity_check 339.160s 10025.226us 1 1 100.00
chip_sw_rstmgr_non_sys_reset_info 3 4 75.00
chip_sw_pwrmgr_all_reset_reqs 989.820s 10330.494us 1 1 100.00
chip_sw_pwrmgr_random_sleep_all_reset_reqs 561.090s 13388.325us 0 1 0.00
chip_sw_pwrmgr_wdog_reset 404.420s 5688.084us 1 1 100.00
chip_sw_pwrmgr_smoketest 170.130s 6139.162us 1 1 100.00
chip_sw_rstmgr_sys_reset_info 1 1 100.00
chip_rv_dm_ndm_reset_req 255.470s 4060.107us 1 1 100.00
chip_sw_rstmgr_cpu_info 0 1 0.00
chip_sw_rstmgr_cpu_info 175.210s 3605.571us 0 1 0.00
chip_sw_rstmgr_sw_req_reset 1 1 100.00
chip_sw_rstmgr_sw_req 258.610s 3349.296us 1 1 100.00
chip_sw_rstmgr_alert_info 1 1 100.00
chip_sw_rstmgr_alert_info 872.870s 10443.809us 1 1 100.00
chip_sw_rstmgr_sw_rst 1 1 100.00
chip_sw_rstmgr_sw_rst 125.780s 2668.138us 1 1 100.00
chip_sw_rstmgr_escalation_reset 0 1 0.00
chip_sw_all_escalation_resets 135.492s 0.000us 0 1 0.00
chip_sw_rstmgr_alert_handler_reset_enables 1 1 100.00
chip_sw_alert_handler_lpg_reset_toggle 940.310s 7715.171us 1 1 100.00
chip_sw_nmi_irq 1 1 100.00
chip_sw_rv_core_ibex_nmi_irq 456.350s 4390.165us 1 1 100.00
chip_sw_rv_core_ibex_rnd 1 1 100.00
chip_sw_rv_core_ibex_rnd 435.920s 4856.630us 1 1 100.00
chip_sw_rv_core_ibex_address_translation 1 1 100.00
chip_sw_rv_core_ibex_address_translation 181.680s 3530.240us 1 1 100.00
chip_sw_rv_core_ibex_icache_scrambled_access 1 1 100.00
chip_sw_rv_core_ibex_icache_invalidate 125.790s 2764.857us 1 1 100.00
chip_sw_rv_core_ibex_fault_dump 0 1 0.00
chip_sw_rstmgr_cpu_info 175.210s 3605.571us 0 1 0.00
chip_sw_rv_core_ibex_double_fault 0 1 0.00
chip_sw_rstmgr_cpu_info 175.210s 3605.571us 0 1 0.00
chip_jtag_csr_rw 1 1 100.00
chip_jtag_csr_rw 1519.750s 21352.505us 1 1 100.00
chip_jtag_mem_access 1 1 100.00
chip_jtag_mem_access 912.290s 13413.498us 1 1 100.00
chip_rv_dm_ndm_reset_req 1 1 100.00
chip_rv_dm_ndm_reset_req 255.470s 4060.107us 1 1 100.00
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted 0 1 0.00
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted 188.130s 3372.010us 0 1 0.00
chip_rv_dm_access_after_wakeup 1 1 100.00
chip_sw_rv_dm_access_after_wakeup 228.580s 5282.855us 1 1 100.00
chip_sw_rv_dm_jtag_tap_sel 1 1 100.00
chip_tap_straps_rma 582.910s 11278.721us 1 1 100.00
chip_rv_dm_lc_disabled 0 1 0.00
chip_rv_dm_lc_disabled 91.610s 5602.922us 0 1 0.00
chip_sw_plic_all_irqs 3 3 100.00
chip_plic_all_irqs_0 545.070s 5344.152us 1 1 100.00
chip_plic_all_irqs_10 243.410s 3512.977us 1 1 100.00
chip_plic_all_irqs_20 369.770s 4516.201us 1 1 100.00
chip_sw_plic_sw_irq 1 1 100.00
chip_sw_plic_sw_irq 175.930s 3425.988us 1 1 100.00
chip_sw_timer 1 1 100.00
chip_sw_rv_timer_irq 167.250s 2993.357us 1 1 100.00
chip_sw_spi_device_flash_mode 1 1 100.00
rom_e2e_smoke 2483.300s 17607.446us 1 1 100.00
chip_sw_spi_device_pass_through 1 1 100.00
chip_sw_spi_device_pass_through 463.790s 7958.622us 1 1 100.00
chip_sw_spi_device_pass_through_collision 0 1 0.00
chip_sw_spi_device_pass_through_collision 217.100s 3427.449us 0 1 0.00
chip_sw_spi_device_tpm 0 1 0.00
chip_sw_spi_device_tpm 100.225s 0.000us 0 1 0.00
chip_sw_spi_host_tx_rx 1 1 100.00
chip_sw_spi_host_tx_rx 194.620s 3042.930us 1 1 100.00
chip_sw_sram_scrambled_access 2 2 100.00
chip_sw_sram_ctrl_scrambled_access 285.680s 4395.167us 1 1 100.00
chip_sw_sram_ctrl_scrambled_access_jitter_en 334.400s 5548.313us 1 1 100.00
chip_sw_sleep_sram_ret_contents 2 2 100.00
chip_sw_sleep_sram_ret_contents_no_scramble 373.780s 9100.850us 1 1 100.00
chip_sw_sleep_sram_ret_contents_scramble 363.970s 8170.044us 1 1 100.00
chip_sw_sram_execution 1 1 100.00
chip_sw_sram_ctrl_execution_main 521.930s 7990.421us 1 1 100.00
chip_sw_sram_lc_escalation 0 2 0.00
chip_sw_all_escalation_resets 135.492s 0.000us 0 1 0.00
chip_sw_data_integrity_escalation 27.579s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_reset 2 2 100.00
chip_sw_pwrmgr_sysrst_ctrl_reset 671.800s 6959.303us 1 1 100.00
chip_sw_sysrst_ctrl_reset 947.280s 24296.672us 1 1 100.00
chip_sw_sysrst_ctrl_inputs 1 1 100.00
chip_sw_sysrst_ctrl_inputs 158.260s 2755.536us 1 1 100.00
chip_sw_sysrst_ctrl_outputs 1 1 100.00
chip_sw_sysrst_ctrl_outputs 221.440s 3177.743us 1 1 100.00
chip_sw_sysrst_ctrl_in_irq 1 1 100.00
chip_sw_sysrst_ctrl_in_irq 336.970s 4182.715us 1 1 100.00
chip_sw_sysrst_ctrl_sleep_wakeup 1 1 100.00
chip_sw_sysrst_ctrl_reset 947.280s 24296.672us 1 1 100.00
chip_sw_sysrst_ctrl_sleep_reset 1 1 100.00
chip_sw_sysrst_ctrl_reset 947.280s 24296.672us 1 1 100.00
chip_sw_sysrst_ctrl_ec_rst_l 1 1 100.00
chip_sw_sysrst_ctrl_ec_rst_l 2122.420s 21074.080us 1 1 100.00
chip_sw_sysrst_ctrl_flash_wp_l 1 1 100.00
chip_sw_sysrst_ctrl_ec_rst_l 2122.420s 21074.080us 1 1 100.00
chip_sw_sysrst_ctrl_ulp_z3_wakeup 1 2 50.00
chip_sw_sysrst_ctrl_ulp_z3_wakeup 208.390s 5083.164us 1 1 100.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 3032.780s 34127.814us 0 1 0.00
chip_sw_usbdev_vbus 0 1 0.00
chip_sw_usbdev_vbus 58.830s 0.000us 0 1 0.00
chip_sw_usbdev_pullup 1 1 100.00
chip_sw_usbdev_pullup 141.950s 2779.017us 1 1 100.00
chip_sw_usbdev_aon_pullup 0 1 0.00
chip_sw_usbdev_aon_pullup 98.484s 0.000us 0 1 0.00
chip_sw_usbdev_setup_rx 1 1 100.00
chip_sw_usbdev_setuprx 341.440s 4156.643us 1 1 100.00
chip_sw_usbdev_config_host 0 1 0.00
chip_sw_usbdev_config_host 134.349s 0.000us 0 1 0.00
chip_sw_usbdev_pincfg 1 1 100.00
chip_sw_usbdev_pincfg 4675.710s 32150.155us 1 1 100.00
chip_sw_usbdev_tx_rx 0 1 0.00
chip_sw_usbdev_dpi 37.586s 0.000us 0 1 0.00
chip_sw_usbdev_toggle_restore 1 1 100.00
chip_sw_usbdev_toggle_restore 173.220s 2791.781us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
chip_sw_aes_masking_off 1 1 100.00
chip_sw_aes_masking_off 167.200s 2828.331us 1 1 100.00
chip_sw_rv_core_ibex_lockstep_glitch 1 1 100.00
chip_sw_rv_core_ibex_lockstep_glitch 69.030s 1670.850us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
chip_sw_coremark 1 1 100.00
chip_sw_coremark 8991.890s 72639.331us 1 1 100.00
chip_sw_power_max_load 1 1 100.00
chip_sw_power_virus 1032.160s 6232.162us 1 1 100.00
rom_e2e_debug 0 3 0.00
rom_e2e_jtag_debug_test_unlocked0 143.510s 4304.408us 0 1 0.00
rom_e2e_jtag_debug_dev 382.070s 5318.767us 0 1 0.00
rom_e2e_jtag_debug_rma 373.480s 5330.326us 0 1 0.00
rom_e2e_jtag_inject 1 3 33.33
rom_e2e_jtag_inject_test_unlocked0 176.400s 4121.856us 1 1 100.00
rom_e2e_jtag_inject_dev 51.470s 1837.993us 0 1 0.00
rom_e2e_jtag_inject_rma 50.650s 1832.408us 0 1 0.00
rom_e2e_self_hash 0 1 0.00
rom_e2e_self_hash 8.306s 0.000us 0 1 0.00
chip_sw_clkmgr_jitter_cycle_measurements 1 1 100.00
chip_sw_clkmgr_jitter_frequency 544.290s 5903.259us 1 1 100.00
chip_sw_edn_boot_mode 1 1 100.00
chip_sw_edn_boot_mode 305.520s 2939.409us 1 1 100.00
chip_sw_edn_auto_mode 1 1 100.00
chip_sw_edn_auto_mode 596.250s 4152.542us 1 1 100.00
chip_sw_edn_sw_mode 1 1 100.00
chip_sw_edn_sw_mode 1045.670s 8521.776us 1 1 100.00
chip_sw_edn_kat 1 1 100.00
chip_sw_edn_kat 219.410s 2508.057us 1 1 100.00
chip_sw_flash_memory_protection 1 1 100.00
chip_sw_flash_ctrl_mem_protection 521.780s 5582.569us 1 1 100.00
chip_sw_otp_ctrl_vendor_test_csr_access 1 1 100.00
chip_sw_otp_ctrl_vendor_test_csr_access 105.910s 2594.582us 1 1 100.00
chip_sw_otp_ctrl_escalation 0 1 0.00
chip_sw_otp_ctrl_escalation 137.720s 2979.465us 0 1 0.00
chip_sw_sensor_ctrl_deep_sleep_wake_up 1 1 100.00
chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up 279.470s 5001.731us 1 1 100.00
chip_sw_pwrmgr_usb_clk_disabled_when_active 1 1 100.00
chip_sw_pwrmgr_usb_clk_disabled_when_active 219.210s 4800.525us 1 1 100.00
chip_sw_all_resets 1 1 100.00
chip_sw_pwrmgr_all_reset_reqs 989.820s 10330.494us 1 1 100.00
chip_rv_dm_perform_debug 0 3 0.00
rom_e2e_jtag_debug_test_unlocked0 143.510s 4304.408us 0 1 0.00
rom_e2e_jtag_debug_dev 382.070s 5318.767us 0 1 0.00
rom_e2e_jtag_debug_rma 373.480s 5330.326us 0 1 0.00
chip_sw_rv_dm_access_after_hw_reset 1 1 100.00
chip_sw_rv_dm_access_after_escalation_reset 251.460s 4473.925us 1 1 100.00
chip_sw_plic_alerts 0 1 0.00
chip_sw_all_escalation_resets 135.492s 0.000us 0 1 0.00
tick_configuration 1 1 100.00
chip_sw_rv_timer_systick_test 5183.530s 37487.417us 1 1 100.00
counter_wrap 1 1 100.00
chip_sw_rv_timer_systick_test 5183.530s 37487.417us 1 1 100.00
chip_sw_spi_device_output_when_disabled_or_sleeping 1 1 100.00
chip_sw_spi_device_pinmux_sleep_retention 132.390s 3733.647us 1 1 100.00
chip_sw_uart_watermarks 0 1 0.00
chip_sw_uart_tx_rx 138.994s 0.000us 0 1 0.00
chip_sw_usbdev_stream 1 1 100.00
chip_sw_usbdev_stream 2939.180s 18396.881us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 5 8 62.50
chip_sival_flash_info_access 157.460s 2876.090us 1 1 100.00
chip_sw_rstmgr_rst_cnsty_escalation 40.333s 0.000us 0 1 0.00
chip_sw_otp_ctrl_rot_auth_config 51.410s 1895.935us 0 1 0.00
chip_sw_otp_ctrl_ecc_error_vendor_test 160.330s 2487.452us 1 1 100.00
chip_sw_otp_ctrl_descrambling 198.820s 3780.557us 1 1 100.00
chip_sw_pwrmgr_lowpower_cancel 234.360s 3783.661us 1 1 100.00
chip_sw_pwrmgr_sleep_wake_5_bug 10.051s 0.000us 0 1 0.00
chip_sw_flash_ctrl_write_clear 130.510s 2355.009us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR @ * us: (cip_base_scoreboard.sv:549) [scoreboard] Check failed item.d_error == exp_d_error (* [*] vs * [*]) On interface chip_reg_block, TL item: req: (cip_tl_seq_item@31702) { a_addr: * a_data: * a_mask: * a_size: * a_param: * a_source: * a_opcode: * a_user: * d_param: * d_source: * d_data: * d_size: * d_opcode: * d_error: * d_sink: * d_user: * a_valid_delay: * d_valid_delay: * a_valid_len: * d_valid_len: * req_abort_after_a_valid_len: * rsp_abort_after_d_valid_len: * req_completed: * rsp_completed: * tl_intg_err_type: TlIntgErrNone max_ecc_errors: * }
chip_tl_errors 51658109218679198515441997189892955818581194461497645664241096579894177671528 214
UVM_ERROR @ 3025.596359 us: (cip_base_scoreboard.sv:549) [uvm_test_top.env.scoreboard] Check failed item.d_error == exp_d_error (0 [0x0] vs 1 [0x1]) On interface chip_reg_block, TL item: req: (cip_tl_seq_item@31702) { a_addr: 'h104d0 a_data: 'hc6b25cd7 a_mask: 'hf a_size: 'h2 a_param: 'h0 a_source: 'h7 a_opcode: 'h4 a_user: 'h1a902 d_param: 'h0 d_source: 'h7 d_data: 'h0 d_size: 'h2 d_opcode: 'h1 d_error: 'h0 d_sink: 'h0 d_user: 'hd2a a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
, unmapped_err: 0, mem_access_err: 0, bus_intg_err: 0, byte_wr_err: 0, csr_size_err: 0, tl_item_err: 0, write_w_instr_type_err: 0, cfg.tl_mem_access_gated: 0 ecc_err: 0
UVM_INFO @ 3025.596359 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (cip_base_vseq.sv:642) [chip_rv_dm_lc_disabled_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
chip_rv_dm_lc_disabled 4529438353565732765375169272359706297337182936394274773847711654801714603946 232
UVM_ERROR @ 5602.922487 us: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.chip_rv_dm_lc_disabled_vseq] Check failed masked_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) addr 0x10570 read out mismatch
UVM_INFO @ 5602.922487 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job returned non-zero exit code
chip_sw_example_flash 17302395344528121717432978840162690386801851397994236905900945705637650865165 None
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp10671112610918928678/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: no such package '@@platforms//host': java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp10671112610918928678/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/BUILD:5:6: @@bazel_tools//tools:host_platform depends on @@platforms//host:host in repository @@platforms which failed to fetch. no such package '@@platforms//host': java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp10671112610918928678/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/current_run/opentitan/sw/device/tests/BUILD:1777:15: Target @@bazel_tools//tools:host_platform was referenced as a platform, but does not provide PlatformInfo
ERROR: Analysis of target '//sw/device/tests:example_test_from_flash_sim_dv' failed; build aborted
INFO: Elapsed time: 61.770s, Critical Path: 0.35s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_example_rom 2654560898033210023667722018854119930228118839466871720152154467947964287326 None
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp5206956533960034773/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: no such package '@@platforms//host': java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp5206956533960034773/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/BUILD:5:6: @@bazel_tools//tools:host_platform depends on @@platforms//host:host in repository @@platforms which failed to fetch. no such package '@@platforms//host': java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp5206956533960034773/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/current_run/opentitan/sw/device/tests/BUILD:1787:15: Target @@bazel_tools//tools:host_platform was referenced as a platform, but does not provide PlatformInfo
ERROR: Analysis of target '//sw/device/tests:example_test_from_rom_sim_dv' failed; build aborted
INFO: Elapsed time: 46.658s, Critical Path: 0.36s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_example_manufacturer 59262573304237656441612781163289294085717490732738895787654318246689341792812 None
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp556904016539463038/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: no such package '@@platforms//host': java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp556904016539463038/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/BUILD:5:6: @@bazel_tools//tools:host_platform depends on @@platforms//host:host in repository @@platforms which failed to fetch. no such package '@@platforms//host': java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp556904016539463038/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+hooks+manufacturer_test_hooks/BUILD.bazel:143:15: Target @@bazel_tools//tools:host_platform was referenced as a platform, but does not provide PlatformInfo
ERROR: Analysis of target '@@+hooks+manufacturer_test_hooks//:example_test_sim_dv' failed; build aborted
INFO: Elapsed time: 31.554s, Critical Path: 0.58s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_all_escalation_resets 40356324668049189898317243403300179665907219644362321716236421204286792518324 None
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/aspect-build/bazel-lib/releases/download/v2.7.7/bazel-lib-v2.7.7.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/aspect_bazel_lib+/temp14833859676378839938/bazel-lib-v2.7.7.tar.gz: GET returned 504 Gateway Time-out
Analyzing: target //sw/device/tests/sim_dv:all_escalation_resets_test_sim_dv (0 packages loaded, 2 targets configured)
ERROR: Analysis of target '//sw/device/tests/sim_dv:all_escalation_resets_test_sim_dv' failed; build aborted: no such package '@@aspect_bazel_lib+//lib': java.io.IOException: Error downloading [https://github.com/aspect-build/bazel-lib/releases/download/v2.7.7/bazel-lib-v2.7.7.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/aspect_bazel_lib+/temp14833859676378839938/bazel-lib-v2.7.7.tar.gz: GET returned 504 Gateway Time-out
INFO: Elapsed time: 127.909s, Critical Path: 0.35s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
FAILED:
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_rstmgr_rst_cnsty_escalation 55590813819994583786227556718760520238233772994649581643230121424835070097519 None
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp5111989404803751657/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: no such package '@@platforms//host': java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp5111989404803751657/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/BUILD:5:6: @@bazel_tools//tools:host_platform depends on @@platforms//host:host in repository @@platforms which failed to fetch. no such package '@@platforms//host': java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp5111989404803751657/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/current_run/opentitan/sw/device/tests/sim_dv/BUILD:306:15: Target @@bazel_tools//tools:host_platform was referenced as a platform, but does not provide PlatformInfo
ERROR: Analysis of target '//sw/device/tests/sim_dv:all_escalation_resets_test_sim_dv' failed; build aborted
INFO: Elapsed time: 32.693s, Critical Path: 0.35s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_data_integrity_escalation 36493188626364314384974512800551027523483542994652573954489257695913003026603 None
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp1719767131645158223/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: no such package '@@platforms//host': java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp1719767131645158223/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/BUILD:5:6: @@bazel_tools//tools:host_platform depends on @@platforms//host:host in repository @@platforms which failed to fetch. no such package '@@platforms//host': java.io.IOException: Error downloading [https://github.com/bazelbuild/platforms/releases/download/0.0.11/platforms-0.0.11.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/platforms/temp1719767131645158223/platforms-0.0.11.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/current_run/opentitan/sw/device/tests/sim_dv/BUILD:348:15: Target @@bazel_tools//tools:host_platform was referenced as a platform, but does not provide PlatformInfo
ERROR: Analysis of target '//sw/device/tests/sim_dv:data_integrity_escalation_reset_test_sim_dv' failed; build aborted
INFO: Elapsed time: 19.787s, Critical Path: 0.37s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_sleep_pin_wake 95091929617980988445289314676962949149105460988576160379621049013116867141395 None
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/tock/elf2tab/archive/2f0e2f0ef01e37799850d1b12f48b93a0b32a203.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+tock+elf2tab/temp10604921506738472944/2f0e2f0ef01e37799850d1b12f48b93a0b32a203.tar.gz: GET returned 504 Gateway Time-out
ERROR: no such package '@@rules_rust++crate+crate_index//': java.io.IOException: Error downloading [https://github.com/tock/elf2tab/archive/2f0e2f0ef01e37799850d1b12f48b93a0b32a203.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+tock+elf2tab/temp10604921506738472944/2f0e2f0ef01e37799850d1b12f48b93a0b32a203.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/current_run/opentitan/sw/host/opentitantool/BUILD:10:12: //sw/host/opentitantool:opentitantool depends on @@rules_rust++crate+crate_index//:anyhow in repository @@rules_rust++crate+crate_index which failed to fetch. no such package '@@rules_rust++crate+crate_index//': java.io.IOException: Error downloading [https://github.com/tock/elf2tab/archive/2f0e2f0ef01e37799850d1b12f48b93a0b32a203.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+tock+elf2tab/temp10604921506738472944/2f0e2f0ef01e37799850d1b12f48b93a0b32a203.tar.gz: GET returned 504 Gateway Time-out
ERROR: Analysis of target '//sw/device/tests:sleep_pin_wake_test_sim_dv' failed; build aborted: Analysis failed
INFO: Elapsed time: 257.012s, Critical Path: 0.37s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
FAILED:
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_sleep_pin_retention 40701538471946634339189437110249611178478859995444011641363104844928804881496 None
Traceback (most recent call last):
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl", line 137, column 45, in _http_archive_impl
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/alexeagle/toolchains_protoc/releases/download/v0.2.1/toolchains_protoc-v0.2.1.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/toolchains_protoc+/temp9661637466751951606/toolchains_protoc-v0.2.1.tar.gz: GET returned 504 Gateway Time-out
ERROR: Analysis of target '//sw/device/tests:sleep_pin_retention_test_sim_dv' failed; build aborted: no such package '@@toolchains_protoc+//protoc': java.io.IOException: Error downloading [https://github.com/alexeagle/toolchains_protoc/releases/download/v0.2.1/toolchains_protoc-v0.2.1.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/toolchains_protoc+/temp9661637466751951606/toolchains_protoc-v0.2.1.tar.gz: GET returned 504 Gateway Time-out
INFO: Elapsed time: 97.840s, Critical Path: 0.36s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
FAILED:
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_uart_tx_rx 61339199046471586148498533268662572408994299241596012814379016251182344754840 None
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl:137:45: An error occurred during the fetch of repository 'toolchains_protoc+':
Traceback (most recent call last):
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl", line 137, column 45, in _http_archive_impl
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/alexeagle/toolchains_protoc/releases/download/v0.2.1/toolchains_protoc-v0.2.1.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/toolchains_protoc+/temp8323450791571345415/toolchains_protoc-v0.2.1.tar.gz: GET returned 504 Gateway Time-out
ERROR: Analysis of target '//sw/device/tests:uart_tx_rx_test_sim_dv' failed; build aborted: no such package '@@toolchains_protoc+//protoc': java.io.IOException: Error downloading [https://github.com/alexeagle/toolchains_protoc/releases/download/v0.2.1/toolchains_protoc-v0.2.1.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/toolchains_protoc+/temp8323450791571345415/toolchains_protoc-v0.2.1.tar.gz: GET returned 504 Gateway Time-out
INFO: Elapsed time: 131.547s, Critical Path: 0.35s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_uart_tx_rx_idx1 111052381119277870629660662597798354833830680512606286386975851263301328703489 None
Analyzing: target //sw/device/tests:uart_tx_rx_test_sim_dv (63 packages loaded, 16 targets configured)
Analyzing: target //sw/device/tests:uart_tx_rx_test_sim_dv (63 packages loaded, 16 targets configured)
ERROR: Analysis of target '//sw/device/tests:uart_tx_rx_test_sim_dv' failed; build aborted: no such package '@@toolchains_protoc+//protoc': java.io.IOException: Error downloading [https://github.com/alexeagle/toolchains_protoc/releases/download/v0.2.1/toolchains_protoc-v0.2.1.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/toolchains_protoc+/temp2995873688031086981/toolchains_protoc-v0.2.1.tar.gz: GET returned 504 Gateway Time-out
INFO: Elapsed time: 43.756s, Critical Path: 0.35s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
FAILED:
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_uart_tx_rx_idx3 56647811935740152884392143074520205134597411973793115753372127353701057145067 None
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl:137:45: An error occurred during the fetch of repository 'toolchains_protoc+':
Traceback (most recent call last):
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl", line 137, column 45, in _http_archive_impl
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/alexeagle/toolchains_protoc/releases/download/v0.2.1/toolchains_protoc-v0.2.1.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/toolchains_protoc+/temp6589195654057207237/toolchains_protoc-v0.2.1.tar.gz: GET returned 504 Gateway Time-out
ERROR: Analysis of target '//sw/device/tests:uart_tx_rx_test_sim_dv' failed; build aborted: no such package '@@toolchains_protoc+//protoc': java.io.IOException: Error downloading [https://github.com/alexeagle/toolchains_protoc/releases/download/v0.2.1/toolchains_protoc-v0.2.1.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/toolchains_protoc+/temp6589195654057207237/toolchains_protoc-v0.2.1.tar.gz: GET returned 504 Gateway Time-out
INFO: Elapsed time: 150.590s, Critical Path: 0.35s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_uart_tx_rx_bootstrap 21428051494211732584424739300444014380013693401875687185257507168574468553575 None
Traceback (most recent call last):
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl", line 137, column 45, in _http_archive_impl
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/alexeagle/toolchains_protoc/releases/download/v0.2.1/toolchains_protoc-v0.2.1.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/toolchains_protoc+/temp3954168777078032538/toolchains_protoc-v0.2.1.tar.gz: GET returned 504 Gateway Time-out
ERROR: Analysis of target '//sw/device/tests:uart_tx_rx_test_sim_dv' failed; build aborted: no such package '@@toolchains_protoc+//protoc': java.io.IOException: Error downloading [https://github.com/alexeagle/toolchains_protoc/releases/download/v0.2.1/toolchains_protoc-v0.2.1.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/toolchains_protoc+/temp3954168777078032538/toolchains_protoc-v0.2.1.tar.gz: GET returned 504 Gateway Time-out
INFO: Elapsed time: 96.945s, Critical Path: 0.35s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
FAILED:
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_usbdev_vbus 77063755475307264376048813118242868778639368316320497487480420677526121283870 None
Analyzing: target //sw/device/tests:usbdev_vbus_test_sim_dv (0 packages loaded, 0 targets configured)
Analyzing: target //sw/device/tests:usbdev_vbus_test_sim_dv (0 packages loaded, 0 targets configured)
ERROR: Analysis of target '//sw/device/tests:usbdev_vbus_test_sim_dv' failed; build aborted: no such package '@@toolchains_protoc+//protoc': java.io.IOException: Error downloading [https://github.com/alexeagle/toolchains_protoc/releases/download/v0.2.1/toolchains_protoc-v0.2.1.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/toolchains_protoc+/temp13434319188505868217/toolchains_protoc-v0.2.1.tar.gz: GET returned 504 Gateway Time-out
INFO: Elapsed time: 51.377s, Critical Path: 0.37s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
FAILED:
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_usbdev_dpi 61979660422827124935275709424126810337205958343743176070267389864737354997140 None
Traceback (most recent call last):
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_buf+/buf/internal/toolchain.bzl", line 182, column 37, in _buf_download_releases_impl
download_info = ctx.download(
Error in download: java.io.IOException: Error downloading [https://github.com/bufbuild/buf/releases/download/v1.27.0/buf-Linux-x86_64] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_buf++ext+rules_buf_toolchains/buf: GET returned 504 Gateway Time-out
ERROR: Analysis of target '//sw/device/tests:usbdev_test_sim_dv' failed; build aborted: java.io.IOException: Error downloading [https://github.com/bufbuild/buf/releases/download/v1.27.0/buf-Linux-x86_64] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_buf++ext+rules_buf_toolchains/buf: GET returned 504 Gateway Time-out
INFO: Elapsed time: 30.140s, Critical Path: 0.35s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
FAILED:
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_usbdev_aon_pullup 102715881225064389694241858835993053505549720952091102984145340481873021042963 None
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl:137:45: An error occurred during the fetch of repository 'toolchains_protoc+':
Traceback (most recent call last):
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl", line 137, column 45, in _http_archive_impl
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/alexeagle/toolchains_protoc/releases/download/v0.2.1/toolchains_protoc-v0.2.1.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/toolchains_protoc+/temp16143244549189099775/toolchains_protoc-v0.2.1.tar.gz: GET returned 504 Gateway Time-out
ERROR: Analysis of target '//sw/device/tests:usbdev_aon_pullup_test_sim_dv' failed; build aborted: no such package '@@toolchains_protoc+//protoc': java.io.IOException: Error downloading [https://github.com/alexeagle/toolchains_protoc/releases/download/v0.2.1/toolchains_protoc-v0.2.1.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/toolchains_protoc+/temp16143244549189099775/toolchains_protoc-v0.2.1.tar.gz: GET returned 504 Gateway Time-out
INFO: Elapsed time: 91.016s, Critical Path: 0.35s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_usbdev_config_host 62265674272705380712673309713272884046687095678611731828551005263287815675064 None
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/lowRISC/serde-annotate/archive/refs/tags/v0.0.13.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+serde_annotate+lowrisc_serde_annotate/temp11587025019010024465/v0.0.13.tar.gz: GET returned 504 Gateway Time-out
ERROR: no such package '@@+serde_annotate+lowrisc_serde_annotate//serde_annotate': java.io.IOException: Error downloading [https://github.com/lowRISC/serde-annotate/archive/refs/tags/v0.0.13.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+serde_annotate+lowrisc_serde_annotate/temp11587025019010024465/v0.0.13.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/current_run/opentitan/sw/host/opentitantool/BUILD:10:12: //sw/host/opentitantool:opentitantool depends on @@+serde_annotate+lowrisc_serde_annotate//serde_annotate:serde_annotate in repository @@+serde_annotate+lowrisc_serde_annotate which failed to fetch. no such package '@@+serde_annotate+lowrisc_serde_annotate//serde_annotate': java.io.IOException: Error downloading [https://github.com/lowRISC/serde-annotate/archive/refs/tags/v0.0.13.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+serde_annotate+lowrisc_serde_annotate/temp11587025019010024465/v0.0.13.tar.gz: GET returned 504 Gateway Time-out
ERROR: Analysis of target '//sw/device/tests:usbdev_config_host_test_sim_dv' failed; build aborted: Analysis failed
INFO: Elapsed time: 126.843s, Critical Path: 0.35s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
FAILED:
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_uart_tx_rx_alt_clk_freq 33243798409706366575536545963476019420267657437771202012440920926096015528557 None
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/sphincs/sphincsplus/archive/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+sphincsplus+sphincsplus_fips205_ipd/temp11325998125491305420/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz: GET returned 504 Gateway Time-out
ERROR: no such package '@@+sphincsplus+sphincsplus_fips205_ipd//': java.io.IOException: Error downloading [https://github.com/sphincs/sphincsplus/archive/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+sphincsplus+sphincsplus_fips205_ipd/temp11325998125491305420/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/current_run/opentitan/sw/host/sphincsplus/BUILD:19:21: //sw/host/sphincsplus:bindgen_shake_128s_simple__bindgen depends on @@+sphincsplus+sphincsplus_fips205_ipd//:sphincs_random_shake_128s_simple in repository @@+sphincsplus+sphincsplus_fips205_ipd which failed to fetch. no such package '@@+sphincsplus+sphincsplus_fips205_ipd//': java.io.IOException: Error downloading [https://github.com/sphincs/sphincsplus/archive/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+sphincsplus+sphincsplus_fips205_ipd/temp11325998125491305420/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz: GET returned 504 Gateway Time-out
ERROR: Analysis of target '//sw/device/tests:uart_tx_rx_test_sim_dv' failed; build aborted: Analysis failed
INFO: Elapsed time: 120.844s, Critical Path: 0.36s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
FAILED:
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_i2c_host_tx_rx_idx1 14341597001199399161521155039820200979044943752101419825802611262342371793608 None
ERROR: no such package '@@+sphincsplus+sphincsplus_fips205_ipd//': java.io.IOException: Error downloading [https://github.com/sphincs/sphincsplus/archive/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+sphincsplus+sphincsplus_fips205_ipd/temp5643123201457068446/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/current_run/opentitan/sw/host/sphincsplus/BUILD:34:21: //sw/host/sphincsplus:bindgen_sha2_128s_simple__bindgen depends on @@+sphincsplus+sphincsplus_fips205_ipd//:api.h in repository @@+sphincsplus+sphincsplus_fips205_ipd which failed to fetch. no such package '@@+sphincsplus+sphincsplus_fips205_ipd//': java.io.IOException: Error downloading [https://github.com/sphincs/sphincsplus/archive/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+sphincsplus+sphincsplus_fips205_ipd/temp5643123201457068446/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz: GET returned 504 Gateway Time-out
Analyzing: target //sw/device/tests/sim_dv:i2c_host_tx_rx_test_sim_dv (2 packages loaded, 17 targets configured)
ERROR: Analysis of target '//sw/device/tests/sim_dv:i2c_host_tx_rx_test_sim_dv' failed; build aborted: Analysis failed
INFO: Elapsed time: 93.975s, Critical Path: 0.35s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
FAILED:
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_spi_device_tpm 42814626911897108811896887193747718907657877962376080404848499544115257547684 None
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://github.com/sphincs/sphincsplus/archive/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+sphincsplus+sphincsplus_fips205_ipd/temp269213775193001180/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz: GET returned 504 Gateway Time-out
ERROR: no such package '@@+sphincsplus+sphincsplus_fips205_ipd//': java.io.IOException: Error downloading [https://github.com/sphincs/sphincsplus/archive/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+sphincsplus+sphincsplus_fips205_ipd/temp269213775193001180/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz: GET returned 504 Gateway Time-out
ERROR: /nightly/current_run/opentitan/sw/host/sphincsplus/BUILD:19:21: //sw/host/sphincsplus:bindgen_shake_128s_simple__bindgen depends on @@+sphincsplus+sphincsplus_fips205_ipd//:api.h in repository @@+sphincsplus+sphincsplus_fips205_ipd which failed to fetch. no such package '@@+sphincsplus+sphincsplus_fips205_ipd//': java.io.IOException: Error downloading [https://github.com/sphincs/sphincsplus/archive/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/+sphincsplus+sphincsplus_fips205_ipd/temp269213775193001180/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz: GET returned 504 Gateway Time-out
ERROR: Analysis of target '//sw/device/tests:spi_device_tpm_tx_rx_test_sim_dv' failed; build aborted: Analysis failed
INFO: Elapsed time: 92.924s, Critical Path: 0.36s
INFO: 1 process: 1 internal.
ERROR: Build did NOT complete successfully
FAILED:
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
chip_sw_pwrmgr_sleep_wake_5_bug 93516202367645084192328995064637459728959496627122140211185877733725887358834 None
Computing main repo mapping:
Loading:
Loading: 0 packages loaded
WARNING: Target pattern parsing failed.
ERROR: Skipping '//sw/device/tests:pwrmgr_sleep_wake_5_bug_test_sim_dv': no such target '//sw/device/tests:pwrmgr_sleep_wake_5_bug_test_sim_dv': target 'pwrmgr_sleep_wake_5_bug_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD
ERROR: no such target '//sw/device/tests:pwrmgr_sleep_wake_5_bug_test_sim_dv': target 'pwrmgr_sleep_wake_5_bug_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD
INFO: Elapsed time: 0.508s
INFO: 0 processes.
ERROR: Build did NOT complete successfully
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
rom_e2e_self_hash 26525792674553166413345502961582525113451418672302330309526666737284218302567 None
Computing main repo mapping:
Loading:
Loading: 0 packages loaded
WARNING: Target pattern parsing failed.
ERROR: Skipping '//sw/device/silicon_creator/rom/e2e/release:rom_e2e_self_hash_test_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e/release:rom_e2e_self_hash_test_sim_dv': target 'rom_e2e_self_hash_test_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e/release' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/release/BUILD
ERROR: no such target '//sw/device/silicon_creator/rom/e2e/release:rom_e2e_self_hash_test_sim_dv': target 'rom_e2e_self_hash_test_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e/release' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/release/BUILD
INFO: Elapsed time: 0.164s
INFO: 0 processes.
ERROR: Build did NOT complete successfully
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:73: sw_build] Error 1
UVM_ERROR @ * us: (sw_logger_if.sv:526) [spi_passthrough_test_sim_dv(sw/device/tests/sim_dv/spi_passthrough_test.c:382)] CHECK-fail: irq == kDtSpiDeviceIrqUploadCmdfifoNotEmpty
chip_sw_spi_device_pass_through_collision 7548154674467410664387068602240908579403655615638787573645422668716840284399 563
UVM_ERROR @ 3427.448696 us: (sw_logger_if.sv:526) [spi_passthrough_test_sim_dv(sw/device/tests/sim_dv/spi_passthrough_test.c:382)] CHECK-fail: irq == kDtSpiDeviceIrqUploadCmdfifoNotEmpty
UVM_INFO @ 3427.448696 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (sw_logger_if.sv:526) [otp_ctrl_lc_signals_test_sim_dv(sw/device/lib/testing/otp_ctrl_testutils.c:39)] Expected a DAI error for access to *
chip_sw_otp_ctrl_lc_signals_rma 69621407646411848747829211292100859408327304544696387444024691168788459886091 463
UVM_ERROR @ 6710.770664 us: (sw_logger_if.sv:526) [otp_ctrl_lc_signals_test_sim_dv(sw/device/lib/testing/otp_ctrl_testutils.c:39)] Expected a DAI error for access to 0x0
UVM_INFO @ 6710.770664 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '(!$fell(lc_ctrl_pkg::lc_tx_test_true_strict(lc_init_done_o)))'
chip_sw_otp_ctrl_escalation 89938816471211169300582621776548658131830908145764920123443617455372598445088 404
Offending '(!$fell(lc_ctrl_pkg::lc_tx_test_true_strict(lc_init_done_o)))'
UVM_ERROR @ 2979.464784 us: (lc_ctrl.sv:878) [ASSERT FAILED] LcInitDoneSticky_A
UVM_INFO @ 2979.464784 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Error-[NOA] Null object access
chip_sw_otp_ctrl_rot_auth_config 68493255135167573497958804176804419779881198794312722040471892118436541363051 450
Error-[NOA] Null object access
src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 1108
The object at dereference depth 1 is being used before it was
constructed/allocated.
Please make sure that the object is allocated before using it.
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted 88841001448693836113441659678969958390183861896743240239170730325874337710233 409
Error-[NOA] Null object access
src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 1108
The object at dereference depth 1 is being used before it was
constructed/allocated.
Please make sure that the object is allocated before using it.
rom_e2e_jtag_debug_dev 13725632516058469128514561996199672308653648305488730900684022052348282707290 499
Error-[NOA] Null object access
src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 903
The object at dereference depth 1 is being used before it was
constructed/allocated.
Please make sure that the object is allocated before using it.
rom_e2e_jtag_debug_rma 77052971392412871767820795332568827494072872165736616423845768284992591090721 491
Error-[NOA] Null object access
src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 903
The object at dereference depth 1 is being used before it was
constructed/allocated.
Please make sure that the object is allocated before using it.
rom_e2e_jtag_inject_dev 85726740857012974063065546500265113790174595159678199227386196170074317245870 420
Error-[NOA] Null object access
src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 1108
The object at dereference depth 1 is being used before it was
constructed/allocated.
Please make sure that the object is allocated before using it.
rom_e2e_jtag_inject_rma 105214343998505201100201585086270077556635573043290756371827159456927512993822 427
Error-[NOA] Null object access
src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 1108
The object at dereference depth 1 is being used before it was
constructed/allocated.
Please make sure that the object is allocated before using it.
UVM_FATAL @ * us: (chip_sw_base_vseq.sv:827) virtual_sequencer [chip_sw_lc_ctrl_scrap_vseq] max attempt reached to get lc status LcExtClockSwitched!
chip_sw_lc_ctrl_rand_to_scrap 44512848743088893570117385291561365579449815995745346628638194646007234604336 395
UVM_FATAL @ 27058.332389 us: (chip_sw_base_vseq.sv:827) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.chip_sw_lc_ctrl_scrap_vseq] max attempt reached to get lc status LcExtClockSwitched!
UVM_INFO @ 27058.332389 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (cip_base_scoreboard.sv:549) [scoreboard] Check failed item.d_error == exp_d_error (* [*] vs * [*]) On interface chip_reg_block, TL item: req: (cip_tl_seq_item@77924) { a_addr: * a_data: * a_mask: * a_size: * a_param: * a_source: * a_opcode: * a_user: * d_param: * d_source: * d_data: * d_size: * d_opcode: * d_error: * d_sink: * d_user: * a_valid_delay: * d_valid_delay: * a_valid_len: * d_valid_len: * req_abort_after_a_valid_len: * rsp_abort_after_d_valid_len: * req_completed: * rsp_completed: * tl_intg_err_type: TlIntgErrNone max_ecc_errors: * }
chip_sw_rstmgr_cpu_info 77157116317866290292923116355630626784145538025273533557604312561386539710119 421
UVM_ERROR @ 3605.571400 us: (cip_base_scoreboard.sv:549) [uvm_test_top.env.scoreboard] Check failed item.d_error == exp_d_error (1 [0x1] vs 0 [0x0]) On interface chip_reg_block, TL item: req: (cip_tl_seq_item@77924) { a_addr: 'h8 a_data: 'h0 a_mask: 'hf a_size: 'h2 a_param: 'h0 a_source: 'h1 a_opcode: 'h0 a_user: 'h259aa d_param: 'h0 d_source: 'h1 d_data: 'h0 d_size: 'h2 d_opcode: 'h0 d_error: 'h1 d_sink: 'h0 d_user: 'h1f2a a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
, unmapped_err: 0, mem_access_err: 0, bus_intg_err: 0, byte_wr_err: 0, csr_size_err: 0, tl_item_err: 0, write_w_instr_type_err: 0, cfg.tl_mem_access_gated: 0 ecc_err: 0
UVM_INFO @ 3605.571400 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '(rstreqs[*] && (reset_cause == HwReq))'
chip_sw_pwrmgr_random_sleep_all_reset_reqs 91218675894212871643647689759890011725234451458483251375142745059731401779131 426
Offending '(rstreqs[1] && (reset_cause == HwReq))'
UVM_ERROR @ 13388.324500 us: (pwrmgr_rstreqs_sva_if.sv:49) [ASSERT FAILED] HwResetOn_A
UVM_INFO @ 13388.324500 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_pwrmgr_deep_sleep_all_reset_reqs 57884600315800472430670328439441915984069223549297351185378035802634926797355 404
Offending '(rstreqs[0] && (reset_cause == HwReq))'
UVM_ERROR @ 5498.760500 us: (pwrmgr_rstreqs_sva_if.sv:49) [ASSERT FAILED] HwResetOn_A
UVM_INFO @ 5498.760500 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_pwrmgr_deep_sleep_por_reset 8098111971159077786149298970245242793070079374178292411886645617871470206560 415
Offending '(rstreqs[0] && (reset_cause == HwReq))'
UVM_ERROR @ 7079.220500 us: (pwrmgr_rstreqs_sva_if.sv:49) [ASSERT FAILED] HwResetOn_A
UVM_INFO @ 7079.220500 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_pwrmgr_random_sleep_power_glitch_reset 96421116963807269830782011356282498358816979612786383979297801830936064635152 402
Offending '(rstreqs[1] && (reset_cause == HwReq))'
UVM_ERROR @ 5771.058500 us: (pwrmgr_rstreqs_sva_if.sv:49) [ASSERT FAILED] HwResetOn_A
UVM_INFO @ 5771.058500 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_aon_timer_wdog_bite_reset 18391653515409162406785910978783295848798117286734075228616393644608788714301 412
Offending '(rstreqs[1] && (reset_cause == HwReq))'
UVM_ERROR @ 7588.584500 us: (pwrmgr_rstreqs_sva_if.sv:49) [ASSERT FAILED] HwResetOn_A
UVM_INFO @ 7588.584500 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (chip_sw_base_vseq.sv:317) virtual_sequencer [chip_sw_adc_ctrl_sleep_debug_cable_wakeup_vseq] SW TEST TIMED OUT. STATE: SwTestStatusInTest, TIMEOUT = * ns
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 12176484378001803531234194269441015707487017588302341332853846118903169876628 414
UVM_ERROR @ 34127.814433 us: (chip_sw_base_vseq.sv:317) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.chip_sw_adc_ctrl_sleep_debug_cable_wakeup_vseq] SW TEST TIMED OUT. STATE: SwTestStatusInTest, TIMEOUT = 18000000 ns
UVM_INFO @ 34127.814433 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (sw_logger_if.sv:526) [alert_test_sim_dv(hw/top_earlgrey/sw/autogen/tests/alert_test.c:292)] CHECK-fail: Expect alert *!
chip_sw_alert_test 79249727749440398385314556269227298945645075260676172248460351823786936974423 409
UVM_ERROR @ 3162.573300 us: (sw_logger_if.sv:526) [alert_test_sim_dv(hw/top_earlgrey/sw/autogen/tests/alert_test.c:292)] CHECK-fail: Expect alert 28!
UVM_INFO @ 3162.573300 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (sw_logger_if.sv:526) [alert_handler_lpg_sleep_mode_alerts_test_sim_dv(sw/device/lib/testing/ret_sram_testutils.c:67)] CHECK-fail: testing_utilities != ((void*)0)
chip_sw_alert_handler_lpg_sleep_mode_alerts 72823689619573877845293780812231702321090551158022395063128309557664802595390 385
UVM_ERROR @ 3041.565892 us: (sw_logger_if.sv:526) [alert_handler_lpg_sleep_mode_alerts_test_sim_dv(sw/device/lib/testing/ret_sram_testutils.c:67)] CHECK-fail: testing_utilities != ((void*)0)
UVM_INFO @ 3041.565892 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes
chip_sw_alert_handler_lpg_sleep_mode_pings 39677657143823897956929655029208386467840307149160382166541667387232328943997 None
Job timed out after 240 minutes
UVM_ERROR @ * us: (chip_sw_power_idle_load_vseq.sv:91) virtual_sequencer [chip_sw_power_idle_load_vseq] PWMCH* : pkt* Clock period is wrong. rcv : * exp : *
chip_sw_power_idle_load 110741046663656874032090183813828964635568162457107353261408375940393131224741 395
UVM_ERROR @ 3271.300000 us: (chip_sw_power_idle_load_vseq.sv:91) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.chip_sw_power_idle_load_vseq] PWMCH3 : pkt3 Clock period is wrong. rcv : 2 exp : 32
UVM_INFO @ 3271.300000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (chip_sw_power_sleep_load_vseq.sv:114) virtual_sequencer [chip_sw_power_sleep_load_vseq] PWMCH* : pkt* Clock period is wrong. rcv : * exp : *
chip_sw_power_sleep_load 14522271420891351820441246273639574229969281355463182091834828043345242235989 402
UVM_ERROR @ 3108.946500 us: (chip_sw_power_sleep_load_vseq.sv:114) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.chip_sw_power_sleep_load_vseq] PWMCH5 : pkt3 Clock period is wrong. rcv : 2 exp : 32
UVM_INFO @ 3108.946500 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank1Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_prod_key_*.signed.*.scr.vmem could not be opened for r mode
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 107282118973080072994153298560720820693295287005423321708064328042932803806303 472
UVM_FATAL @ 10.160001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank1Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.160001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_boot_policy_valid_a_good_b_bad_dev 98411528487176658977454779714206201769128869239395703107495361859010346710372 472
UVM_FATAL @ 10.100001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank1Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.100001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_boot_policy_valid_a_good_b_bad_prod 17738565222953885587838126333061537416818888816189615355385988025615726874811 507
UVM_FATAL @ 10.280001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank1Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.280001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end 49182865191475103814495324360241989407538083440996493398002674826347013053969 503
UVM_FATAL @ 10.240001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank1Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.240001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_boot_policy_valid_a_good_b_bad_rma 93389335259267501471328672543248597198369559830871519688400016469659812288361 515
UVM_FATAL @ 10.340001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank1Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.340001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_*.signed.*.scr.vmem could not be opened for r mode
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 10735928866936148179401464883813976194660804522516144736889408023278971987056 498
UVM_FATAL @ 10.160001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.160001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_boot_policy_valid_a_bad_b_good_dev 1979594643683178132319197407543640316026261756104162722370865398128517135856 535
UVM_FATAL @ 10.240001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.240001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_boot_policy_valid_a_bad_b_good_prod 16650943765802666064869807839033000321395216853155957129704689842617260324439 514
UVM_FATAL @ 10.300001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.300001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end 31142035208440512631859294353078048221569648022211206953786250521053236573535 550
UVM_FATAL @ 10.400001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.400001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_boot_policy_valid_a_bad_b_good_rma 57583392908553613977081932670966929385237687445914722774549952942654083150272 539
UVM_FATAL @ 10.400001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.400001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_sigverify_always_a_bad_b_bad_prod 78283280651077043535073894630269051185515226500665123965203577536101502118661 500
UVM_FATAL @ 10.380001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.380001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_sigverify_always_a_bad_b_bad_prod_end 70653282289432881176601871274950166363780159307473556890031306481875469557811 558
UVM_FATAL @ 10.180001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.180001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_sigverify_always_a_bad_b_bad_rma 14131375932955144541964973273241257185039725237303473607318807877091693650080 541
UVM_FATAL @ 10.140001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.140001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_sigverify_always_a_bad_b_nothing_prod 48184836419060316657460140067181495718235248577118703305847139205402864516930 511
UVM_FATAL @ 10.300001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.300001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end 12957473264970296925716129417283149301124256492334691068527997910856649019423 503
UVM_FATAL @ 10.120001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.120001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_sigverify_always_a_bad_b_nothing_rma 15194834093554943026245646239207426406344749119688422582452536496736380815700 480
UVM_FATAL @ 10.160001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.160001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_test_key_*.signed.*.scr.vmem could not be opened for r mode
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 85029373059724347671993379050334623791042590430936177072496411929254033426815 540
UVM_FATAL @ 10.380001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_test_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.380001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 13383334792820821237916557346076010143341432071045355409034056575161419676552 500
UVM_FATAL @ 10.280001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_test_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.280001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_dev_key_*.signed.*.scr.vmem could not be opened for r mode
rom_e2e_sigverify_always_a_bad_b_bad_dev 105887889124854308541633905803819783121424824773622689549244120099472669760360 560
UVM_FATAL @ 10.280001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_dev_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.280001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_sigverify_always_a_bad_b_nothing_dev 42421888363127156298676110359032409255462126833752839070087693732921584552353 501
UVM_FATAL @ 10.120001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_dev_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.120001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_test_key_*.signed.*.scr.vmem could not be opened for r mode
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 23289700505323696409498319390884526812369406564561238582335565631143808859520 469
UVM_FATAL @ 10.320001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_test_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.320001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_dev_key_*.signed.*.scr.vmem could not be opened for r mode
rom_e2e_sigverify_always_a_nothing_b_bad_dev 109808226600067912623377202212743255383894837028828998962457563601996020380762 469
UVM_FATAL @ 10.300001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_dev_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.300001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_prod_key_*.signed.*.scr.vmem could not be opened for r mode
rom_e2e_sigverify_always_a_nothing_b_bad_prod 112662119329199048857966916411523061925415650481301801520518510367061563897536 441
UVM_FATAL @ 10.360001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.360001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end 115771836217245091470043755719241003938884522170032795071882487968579668057693 507
UVM_FATAL @ 10.280001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.280001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_sigverify_always_a_nothing_b_bad_rma 85853098764936530229479352435400883031264013225678921956629291278444790144855 516
UVM_FATAL @ 10.100001 us: (mem_bkdr_util.sv:597) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_prod_key_0.signed.64.scr.vmem could not be opened for r mode
UVM_INFO @ 10.100001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (jtag_rv_debugger.sv:784) [debugger] Index * appears to be out of bounds
rom_e2e_jtag_debug_test_unlocked0 23969294514568940537017809180922131222543814133722525387977265951573748566927 453
UVM_ERROR @ 4304.407791 us: (jtag_rv_debugger.sv:784) [debugger] Index 3 appears to be out of bounds
UVM_INFO @ 4304.407791 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---