Simulation Results: csrng

 
11/12/2025 17:35:48 sha: 6dd517f json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 88.64 %
  • code
  • 92.39 %
  • assert
  • 93.23 %
  • func
  • 80.30 %
  • block
  • 97.11 %
  • line
  • 97.76 %
  • branch
  • 92.74 %
  • toggle
  • 93.37 %
  • FSM
  • 85.71 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
csrng_smoke 3.000s 33.127us 1 1 100.00
csr_hw_reset 1 1 100.00
csrng_csr_hw_reset 2.000s 28.374us 1 1 100.00
csr_rw 1 1 100.00
csrng_csr_rw 2.000s 15.701us 1 1 100.00
csr_bit_bash 1 1 100.00
csrng_csr_bit_bash 10.000s 386.113us 1 1 100.00
csr_aliasing 1 1 100.00
csrng_csr_aliasing 5.000s 183.940us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
csrng_csr_mem_rw_with_rand_reset 2.000s 80.477us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
csrng_csr_rw 2.000s 15.701us 1 1 100.00
csrng_csr_aliasing 5.000s 183.940us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
interrupts 1 1 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
alerts 1 1 100.00
csrng_alert 10.000s 157.857us 1 1 100.00
err 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
cmds 1 1 100.00
csrng_cmds 43.000s 2298.873us 1 1 100.00
life cycle 1 1 100.00
csrng_cmds 43.000s 2298.873us 1 1 100.00
stress_all 1 1 100.00
csrng_stress_all 131.000s 4002.695us 1 1 100.00
intr_test 1 1 100.00
csrng_intr_test 2.000s 18.114us 1 1 100.00
alert_test 1 1 100.00
csrng_alert_test 3.000s 136.748us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
csrng_tl_errors 9.000s 647.064us 1 1 100.00
tl_d_illegal_access 1 1 100.00
csrng_tl_errors 9.000s 647.064us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
csrng_csr_hw_reset 2.000s 28.374us 1 1 100.00
csrng_csr_rw 2.000s 15.701us 1 1 100.00
csrng_csr_aliasing 5.000s 183.940us 1 1 100.00
csrng_same_csr_outstanding 2.000s 17.059us 1 1 100.00
tl_d_partial_access 4 4 100.00
csrng_csr_hw_reset 2.000s 28.374us 1 1 100.00
csrng_csr_rw 2.000s 15.701us 1 1 100.00
csrng_csr_aliasing 5.000s 183.940us 1 1 100.00
csrng_same_csr_outstanding 2.000s 17.059us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
csrng_tl_intg_err 3.000s 46.623us 1 1 100.00
csrng_sec_cm 3.000s 65.256us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
csrng_csr_rw 2.000s 15.701us 1 1 100.00
csrng_regwen 2.000s 24.591us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
csrng_alert 10.000s 157.857us 1 1 100.00
sec_cm_intersig_mubi 1 1 100.00
csrng_stress_all 131.000s 4002.695us 1 1 100.00
sec_cm_main_sm_fsm_sparse 3 3 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
csrng_sec_cm 3.000s 65.256us 1 1 100.00
sec_cm_cmd_stage_fsm_sparse 3 3 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
csrng_sec_cm 3.000s 65.256us 1 1 100.00
sec_cm_ctr_drbg_fsm_sparse 3 3 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
csrng_sec_cm 3.000s 65.256us 1 1 100.00
sec_cm_ctr_drbg_ctr_redun 3 3 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
csrng_sec_cm 3.000s 65.256us 1 1 100.00
sec_cm_gen_cmd_ctr_redun 3 3 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
csrng_sec_cm 3.000s 65.256us 1 1 100.00
sec_cm_ctrl_mubi 1 1 100.00
csrng_alert 10.000s 157.857us 1 1 100.00
sec_cm_main_sm_ctr_local_esc 2 2 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
sec_cm_constants_lc_gated 1 1 100.00
csrng_stress_all 131.000s 4002.695us 1 1 100.00
sec_cm_sw_genbits_bus_consistency 1 1 100.00
csrng_alert 10.000s 157.857us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
csrng_tl_intg_err 3.000s 46.623us 1 1 100.00
sec_cm_aes_cipher_fsm_sparse 3 3 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
csrng_sec_cm 3.000s 65.256us 1 1 100.00
sec_cm_aes_cipher_fsm_redun 2 2 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
sec_cm_aes_cipher_ctrl_sparse 2 2 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
sec_cm_aes_cipher_fsm_local_esc 2 2 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
sec_cm_aes_cipher_ctr_redun 3 3 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
csrng_sec_cm 3.000s 65.256us 1 1 100.00
sec_cm_aes_cipher_data_reg_local_esc 2 2 100.00
csrng_intr 5.000s 146.538us 1 1 100.00
csrng_err 2.000s 35.569us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
csrng_stress_all_with_rand_reset 333.000s 26496.717us 1 1 100.00

Error Messages

   Test seed line log context