Simulation Results: pwm

 
11/12/2025 17:35:48 sha: 6dd517f json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 97.61 %
  • code
  • 96.14 %
  • assert
  • 98.00 %
  • func
  • 98.68 %
  • block
  • 99.02 %
  • line
  • 99.28 %
  • branch
  • 98.27 %
  • toggle
  • 90.87 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
pwm_smoke 13.000s 4626.385us 1 1 100.00
csr_hw_reset 1 1 100.00
pwm_csr_hw_reset 2.000s 25.759us 1 1 100.00
csr_rw 1 1 100.00
pwm_csr_rw 2.000s 53.467us 1 1 100.00
csr_bit_bash 1 1 100.00
pwm_csr_bit_bash 3.000s 961.123us 1 1 100.00
csr_aliasing 1 1 100.00
pwm_csr_aliasing 1.000s 81.537us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
pwm_csr_mem_rw_with_rand_reset 1.000s 68.854us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
pwm_csr_rw 2.000s 53.467us 1 1 100.00
pwm_csr_aliasing 1.000s 81.537us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dutycycle 1 1 100.00
pwm_rand_output 35.000s 21002.588us 1 1 100.00
pulse 1 1 100.00
pwm_rand_output 35.000s 21002.588us 1 1 100.00
blink 1 1 100.00
pwm_rand_output 35.000s 21002.588us 1 1 100.00
heartbeat 1 1 100.00
pwm_rand_output 35.000s 21002.588us 1 1 100.00
resolution 1 1 100.00
pwm_rand_output 35.000s 21002.588us 1 1 100.00
multi_channel 1 1 100.00
pwm_rand_output 35.000s 21002.588us 1 1 100.00
polarity 1 1 100.00
pwm_rand_output 35.000s 21002.588us 1 1 100.00
phase 2 2 100.00
pwm_rand_output 35.000s 21002.588us 1 1 100.00
pwm_phase 36.000s 42012.022us 1 1 100.00
lowpower 1 1 100.00
pwm_rand_output 35.000s 21002.588us 1 1 100.00
perf 1 1 100.00
pwm_perf 36.000s 10504.153us 1 1 100.00
regwen 1 1 100.00
pwm_regwen 296.000s 21007.256us 1 1 100.00
stress_all 1 1 100.00
pwm_stress_all 135.000s 44285.964us 1 1 100.00
alert_test 1 1 100.00
pwm_alert_test 7.000s 43.041us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
pwm_tl_errors 2.000s 69.177us 1 1 100.00
tl_d_illegal_access 1 1 100.00
pwm_tl_errors 2.000s 69.177us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
pwm_csr_hw_reset 2.000s 25.759us 1 1 100.00
pwm_csr_rw 2.000s 53.467us 1 1 100.00
pwm_csr_aliasing 1.000s 81.537us 1 1 100.00
pwm_same_csr_outstanding 1.000s 49.518us 1 1 100.00
tl_d_partial_access 4 4 100.00
pwm_csr_hw_reset 2.000s 25.759us 1 1 100.00
pwm_csr_rw 2.000s 53.467us 1 1 100.00
pwm_csr_aliasing 1.000s 81.537us 1 1 100.00
pwm_same_csr_outstanding 1.000s 49.518us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
pwm_sec_cm 7.000s 95.641us 1 1 100.00
pwm_tl_intg_err 2.000s 145.660us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
pwm_tl_intg_err 2.000s 145.660us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
heartbeat_wrap 1 1 100.00
pwm_heartbeat_wrap 41.000s 10507.907us 1 1 100.00

Error Messages

   Test seed line log context