pwrmgr Simulation Results

Simulation Results: pwrmgr

11/12/2025 17:35:48 sha: 6dd517f json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
95.60 %

code
94.28 %

assert
95.82 %

func
96.71 %

line
98.76 %

branch
94.85 %

cond
93.78 %

toggle
90.02 %

FSM
94.00 %

Validation stages

V1		100.00%
V2		100.00%
V2S		47.06%
V3		50.00%

8/8 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	pwrmgr_smoke	0.680s	52.783us	1	1	100.00
csr_hw_reset				1	1	100.00
	pwrmgr_csr_hw_reset	0.700s	45.422us	1	1	100.00
csr_rw				1	1	100.00
	pwrmgr_csr_rw	0.630s	49.387us	1	1	100.00
csr_bit_bash				1	1	100.00
	pwrmgr_csr_bit_bash	1.490s	336.351us	1	1	100.00
csr_aliasing				1	1	100.00
	pwrmgr_csr_aliasing	0.740s	108.424us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	pwrmgr_csr_mem_rw_with_rand_reset	0.850s	54.335us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	pwrmgr_csr_rw	0.630s	49.387us	1	1	100.00
	pwrmgr_csr_aliasing	0.740s	108.424us	1	1	100.00

22/22 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
wakeup				1	1	100.00
	pwrmgr_wakeup	0.820s	335.409us	1	1	100.00
control_clks				1	1	100.00
	pwrmgr_wakeup	0.820s	335.409us	1	1	100.00
aborted_low_power				2	2	100.00
	pwrmgr_aborted_low_power	0.970s	39.909us	1	1	100.00
	pwrmgr_lowpower_invalid	0.760s	54.522us	1	1	100.00
reset				2	2	100.00
	pwrmgr_reset	0.810s	98.057us	1	1	100.00
	pwrmgr_reset_invalid	0.790s	116.069us	1	1	100.00
main_power_glitch_reset				1	1	100.00
	pwrmgr_reset	0.810s	98.057us	1	1	100.00
reset_wakeup_race				1	1	100.00
	pwrmgr_wakeup_reset	1.000s	432.858us	1	1	100.00
lowpower_wakeup_race				1	1	100.00
	pwrmgr_lowpower_wakeup_race	1.170s	189.076us	1	1	100.00
disable_rom_integrity_check				1	1	100.00
	pwrmgr_disable_rom_integrity_check	0.780s	155.339us	1	1	100.00
stress_all				1	1	100.00
	pwrmgr_stress_all	5.820s	2164.119us	1	1	100.00
intr_test				1	1	100.00
	pwrmgr_intr_test	0.740s	20.991us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	pwrmgr_tl_errors	1.750s	47.456us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	pwrmgr_tl_errors	1.750s	47.456us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	pwrmgr_csr_hw_reset	0.700s	45.422us	1	1	100.00
	pwrmgr_csr_rw	0.630s	49.387us	1	1	100.00
	pwrmgr_csr_aliasing	0.740s	108.424us	1	1	100.00
	pwrmgr_same_csr_outstanding	0.910s	117.916us	1	1	100.00
tl_d_partial_access				4	4	100.00
	pwrmgr_csr_hw_reset	0.700s	45.422us	1	1	100.00
	pwrmgr_csr_rw	0.630s	49.387us	1	1	100.00
	pwrmgr_csr_aliasing	0.740s	108.424us	1	1	100.00
	pwrmgr_same_csr_outstanding	0.910s	117.916us	1	1	100.00

V2S

8/17 passed

47.06 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				0	2	0.00
	pwrmgr_tl_intg_err	0.720s	12.648us	0	1	0.00
	pwrmgr_sec_cm	0.670s	6.808us	0	1	0.00
prim_count_check				0	1	0.00
	pwrmgr_sec_cm	0.670s	6.808us	0	1	0.00
prim_fsm_check				0	1	0.00
	pwrmgr_sec_cm	0.670s	6.808us	0	1	0.00
sec_cm_bus_integrity				0	1	0.00
	pwrmgr_tl_intg_err	0.720s	12.648us	0	1	0.00
sec_cm_lc_ctrl_intersig_mubi				1	1	100.00
	pwrmgr_sec_cm_lc_ctrl_intersig_mubi	1.720s	1181.671us	1	1	100.00
sec_cm_rom_ctrl_intersig_mubi				1	1	100.00
	pwrmgr_wakeup_reset	1.000s	432.858us	1	1	100.00
sec_cm_rstmgr_intersig_mubi				1	1	100.00
	pwrmgr_sec_cm_rstmgr_intersig_mubi	0.800s	493.536us	1	1	100.00
sec_cm_esc_rx_clk_bkgn_chk				0	1	0.00
	pwrmgr_esc_clk_rst_malfunc	0.660s	7.589us	0	1	0.00
sec_cm_esc_rx_clk_local_esc				0	1	0.00
	pwrmgr_sec_cm	0.670s	6.808us	0	1	0.00
sec_cm_fsm_sparse				0	1	0.00
	pwrmgr_sec_cm	0.670s	6.808us	0	1	0.00
sec_cm_fsm_terminal				0	1	0.00
	pwrmgr_sec_cm	0.670s	6.808us	0	1	0.00
sec_cm_ctrl_flow_global_esc				1	1	100.00
	pwrmgr_global_esc	0.690s	36.614us	1	1	100.00
sec_cm_main_pd_rst_local_esc				1	1	100.00
	pwrmgr_glitch	0.620s	162.305us	1	1	100.00
sec_cm_ctrl_config_regwen				1	1	100.00
	pwrmgr_sec_cm_ctrl_config_regwen	1.010s	229.982us	1	1	100.00
sec_cm_wakeup_config_regwen				1	1	100.00
	pwrmgr_csr_rw	0.630s	49.387us	1	1	100.00
sec_cm_reset_config_regwen				1	1	100.00
	pwrmgr_csr_rw	0.630s	49.387us	1	1	100.00

1/2 passed

50.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
escalation_timeout				0	1	0.00
	pwrmgr_escalation_timeout	0.770s	174.009us	0	1	0.00
stress_all_with_rand_reset				1	1	100.00
	pwrmgr_stress_all_with_rand_reset	6.450s	2309.302us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (cip_base_vseq.sv:1015) virtual_sequencer [pwrmgr_common_vseq] expect alert:fatal_fault to fire
	pwrmgr_tl_intg_err	112935093210016669061783615851370351905468263668992774589883765375924231820938	79	UVM_ERROR @ 12647629 ps: (cip_base_vseq.sv:1015) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire UVM_INFO @ 12647629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	pwrmgr_sec_cm	32269468438935078297402193952180727762340836635968477480304967237190642173909	75	UVM_ERROR @ 6808229 ps: (cip_base_vseq.sv:1015) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire UVM_INFO @ 6808229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (pwrmgr_sec_cm_checker_assert.sv:166) [ASSERT FAILED] EscClkStopEscTimeout_A
	pwrmgr_esc_clk_rst_malfunc	10895037724778878951745655033270569363970709668166261022995642334194704003066	72	UVM_ERROR @ 7589029 ps: (pwrmgr_sec_cm_checker_assert.sv:166) [ASSERT FAILED] EscClkStopEscTimeout_A UVM_INFO @ 7589029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	pwrmgr_escalation_timeout	43074722546693440098737046773560776486104650337677629096374900811640180128469	72	UVM_ERROR @ 174009081 ps: (pwrmgr_sec_cm_checker_assert.sv:166) [ASSERT FAILED] EscClkStopEscTimeout_A UVM_INFO @ 174009081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---