Simulation Results: kmac

 
15/12/2025 19:17:40 sha: f063a18 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 94.91 %
  • code
  • 91.32 %
  • assert
  • 97.83 %
  • func
  • 95.57 %
  • line
  • 99.11 %
  • branch
  • 97.02 %
  • cond
  • 93.83 %
  • toggle
  • 99.76 %
  • FSM
  • 66.90 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 36.140s 2618.723us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.930s 49.684us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.970s 23.396us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 10.650s 1125.467us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 6.620s 492.254us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.070s 462.016us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.970s 23.396us 1 1 100.00
kmac_csr_aliasing 6.620s 492.254us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.690s 36.534us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 0.990s 23.929us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 984.090s 34403.575us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 152.080s 10287.819us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 2012.710s 772272.314us 1 1 100.00
kmac_test_vectors_sha3_256 1484.300s 17913.731us 1 1 100.00
kmac_test_vectors_sha3_384 21.200s 1723.811us 1 1 100.00
kmac_test_vectors_sha3_512 17.080s 2346.528us 1 1 100.00
kmac_test_vectors_shake_128 123.840s 32756.303us 1 1 100.00
kmac_test_vectors_shake_256 310.390s 45621.195us 1 1 100.00
kmac_test_vectors_kmac 2.570s 239.192us 1 1 100.00
kmac_test_vectors_kmac_xof 2.800s 340.391us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 400.700s 21623.279us 1 1 100.00
app 1 1 100.00
kmac_app 167.150s 46746.486us 1 1 100.00
app_with_partial_data 1 1 100.00
kmac_app_with_partial_data 80.150s 10450.477us 1 1 100.00
entropy_refresh 1 1 100.00
kmac_entropy_refresh 124.290s 39120.579us 1 1 100.00
error 1 1 100.00
kmac_error 240.020s 18410.690us 1 1 100.00
key_error 1 1 100.00
kmac_key_error 8.110s 3301.108us 1 1 100.00
sideload_invalid 1 1 100.00
kmac_sideload_invalid 3.550s 154.362us 1 1 100.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 1.070s 61.151us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 1.150s 29.181us 1 1 100.00
entropy_ready_error 1 1 100.00
kmac_entropy_ready_error 20.360s 2268.141us 1 1 100.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.230s 109.706us 1 1 100.00
stress_all 1 1 100.00
kmac_stress_all 749.440s 25239.409us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 0.710s 16.152us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.980s 56.671us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 1.770s 113.679us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 1.770s 113.679us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.930s 49.684us 1 1 100.00
kmac_csr_rw 0.970s 23.396us 1 1 100.00
kmac_csr_aliasing 6.620s 492.254us 1 1 100.00
kmac_same_csr_outstanding 1.750s 69.997us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.930s 49.684us 1 1 100.00
kmac_csr_rw 0.970s 23.396us 1 1 100.00
kmac_csr_aliasing 6.620s 492.254us 1 1 100.00
kmac_same_csr_outstanding 1.750s 69.997us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.220s 242.826us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.220s 242.826us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.220s 242.826us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.220s 242.826us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 1.930s 179.857us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_tl_intg_err 3.090s 115.394us 1 1 100.00
kmac_sec_cm 40.110s 7142.183us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 3.090s 115.394us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.230s 109.706us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 36.140s 2618.723us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 400.700s 21623.279us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.220s 242.826us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 40.110s 7142.183us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 40.110s 7142.183us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 40.110s 7142.183us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 36.140s 2618.723us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.230s 109.706us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 40.110s 7142.183us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 1 1 100.00
kmac_mubi 246.170s 57935.866us 1 1 100.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 36.140s 2618.723us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
kmac_stress_all_with_rand_reset 65.600s 10992.160us 1 1 100.00

Error Messages

   Test seed line log context