spi_device Simulation Results

Simulation Results: spi_device

15/12/2025 19:17:40 sha: f063a18 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
87.75 %

code
93.36 %

assert
94.30 %

func
75.60 %

line
99.11 %

branch
98.37 %

cond
96.40 %

toggle
83.54 %

FSM
89.36 %

Validation stages

V1		100.00%
V2		96.15%
V2S		100.00%
unmapped		100.00%

10/10 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	spi_device_flash_and_tpm	11.540s	3113.866us	1	1	100.00
csr_hw_reset				1	1	100.00
	spi_device_csr_hw_reset	1.000s	64.676us	1	1	100.00
csr_rw				1	1	100.00
	spi_device_csr_rw	1.800s	102.768us	1	1	100.00
csr_bit_bash				1	1	100.00
	spi_device_csr_bit_bash	15.310s	1396.874us	1	1	100.00
csr_aliasing				1	1	100.00
	spi_device_csr_aliasing	16.790s	1202.959us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	spi_device_csr_mem_rw_with_rand_reset	2.380s	48.796us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	spi_device_csr_rw	1.800s	102.768us	1	1	100.00
	spi_device_csr_aliasing	16.790s	1202.959us	1	1	100.00
mem_walk				1	1	100.00
	spi_device_mem_walk	0.770s	53.313us	1	1	100.00
mem_partial_access				1	1	100.00
	spi_device_mem_partial_access	1.660s	23.053us	1	1	100.00

50/52 passed

96.15 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
csb_read				1	1	100.00
	spi_device_csb_read	1.080s	69.249us	1	1	100.00
mem_parity				0	1	0.00
	spi_device_mem_parity	0.840s	5.797us	0	1	0.00
mem_cfg				0	1	0.00
	spi_device_ram_cfg	0.890s	3.042us	0	1	0.00
tpm_read				1	1	100.00
	spi_device_tpm_rw	6.120s	190.633us	1	1	100.00
tpm_write				1	1	100.00
	spi_device_tpm_rw	6.120s	190.633us	1	1	100.00
tpm_hw_reg				2	2	100.00
	spi_device_tpm_read_hw_reg	6.490s	3143.619us	1	1	100.00
	spi_device_tpm_sts_read	0.960s	40.868us	1	1	100.00
tpm_fully_random_case				1	1	100.00
	spi_device_tpm_all	11.470s	2534.725us	1	1	100.00
pass_cmd_filtering				2	2	100.00
	spi_device_pass_cmd_filtering	8.660s	17981.099us	1	1	100.00
	spi_device_flash_all	176.540s	33289.526us	1	1	100.00
pass_addr_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	9.650s	25251.420us	1	1	100.00
	spi_device_flash_all	176.540s	33289.526us	1	1	100.00
pass_payload_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	9.650s	25251.420us	1	1	100.00
	spi_device_flash_all	176.540s	33289.526us	1	1	100.00
cmd_info_slots				1	1	100.00
	spi_device_flash_all	176.540s	33289.526us	1	1	100.00
cmd_read_status				2	2	100.00
	spi_device_intercept	3.270s	235.198us	1	1	100.00
	spi_device_flash_all	176.540s	33289.526us	1	1	100.00
cmd_read_jedec				2	2	100.00
	spi_device_intercept	3.270s	235.198us	1	1	100.00
	spi_device_flash_all	176.540s	33289.526us	1	1	100.00
cmd_read_sfdp				2	2	100.00
	spi_device_intercept	3.270s	235.198us	1	1	100.00
	spi_device_flash_all	176.540s	33289.526us	1	1	100.00
cmd_fast_read				2	2	100.00
	spi_device_intercept	3.270s	235.198us	1	1	100.00
	spi_device_flash_all	176.540s	33289.526us	1	1	100.00
cmd_read_pipeline				2	2	100.00
	spi_device_intercept	3.270s	235.198us	1	1	100.00
	spi_device_flash_all	176.540s	33289.526us	1	1	100.00
flash_cmd_upload				1	1	100.00
	spi_device_upload	2.200s	142.213us	1	1	100.00
mailbox_command				1	1	100.00
	spi_device_mailbox	11.610s	4991.489us	1	1	100.00
mailbox_cross_outside_command				1	1	100.00
	spi_device_mailbox	11.610s	4991.489us	1	1	100.00
mailbox_cross_inside_command				1	1	100.00
	spi_device_mailbox	11.610s	4991.489us	1	1	100.00
cmd_read_buffer				2	2	100.00
	spi_device_flash_mode	14.500s	1463.053us	1	1	100.00
	spi_device_read_buffer_direct	4.110s	1171.602us	1	1	100.00
cmd_dummy_cycle				2	2	100.00
	spi_device_mailbox	11.610s	4991.489us	1	1	100.00
	spi_device_flash_all	176.540s	33289.526us	1	1	100.00
quad_spi				1	1	100.00
	spi_device_flash_all	176.540s	33289.526us	1	1	100.00
dual_spi				1	1	100.00
	spi_device_flash_all	176.540s	33289.526us	1	1	100.00
4b_3b_feature				1	1	100.00
	spi_device_cfg_cmd	2.960s	681.238us	1	1	100.00
write_enable_disable				1	1	100.00
	spi_device_cfg_cmd	2.960s	681.238us	1	1	100.00
TPM_with_flash_or_passthrough_mode				1	1	100.00
	spi_device_flash_and_tpm	11.540s	3113.866us	1	1	100.00
tpm_and_flash_trans_with_min_inactive_time				1	1	100.00
	spi_device_flash_and_tpm_min_idle	24.940s	4094.256us	1	1	100.00
stress_all				1	1	100.00
	spi_device_stress_all	122.920s	96618.272us	1	1	100.00
alert_test				1	1	100.00
	spi_device_alert_test	0.760s	44.667us	1	1	100.00
intr_test				1	1	100.00
	spi_device_intr_test	0.850s	28.292us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	spi_device_tl_errors	3.950s	223.315us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	spi_device_tl_errors	3.950s	223.315us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	spi_device_csr_hw_reset	1.000s	64.676us	1	1	100.00
	spi_device_csr_rw	1.800s	102.768us	1	1	100.00
	spi_device_csr_aliasing	16.790s	1202.959us	1	1	100.00
	spi_device_same_csr_outstanding	2.850s	921.043us	1	1	100.00
tl_d_partial_access				4	4	100.00
	spi_device_csr_hw_reset	1.000s	64.676us	1	1	100.00
	spi_device_csr_rw	1.800s	102.768us	1	1	100.00
	spi_device_csr_aliasing	16.790s	1202.959us	1	1	100.00
	spi_device_same_csr_outstanding	2.850s	921.043us	1	1	100.00

V2S

3/3 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	spi_device_tl_intg_err	14.480s	791.373us	1	1	100.00
	spi_device_sec_cm	1.550s	187.515us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	spi_device_tl_intg_err	14.480s	791.373us	1	1	100.00

unmapped

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				1	1	100.00
	spi_device_flash_mode_ignore_cmds	163.760s	74614.932us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
	spi_device_mem_parity	46759033095171852917891902554461809509151415274794092752476535242787972895739	73	UVM_ERROR @ 5014728 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[68]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name UVM_ERROR @ 5014728 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data)) UVM_ERROR @ 5014728 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[964]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [] vs [*])
	spi_device_ram_cfg	67073026752789861521526011008589756621225192813033473060501218030688156107644	73	UVM_ERROR @ 856476 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x4a7e70 [10010100111111001110000] vs 0x0 [0]) UVM_ERROR @ 886476 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xe5b1c8 [111001011011000111001000] vs 0x0 [0]) UVM_ERROR @ 906476 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x148c1a [101001000110000011010] vs 0x0 [0]) UVM_ERROR @ 912476 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x6b2070 [11010110010000001110000] vs 0x0 [0]) UVM_ERROR @ 930476 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x204350 [1000000100001101010000] vs 0x0 [0])