Simulation Results: spi_device

 
16/12/2025 19:25:10 sha: de081ff json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 83.77 %
  • code
  • 93.21 %
  • assert
  • 94.30 %
  • func
  • 63.79 %
  • line
  • 99.01 %
  • branch
  • 98.18 %
  • cond
  • 95.96 %
  • toggle
  • 83.54 %
  • FSM
  • 89.36 %
Validation stages
V1
100.00%
V2
96.15%
V2S
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_device_flash_and_tpm 472.710s 469283.065us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_device_csr_hw_reset 1.090s 21.258us 1 1 100.00
csr_rw 1 1 100.00
spi_device_csr_rw 1.580s 369.487us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_device_csr_bit_bash 20.810s 2179.729us 1 1 100.00
csr_aliasing 1 1 100.00
spi_device_csr_aliasing 15.670s 5106.719us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_device_csr_mem_rw_with_rand_reset 1.330s 51.018us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_device_csr_rw 1.580s 369.487us 1 1 100.00
spi_device_csr_aliasing 15.670s 5106.719us 1 1 100.00
mem_walk 1 1 100.00
spi_device_mem_walk 0.790s 32.467us 1 1 100.00
mem_partial_access 1 1 100.00
spi_device_mem_partial_access 1.400s 44.060us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
csb_read 1 1 100.00
spi_device_csb_read 0.910s 13.606us 1 1 100.00
mem_parity 0 1 0.00
spi_device_mem_parity 0.740s 1.204us 0 1 0.00
mem_cfg 0 1 0.00
spi_device_ram_cfg 0.810s 4.210us 0 1 0.00
tpm_read 1 1 100.00
spi_device_tpm_rw 2.000s 81.199us 1 1 100.00
tpm_write 1 1 100.00
spi_device_tpm_rw 2.000s 81.199us 1 1 100.00
tpm_hw_reg 2 2 100.00
spi_device_tpm_read_hw_reg 2.690s 721.587us 1 1 100.00
spi_device_tpm_sts_read 0.890s 30.649us 1 1 100.00
tpm_fully_random_case 1 1 100.00
spi_device_tpm_all 6.030s 3693.651us 1 1 100.00
pass_cmd_filtering 2 2 100.00
spi_device_pass_cmd_filtering 1.790s 103.267us 1 1 100.00
spi_device_flash_all 192.150s 127496.235us 1 1 100.00
pass_addr_translation 2 2 100.00
spi_device_pass_addr_payload_swap 3.440s 3177.919us 1 1 100.00
spi_device_flash_all 192.150s 127496.235us 1 1 100.00
pass_payload_translation 2 2 100.00
spi_device_pass_addr_payload_swap 3.440s 3177.919us 1 1 100.00
spi_device_flash_all 192.150s 127496.235us 1 1 100.00
cmd_info_slots 1 1 100.00
spi_device_flash_all 192.150s 127496.235us 1 1 100.00
cmd_read_status 2 2 100.00
spi_device_intercept 5.950s 1523.582us 1 1 100.00
spi_device_flash_all 192.150s 127496.235us 1 1 100.00
cmd_read_jedec 2 2 100.00
spi_device_intercept 5.950s 1523.582us 1 1 100.00
spi_device_flash_all 192.150s 127496.235us 1 1 100.00
cmd_read_sfdp 2 2 100.00
spi_device_intercept 5.950s 1523.582us 1 1 100.00
spi_device_flash_all 192.150s 127496.235us 1 1 100.00
cmd_fast_read 2 2 100.00
spi_device_intercept 5.950s 1523.582us 1 1 100.00
spi_device_flash_all 192.150s 127496.235us 1 1 100.00
cmd_read_pipeline 2 2 100.00
spi_device_intercept 5.950s 1523.582us 1 1 100.00
spi_device_flash_all 192.150s 127496.235us 1 1 100.00
flash_cmd_upload 1 1 100.00
spi_device_upload 7.160s 3052.126us 1 1 100.00
mailbox_command 1 1 100.00
spi_device_mailbox 8.590s 2619.646us 1 1 100.00
mailbox_cross_outside_command 1 1 100.00
spi_device_mailbox 8.590s 2619.646us 1 1 100.00
mailbox_cross_inside_command 1 1 100.00
spi_device_mailbox 8.590s 2619.646us 1 1 100.00
cmd_read_buffer 2 2 100.00
spi_device_flash_mode 15.120s 1223.995us 1 1 100.00
spi_device_read_buffer_direct 4.250s 596.253us 1 1 100.00
cmd_dummy_cycle 2 2 100.00
spi_device_mailbox 8.590s 2619.646us 1 1 100.00
spi_device_flash_all 192.150s 127496.235us 1 1 100.00
quad_spi 1 1 100.00
spi_device_flash_all 192.150s 127496.235us 1 1 100.00
dual_spi 1 1 100.00
spi_device_flash_all 192.150s 127496.235us 1 1 100.00
4b_3b_feature 1 1 100.00
spi_device_cfg_cmd 1.890s 504.823us 1 1 100.00
write_enable_disable 1 1 100.00
spi_device_cfg_cmd 1.890s 504.823us 1 1 100.00
TPM_with_flash_or_passthrough_mode 1 1 100.00
spi_device_flash_and_tpm 472.710s 469283.065us 1 1 100.00
tpm_and_flash_trans_with_min_inactive_time 1 1 100.00
spi_device_flash_and_tpm_min_idle 54.160s 6173.433us 1 1 100.00
stress_all 1 1 100.00
spi_device_stress_all 1.020s 73.837us 1 1 100.00
alert_test 1 1 100.00
spi_device_alert_test 0.680s 12.350us 1 1 100.00
intr_test 1 1 100.00
spi_device_intr_test 0.670s 96.580us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_device_tl_errors 1.530s 58.384us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_device_tl_errors 1.530s 58.384us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_device_csr_hw_reset 1.090s 21.258us 1 1 100.00
spi_device_csr_rw 1.580s 369.487us 1 1 100.00
spi_device_csr_aliasing 15.670s 5106.719us 1 1 100.00
spi_device_same_csr_outstanding 1.440s 89.171us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_device_csr_hw_reset 1.090s 21.258us 1 1 100.00
spi_device_csr_rw 1.580s 369.487us 1 1 100.00
spi_device_csr_aliasing 15.670s 5106.719us 1 1 100.00
spi_device_same_csr_outstanding 1.440s 89.171us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_device_tl_intg_err 9.640s 2467.298us 1 1 100.00
spi_device_sec_cm 0.890s 40.089us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_device_tl_intg_err 9.640s 2467.298us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
spi_device_flash_mode_ignore_cmds 26.280s 1736.938us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
spi_device_mem_parity 6284909279639399387424281302248054196232658130416241511926229008544048941979 73
UVM_ERROR @ 1024191 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[10])
Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR @ 1024191 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))
UVM_ERROR @ 1024191 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[906])
Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])
spi_device_ram_cfg 23152092687080056966081641330584749386497834314663441554889848156293826011005 73
UVM_ERROR @ 1947937 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x2bc941 [1010111100100101000001] vs 0x0 [0])
UVM_ERROR @ 1979937 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x6ebbac [11011101011101110101100] vs 0x0 [0])
UVM_ERROR @ 1994937 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x31d191 [1100011101000110010001] vs 0x0 [0])
UVM_ERROR @ 2076937 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x100fae [100000000111110101110] vs 0x0 [0])
UVM_ERROR @ 2098937 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xcc770a [110011000111011100001010] vs 0x0 [0])