Simulation Results: aes

 
17/12/2025 17:21:33 sha: 82ca542 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 90.22 %
  • code
  • 91.58 %
  • assert
  • 98.25 %
  • func
  • 80.84 %
  • block
  • 93.74 %
  • line
  • 95.47 %
  • branch
  • 85.80 %
  • toggle
  • 97.99 %
  • FSM
  • 87.07 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 64.346us 1 1 100.00
smoke 1 1 100.00
aes_smoke 3.000s 260.079us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 68.874us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 145.665us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 6.000s 335.344us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 110.500us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 1.000s 111.060us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 145.665us 1 1 100.00
aes_csr_aliasing 2.000s 110.500us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 3.000s 260.079us 1 1 100.00
aes_config_error 4.000s 162.244us 1 1 100.00
aes_stress 2.000s 91.884us 1 1 100.00
key_length 3 3 100.00
aes_smoke 3.000s 260.079us 1 1 100.00
aes_config_error 4.000s 162.244us 1 1 100.00
aes_stress 2.000s 91.884us 1 1 100.00
back2back 2 2 100.00
aes_stress 2.000s 91.884us 1 1 100.00
aes_b2b 3.000s 89.752us 1 1 100.00
backpressure 1 1 100.00
aes_stress 2.000s 91.884us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 3.000s 260.079us 1 1 100.00
aes_config_error 4.000s 162.244us 1 1 100.00
aes_stress 2.000s 91.884us 1 1 100.00
aes_alert_reset 3.000s 108.110us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 86.070us 1 1 100.00
aes_config_error 4.000s 162.244us 1 1 100.00
aes_alert_reset 3.000s 108.110us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 6.000s 222.996us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 9.000s 626.904us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 3.000s 108.110us 1 1 100.00
stress 1 1 100.00
aes_stress 2.000s 91.884us 1 1 100.00
sideload 2 2 100.00
aes_stress 2.000s 91.884us 1 1 100.00
aes_sideload 5.000s 1118.809us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 3.000s 109.395us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 24.000s 1876.468us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 52.805us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 3.000s 532.597us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 3.000s 532.597us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 68.874us 1 1 100.00
aes_csr_rw 2.000s 145.665us 1 1 100.00
aes_csr_aliasing 2.000s 110.500us 1 1 100.00
aes_same_csr_outstanding 2.000s 91.139us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 68.874us 1 1 100.00
aes_csr_rw 2.000s 145.665us 1 1 100.00
aes_csr_aliasing 2.000s 110.500us 1 1 100.00
aes_same_csr_outstanding 2.000s 91.139us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 4.000s 101.994us 1 1 100.00
fault_inject 3 3 100.00
aes_fi 3.000s 76.434us 1 1 100.00
aes_control_fi 2.000s 112.950us 1 1 100.00
aes_cipher_fi 3.000s 66.691us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 177.050us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 177.050us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 177.050us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 177.050us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 2.000s 215.696us 1 1 100.00
tl_intg_err 2 2 100.00
aes_tl_intg_err 3.000s 261.645us 1 1 100.00
aes_sec_cm 4.000s 1146.001us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 3.000s 261.645us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 3.000s 108.110us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 177.050us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 177.050us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 3.000s 260.079us 1 1 100.00
aes_stress 2.000s 91.884us 1 1 100.00
aes_alert_reset 3.000s 108.110us 1 1 100.00
aes_core_fi 3.000s 196.921us 1 1 100.00
sec_cm_gcm_config_sparse 2 2 100.00
aes_config_error 4.000s 162.244us 1 1 100.00
aes_stress 2.000s 91.884us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 177.050us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 72.322us 1 1 100.00
aes_stress 2.000s 91.884us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 2.000s 91.884us 1 1 100.00
aes_sideload 5.000s 1118.809us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 72.322us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 72.322us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 72.322us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 72.322us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 72.322us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 2.000s 91.884us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 2.000s 91.884us 1 1 100.00
sec_cm_main_fsm_sparse 1 1 100.00
aes_fi 3.000s 76.434us 1 1 100.00
sec_cm_main_fsm_redun 4 4 100.00
aes_fi 3.000s 76.434us 1 1 100.00
aes_control_fi 2.000s 112.950us 1 1 100.00
aes_cipher_fi 3.000s 66.691us 1 1 100.00
aes_ctr_fi 2.000s 46.448us 1 1 100.00
sec_cm_cipher_fsm_sparse 1 1 100.00
aes_fi 3.000s 76.434us 1 1 100.00
sec_cm_cipher_fsm_redun 3 3 100.00
aes_fi 3.000s 76.434us 1 1 100.00
aes_control_fi 2.000s 112.950us 1 1 100.00
aes_cipher_fi 3.000s 66.691us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 3.000s 66.691us 1 1 100.00
sec_cm_ctr_fsm_sparse 1 1 100.00
aes_fi 3.000s 76.434us 1 1 100.00
sec_cm_ctr_fsm_redun 3 3 100.00
aes_fi 3.000s 76.434us 1 1 100.00
aes_control_fi 2.000s 112.950us 1 1 100.00
aes_ctr_fi 2.000s 46.448us 1 1 100.00
sec_cm_ctrl_sparse 4 4 100.00
aes_fi 3.000s 76.434us 1 1 100.00
aes_control_fi 2.000s 112.950us 1 1 100.00
aes_cipher_fi 3.000s 66.691us 1 1 100.00
aes_ctr_fi 2.000s 46.448us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 3.000s 108.110us 1 1 100.00
sec_cm_main_fsm_local_esc 4 4 100.00
aes_fi 3.000s 76.434us 1 1 100.00
aes_control_fi 2.000s 112.950us 1 1 100.00
aes_cipher_fi 3.000s 66.691us 1 1 100.00
aes_ctr_fi 2.000s 46.448us 1 1 100.00
sec_cm_cipher_fsm_local_esc 4 4 100.00
aes_fi 3.000s 76.434us 1 1 100.00
aes_control_fi 2.000s 112.950us 1 1 100.00
aes_cipher_fi 3.000s 66.691us 1 1 100.00
aes_ctr_fi 2.000s 46.448us 1 1 100.00
sec_cm_ctr_fsm_local_esc 3 3 100.00
aes_fi 3.000s 76.434us 1 1 100.00
aes_control_fi 2.000s 112.950us 1 1 100.00
aes_ctr_fi 2.000s 46.448us 1 1 100.00
sec_cm_data_reg_local_esc 3 3 100.00
aes_fi 3.000s 76.434us 1 1 100.00
aes_control_fi 2.000s 112.950us 1 1 100.00
aes_cipher_fi 3.000s 66.691us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 16.000s 2447.928us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 111454688974789925081743143094323705904335847116063117911634060823084124671339 624
UVM_ERROR @ 2447927609 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.keymgr_sideload_agent.sequencer.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 2447927609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---