Simulation Results: pwm

 
17/12/2025 17:21:33 sha: 82ca542 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 97.59 %
  • code
  • 96.08 %
  • assert
  • 98.00 %
  • func
  • 98.68 %
  • block
  • 98.91 %
  • line
  • 99.28 %
  • branch
  • 98.08 %
  • toggle
  • 90.87 %
Validation stages
V1
100.00%
V2
95.83%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
pwm_smoke 3.000s 2037.101us 1 1 100.00
csr_hw_reset 1 1 100.00
pwm_csr_hw_reset 1.000s 55.198us 1 1 100.00
csr_rw 1 1 100.00
pwm_csr_rw 1.000s 28.616us 1 1 100.00
csr_bit_bash 1 1 100.00
pwm_csr_bit_bash 3.000s 1448.663us 1 1 100.00
csr_aliasing 1 1 100.00
pwm_csr_aliasing 2.000s 112.016us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
pwm_csr_mem_rw_with_rand_reset 2.000s 73.223us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
pwm_csr_rw 1.000s 28.616us 1 1 100.00
pwm_csr_aliasing 2.000s 112.016us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dutycycle 1 1 100.00
pwm_rand_output 33.000s 116670.288us 1 1 100.00
pulse 1 1 100.00
pwm_rand_output 33.000s 116670.288us 1 1 100.00
blink 1 1 100.00
pwm_rand_output 33.000s 116670.288us 1 1 100.00
heartbeat 1 1 100.00
pwm_rand_output 33.000s 116670.288us 1 1 100.00
resolution 1 1 100.00
pwm_rand_output 33.000s 116670.288us 1 1 100.00
multi_channel 1 1 100.00
pwm_rand_output 33.000s 116670.288us 1 1 100.00
polarity 1 1 100.00
pwm_rand_output 33.000s 116670.288us 1 1 100.00
phase 2 2 100.00
pwm_rand_output 33.000s 116670.288us 1 1 100.00
pwm_phase 30.000s 12654.140us 1 1 100.00
lowpower 1 1 100.00
pwm_rand_output 33.000s 116670.288us 1 1 100.00
perf 1 1 100.00
pwm_perf 33.000s 10943.384us 1 1 100.00
regwen 0 1 0.00
pwm_regwen 63.000s 34801.511us 0 1 0.00
stress_all 1 1 100.00
pwm_stress_all 59.000s 102347.705us 1 1 100.00
alert_test 1 1 100.00
pwm_alert_test 1.000s 22.976us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
pwm_tl_errors 2.000s 75.060us 1 1 100.00
tl_d_illegal_access 1 1 100.00
pwm_tl_errors 2.000s 75.060us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
pwm_csr_hw_reset 1.000s 55.198us 1 1 100.00
pwm_csr_rw 1.000s 28.616us 1 1 100.00
pwm_csr_aliasing 2.000s 112.016us 1 1 100.00
pwm_same_csr_outstanding 2.000s 34.046us 1 1 100.00
tl_d_partial_access 4 4 100.00
pwm_csr_hw_reset 1.000s 55.198us 1 1 100.00
pwm_csr_rw 1.000s 28.616us 1 1 100.00
pwm_csr_aliasing 2.000s 112.016us 1 1 100.00
pwm_same_csr_outstanding 2.000s 34.046us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
pwm_tl_intg_err 2.000s 475.053us 1 1 100.00
pwm_sec_cm 2.000s 867.947us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
pwm_tl_intg_err 2.000s 475.053us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
heartbeat_wrap 1 1 100.00
pwm_heartbeat_wrap 33.000s 10504.803us 1 1 100.00

Error Messages

   Test seed line log context
UVM_FATAL (csr_utils_pkg.sv:217) [csr_utils_pkg::csr_wr_sub.isolation_fork] Timeout waiting to csr_wr pwm_reg_block.blink_param_* (addr=*)
pwm_regwen 66901684227075010352416020315732308029516208691818844031970714719710557365383 114
UVM_FATAL @ 34801511135 ps: (csr_utils_pkg.sv:217) [csr_utils_pkg::csr_wr_sub.isolation_fork] Timeout waiting to csr_wr pwm_reg_block.blink_param_4 (addr=0x297c3854)
UVM_INFO @ 34801511135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---