spi_device Simulation Results

Simulation Results: spi_device

17/12/2025 17:21:33 sha: 82ca542 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
85.45 %

code
93.04 %

assert
94.30 %

func
69.00 %

line
99.05 %

branch
98.27 %

cond
95.14 %

toggle
83.36 %

FSM
89.36 %

Validation stages

V1		100.00%
V2		96.15%
V2S		100.00%
unmapped		100.00%

10/10 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	spi_device_flash_and_tpm	271.630s	45506.923us	1	1	100.00
csr_hw_reset				1	1	100.00
	spi_device_csr_hw_reset	0.910s	15.954us	1	1	100.00
csr_rw				1	1	100.00
	spi_device_csr_rw	1.370s	105.065us	1	1	100.00
csr_bit_bash				1	1	100.00
	spi_device_csr_bit_bash	16.410s	2462.981us	1	1	100.00
csr_aliasing				1	1	100.00
	spi_device_csr_aliasing	10.960s	3030.831us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	spi_device_csr_mem_rw_with_rand_reset	3.180s	56.923us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	spi_device_csr_rw	1.370s	105.065us	1	1	100.00
	spi_device_csr_aliasing	10.960s	3030.831us	1	1	100.00
mem_walk				1	1	100.00
	spi_device_mem_walk	0.800s	18.541us	1	1	100.00
mem_partial_access				1	1	100.00
	spi_device_mem_partial_access	1.640s	29.658us	1	1	100.00

50/52 passed

96.15 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
csb_read				1	1	100.00
	spi_device_csb_read	0.960s	18.875us	1	1	100.00
mem_parity				0	1	0.00
	spi_device_mem_parity	0.950s	1.323us	0	1	0.00
mem_cfg				0	1	0.00
	spi_device_ram_cfg	0.690s	7.236us	0	1	0.00
tpm_read				1	1	100.00
	spi_device_tpm_rw	2.690s	121.826us	1	1	100.00
tpm_write				1	1	100.00
	spi_device_tpm_rw	2.690s	121.826us	1	1	100.00
tpm_hw_reg				2	2	100.00
	spi_device_tpm_read_hw_reg	6.740s	2785.331us	1	1	100.00
	spi_device_tpm_sts_read	0.780s	29.338us	1	1	100.00
tpm_fully_random_case				1	1	100.00
	spi_device_tpm_all	25.640s	26196.670us	1	1	100.00
pass_cmd_filtering				2	2	100.00
	spi_device_pass_cmd_filtering	2.350s	1140.565us	1	1	100.00
	spi_device_flash_all	43.290s	28027.994us	1	1	100.00
pass_addr_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	25.780s	13384.990us	1	1	100.00
	spi_device_flash_all	43.290s	28027.994us	1	1	100.00
pass_payload_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	25.780s	13384.990us	1	1	100.00
	spi_device_flash_all	43.290s	28027.994us	1	1	100.00
cmd_info_slots				1	1	100.00
	spi_device_flash_all	43.290s	28027.994us	1	1	100.00
cmd_read_status				2	2	100.00
	spi_device_intercept	7.470s	4610.893us	1	1	100.00
	spi_device_flash_all	43.290s	28027.994us	1	1	100.00
cmd_read_jedec				2	2	100.00
	spi_device_intercept	7.470s	4610.893us	1	1	100.00
	spi_device_flash_all	43.290s	28027.994us	1	1	100.00
cmd_read_sfdp				2	2	100.00
	spi_device_intercept	7.470s	4610.893us	1	1	100.00
	spi_device_flash_all	43.290s	28027.994us	1	1	100.00
cmd_fast_read				2	2	100.00
	spi_device_intercept	7.470s	4610.893us	1	1	100.00
	spi_device_flash_all	43.290s	28027.994us	1	1	100.00
cmd_read_pipeline				2	2	100.00
	spi_device_intercept	7.470s	4610.893us	1	1	100.00
	spi_device_flash_all	43.290s	28027.994us	1	1	100.00
flash_cmd_upload				1	1	100.00
	spi_device_upload	2.960s	297.529us	1	1	100.00
mailbox_command				1	1	100.00
	spi_device_mailbox	8.670s	1268.099us	1	1	100.00
mailbox_cross_outside_command				1	1	100.00
	spi_device_mailbox	8.670s	1268.099us	1	1	100.00
mailbox_cross_inside_command				1	1	100.00
	spi_device_mailbox	8.670s	1268.099us	1	1	100.00
cmd_read_buffer				2	2	100.00
	spi_device_flash_mode	18.110s	12658.891us	1	1	100.00
	spi_device_read_buffer_direct	7.100s	3527.051us	1	1	100.00
cmd_dummy_cycle				2	2	100.00
	spi_device_mailbox	8.670s	1268.099us	1	1	100.00
	spi_device_flash_all	43.290s	28027.994us	1	1	100.00
quad_spi				1	1	100.00
	spi_device_flash_all	43.290s	28027.994us	1	1	100.00
dual_spi				1	1	100.00
	spi_device_flash_all	43.290s	28027.994us	1	1	100.00
4b_3b_feature				1	1	100.00
	spi_device_cfg_cmd	2.380s	40.200us	1	1	100.00
write_enable_disable				1	1	100.00
	spi_device_cfg_cmd	2.380s	40.200us	1	1	100.00
TPM_with_flash_or_passthrough_mode				1	1	100.00
	spi_device_flash_and_tpm	271.630s	45506.923us	1	1	100.00
tpm_and_flash_trans_with_min_inactive_time				1	1	100.00
	spi_device_flash_and_tpm_min_idle	15.060s	1874.393us	1	1	100.00
stress_all				1	1	100.00
	spi_device_stress_all	126.120s	48379.132us	1	1	100.00
alert_test				1	1	100.00
	spi_device_alert_test	0.740s	26.516us	1	1	100.00
intr_test				1	1	100.00
	spi_device_intr_test	0.900s	43.287us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	spi_device_tl_errors	1.990s	39.332us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	spi_device_tl_errors	1.990s	39.332us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	spi_device_csr_hw_reset	0.910s	15.954us	1	1	100.00
	spi_device_csr_rw	1.370s	105.065us	1	1	100.00
	spi_device_csr_aliasing	10.960s	3030.831us	1	1	100.00
	spi_device_same_csr_outstanding	2.250s	407.829us	1	1	100.00
tl_d_partial_access				4	4	100.00
	spi_device_csr_hw_reset	0.910s	15.954us	1	1	100.00
	spi_device_csr_rw	1.370s	105.065us	1	1	100.00
	spi_device_csr_aliasing	10.960s	3030.831us	1	1	100.00
	spi_device_same_csr_outstanding	2.250s	407.829us	1	1	100.00

V2S

3/3 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	spi_device_sec_cm	1.380s	515.848us	1	1	100.00
	spi_device_tl_intg_err	10.550s	1416.187us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	spi_device_tl_intg_err	10.550s	1416.187us	1	1	100.00

unmapped

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				1	1	100.00
	spi_device_flash_mode_ignore_cmds	111.880s	93699.549us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
	spi_device_mem_parity	1741624037187577917746484700331540925421275392645976556449631320347238291095	73	UVM_ERROR @ 1139744 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[93]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name UVM_ERROR @ 1139744 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data)) UVM_ERROR @ 1139744 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[989]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [] vs [*])
	spi_device_ram_cfg	62811362905936591552420217766623762018937936446063246172986184976216630136442	73	UVM_ERROR @ 4726016 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x618b91 [11000011000101110010001] vs 0x0 [0]) UVM_ERROR @ 4784016 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x69dede [11010011101111011011110] vs 0x0 [0]) UVM_ERROR @ 4797016 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x5856 [101100001010110] vs 0x0 [0]) UVM_ERROR @ 4868016 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xa6f54e [101001101111010101001110] vs 0x0 [0]) UVM_ERROR @ 4934016 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x16db66 [101101101101101100110] vs 0x0 [0])