spi_device Simulation Results

Simulation Results: spi_device

18/12/2025 17:19:18 sha: ff6c51f json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
84.35 %

code
92.77 %

assert
94.30 %

func
65.97 %

line
99.04 %

branch
98.23 %

cond
95.80 %

toggle
83.54 %

FSM
87.23 %

Validation stages

V1		100.00%
V2		96.15%
V2S		100.00%
unmapped		100.00%

10/10 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	spi_device_flash_and_tpm	5.980s	721.803us	1	1	100.00
csr_hw_reset				1	1	100.00
	spi_device_csr_hw_reset	0.820s	80.523us	1	1	100.00
csr_rw				1	1	100.00
	spi_device_csr_rw	2.010s	107.824us	1	1	100.00
csr_bit_bash				1	1	100.00
	spi_device_csr_bit_bash	22.590s	1894.476us	1	1	100.00
csr_aliasing				1	1	100.00
	spi_device_csr_aliasing	5.170s	110.991us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	spi_device_csr_mem_rw_with_rand_reset	2.670s	123.755us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	spi_device_csr_rw	2.010s	107.824us	1	1	100.00
	spi_device_csr_aliasing	5.170s	110.991us	1	1	100.00
mem_walk				1	1	100.00
	spi_device_mem_walk	0.620s	13.522us	1	1	100.00
mem_partial_access				1	1	100.00
	spi_device_mem_partial_access	1.610s	256.616us	1	1	100.00

50/52 passed

96.15 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
csb_read				1	1	100.00
	spi_device_csb_read	0.920s	63.504us	1	1	100.00
mem_parity				0	1	0.00
	spi_device_mem_parity	0.750s	2.553us	0	1	0.00
mem_cfg				0	1	0.00
	spi_device_ram_cfg	0.940s	6.972us	0	1	0.00
tpm_read				1	1	100.00
	spi_device_tpm_rw	0.740s	25.809us	1	1	100.00
tpm_write				1	1	100.00
	spi_device_tpm_rw	0.740s	25.809us	1	1	100.00
tpm_hw_reg				2	2	100.00
	spi_device_tpm_read_hw_reg	13.210s	32636.273us	1	1	100.00
	spi_device_tpm_sts_read	1.150s	145.222us	1	1	100.00
tpm_fully_random_case				1	1	100.00
	spi_device_tpm_all	6.190s	3234.297us	1	1	100.00
pass_cmd_filtering				2	2	100.00
	spi_device_pass_cmd_filtering	5.460s	7750.218us	1	1	100.00
	spi_device_flash_all	5.080s	469.148us	1	1	100.00
pass_addr_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	21.910s	22557.569us	1	1	100.00
	spi_device_flash_all	5.080s	469.148us	1	1	100.00
pass_payload_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	21.910s	22557.569us	1	1	100.00
	spi_device_flash_all	5.080s	469.148us	1	1	100.00
cmd_info_slots				1	1	100.00
	spi_device_flash_all	5.080s	469.148us	1	1	100.00
cmd_read_status				2	2	100.00
	spi_device_intercept	6.620s	1387.950us	1	1	100.00
	spi_device_flash_all	5.080s	469.148us	1	1	100.00
cmd_read_jedec				2	2	100.00
	spi_device_intercept	6.620s	1387.950us	1	1	100.00
	spi_device_flash_all	5.080s	469.148us	1	1	100.00
cmd_read_sfdp				2	2	100.00
	spi_device_intercept	6.620s	1387.950us	1	1	100.00
	spi_device_flash_all	5.080s	469.148us	1	1	100.00
cmd_fast_read				2	2	100.00
	spi_device_intercept	6.620s	1387.950us	1	1	100.00
	spi_device_flash_all	5.080s	469.148us	1	1	100.00
cmd_read_pipeline				2	2	100.00
	spi_device_intercept	6.620s	1387.950us	1	1	100.00
	spi_device_flash_all	5.080s	469.148us	1	1	100.00
flash_cmd_upload				1	1	100.00
	spi_device_upload	12.070s	3269.292us	1	1	100.00
mailbox_command				1	1	100.00
	spi_device_mailbox	54.210s	45177.835us	1	1	100.00
mailbox_cross_outside_command				1	1	100.00
	spi_device_mailbox	54.210s	45177.835us	1	1	100.00
mailbox_cross_inside_command				1	1	100.00
	spi_device_mailbox	54.210s	45177.835us	1	1	100.00
cmd_read_buffer				2	2	100.00
	spi_device_flash_mode	4.060s	268.602us	1	1	100.00
	spi_device_read_buffer_direct	7.610s	961.101us	1	1	100.00
cmd_dummy_cycle				2	2	100.00
	spi_device_mailbox	54.210s	45177.835us	1	1	100.00
	spi_device_flash_all	5.080s	469.148us	1	1	100.00
quad_spi				1	1	100.00
	spi_device_flash_all	5.080s	469.148us	1	1	100.00
dual_spi				1	1	100.00
	spi_device_flash_all	5.080s	469.148us	1	1	100.00
4b_3b_feature				1	1	100.00
	spi_device_cfg_cmd	3.450s	746.903us	1	1	100.00
write_enable_disable				1	1	100.00
	spi_device_cfg_cmd	3.450s	746.903us	1	1	100.00
TPM_with_flash_or_passthrough_mode				1	1	100.00
	spi_device_flash_and_tpm	5.980s	721.803us	1	1	100.00
tpm_and_flash_trans_with_min_inactive_time				1	1	100.00
	spi_device_flash_and_tpm_min_idle	150.080s	27210.719us	1	1	100.00
stress_all				1	1	100.00
	spi_device_stress_all	83.400s	48338.196us	1	1	100.00
alert_test				1	1	100.00
	spi_device_alert_test	0.840s	47.996us	1	1	100.00
intr_test				1	1	100.00
	spi_device_intr_test	0.710s	26.705us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	spi_device_tl_errors	1.500s	217.126us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	spi_device_tl_errors	1.500s	217.126us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	spi_device_csr_hw_reset	0.820s	80.523us	1	1	100.00
	spi_device_csr_rw	2.010s	107.824us	1	1	100.00
	spi_device_csr_aliasing	5.170s	110.991us	1	1	100.00
	spi_device_same_csr_outstanding	2.990s	62.284us	1	1	100.00
tl_d_partial_access				4	4	100.00
	spi_device_csr_hw_reset	0.820s	80.523us	1	1	100.00
	spi_device_csr_rw	2.010s	107.824us	1	1	100.00
	spi_device_csr_aliasing	5.170s	110.991us	1	1	100.00
	spi_device_same_csr_outstanding	2.990s	62.284us	1	1	100.00

V2S

3/3 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	spi_device_tl_intg_err	10.470s	669.782us	1	1	100.00
	spi_device_sec_cm	0.930s	41.787us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	spi_device_tl_intg_err	10.470s	669.782us	1	1	100.00

unmapped

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				1	1	100.00
	spi_device_flash_mode_ignore_cmds	24.220s	12229.702us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
	spi_device_mem_parity	96441448381817441853663680767711204818350783381317036276477954471676341858912	73	UVM_ERROR @ 2207335 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[10]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name UVM_ERROR @ 2207335 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data)) UVM_ERROR @ 2207335 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[906]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [] vs [*])
	spi_device_ram_cfg	16838740376728176240973396320736454439713379455542094813129317805845666038005	73	UVM_ERROR @ 4184807 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x9c34b3 [100111000011010010110011] vs 0x0 [0]) UVM_ERROR @ 4274807 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xd54770 [110101010100011101110000] vs 0x0 [0]) UVM_ERROR @ 4344807 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xeb7691 [111010110111011010010001] vs 0x0 [0]) UVM_ERROR @ 4399807 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x9c2dbd [100111000010110110111101] vs 0x0 [0]) UVM_ERROR @ 4486807 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xa0160 [10100000000101100000] vs 0x0 [0])