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outstanding CSR items. \n","UVM_INFO @ 322712474 ps: (cip_base_vseq.sv:1153) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pattgen_common_vseq] \n","Issuing reset for run 1/10\n","UVM_INFO @ 322774976 ps: (cip_base_vseq.sv:1174) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pattgen_common_vseq] \n"]}],"Job timed out after * minutes":[{"name":"pattgen_stress_all","qual_name":"0.pattgen_stress_all.10792671780273235014005665037349726480752767569898978032468737775961394167559","seed":10792671780273235014005665037349726480752767569898978032468737775961394167559,"line":null,"log_path":"/nightly/current_run/scratch/master/pattgen-sim-xcelium/0.pattgen_stress_all/latest/run.log","log_context":["Job timed out after 180 minutes"]}]}},"passed":27,"total":29,"percent":93.10344827586206}