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unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[937])\n"," Either the name is incorrect, or you may not have PLI/ACC visibility to that name\n"]}],"UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])":[{"name":"spi_device_ram_cfg","qual_name":"0.spi_device_ram_cfg.29423919085361547151227100214733595144257453512419283773878609857567318110468","seed":29423919085361547151227100214733595144257453512419283773878609857567318110468,"line":76,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_ram_cfg/latest/run.log","log_context":["UVM_ERROR @   4614767 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x419104 [10000011001000100000100] vs 0x0 [0]) \n","UVM_ERROR @   4622767 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xf36946 [111100110110100101000110] vs 0x0 [0]) \n","UVM_ERROR @   4710767 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x182ea1 [110000010111010100001] vs 0x0 [0]) \n","UVM_ERROR @   4790767 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xfd2feb [111111010010111111101011] vs 0x0 [0]) \n","UVM_ERROR @   4805767 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xcb208c [110010110010000010001100] vs 0x0 [0]) \n"]}]}},"passed":64,"total":66,"percent":96.96969696969697}