{"block":{"name":"spi_device","variant":"1r1w","commit":"dbdbe3d80eae5bb9d1c992ccf5b8e43a4d8285f9","commit_short":"dbdbe3d","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/dbdbe3d80eae5bb9d1c992ccf5b8e43a4d8285f9","revision_info":"GitHub Revision: [`dbdbe3d`](https://github.com/lowrisc/opentitan/tree/dbdbe3d80eae5bb9d1c992ccf5b8e43a4d8285f9)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-03-26T17:19:52Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/spi_device_1r1w/data/spi_device_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"spi_device_flash_and_tpm":{"max_time":51.25,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"spi_device_csr_hw_reset":{"max_time":1.08,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"spi_device_csr_rw":{"max_time":1.76,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"spi_device_csr_bit_bash":{"max_time":24.39,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"spi_device_csr_aliasing":{"max_time":15.13,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"spi_device_csr_mem_rw_with_rand_reset":{"max_time":1.45,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"spi_device_csr_rw":{"max_time":1.76,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_csr_aliasing":{"max_time":15.13,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"mem_walk":{"tests":{"spi_device_mem_walk":{"max_time":0.63,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mem_partial_access":{"tests":{"spi_device_mem_partial_access":{"max_time":1.22,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":10,"total":10,"percent":100.0},"V2":{"testpoints":{"csb_read":{"tests":{"spi_device_csb_read":{"max_time":0.78,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mem_parity":{"tests":{"spi_device_mem_parity":{"max_time":0.69,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"mem_cfg":{"tests":{"spi_device_ram_cfg":{"max_time":0.67,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"tpm_read":{"tests":{"spi_device_tpm_rw":{"max_time":1.19,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tpm_write":{"tests":{"spi_device_tpm_rw":{"max_time":1.19,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tpm_hw_reg":{"tests":{"spi_device_tpm_read_hw_reg":{"max_time":1.34,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_tpm_sts_read":{"max_time":0.74,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"tpm_fully_random_case":{"tests":{"spi_device_tpm_all":{"max_time":6.33,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"pass_cmd_filtering":{"tests":{"spi_device_pass_cmd_filtering":{"max_time":10.29,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":43.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"pass_addr_translation":{"tests":{"spi_device_pass_addr_payload_swap":{"max_time":3.03,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":43.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"pass_payload_translation":{"tests":{"spi_device_pass_addr_payload_swap":{"max_time":3.03,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":43.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_info_slots":{"tests":{"spi_device_flash_all":{"max_time":43.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"cmd_read_status":{"tests":{"spi_device_intercept":{"max_time":2.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":43.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_read_jedec":{"tests":{"spi_device_intercept":{"max_time":2.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":43.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_read_sfdp":{"tests":{"spi_device_intercept":{"max_time":2.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":43.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_fast_read":{"tests":{"spi_device_intercept":{"max_time":2.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":43.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_read_pipeline":{"tests":{"spi_device_intercept":{"max_time":2.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":43.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"flash_cmd_upload":{"tests":{"spi_device_upload":{"max_time":3.53,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mailbox_command":{"tests":{"spi_device_mailbox":{"max_time":4.8,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mailbox_cross_outside_command":{"tests":{"spi_device_mailbox":{"max_time":4.8,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mailbox_cross_inside_command":{"tests":{"spi_device_mailbox":{"max_time":4.8,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"cmd_read_buffer":{"tests":{"spi_device_flash_mode":{"max_time":5.36,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_read_buffer_direct":{"max_time":3.01,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_dummy_cycle":{"tests":{"spi_device_mailbox":{"max_time":4.8,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":43.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"quad_spi":{"tests":{"spi_device_flash_all":{"max_time":43.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dual_spi":{"tests":{"spi_device_flash_all":{"max_time":43.56,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"4b_3b_feature":{"tests":{"spi_device_cfg_cmd":{"max_time":3.05,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"write_enable_disable":{"tests":{"spi_device_cfg_cmd":{"max_time":3.05,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"TPM_with_flash_or_passthrough_mode":{"tests":{"spi_device_flash_and_tpm":{"max_time":51.25,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tpm_and_flash_trans_with_min_inactive_time":{"tests":{"spi_device_flash_and_tpm_min_idle":{"max_time":45.72,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"stress_all":{"tests":{"spi_device_stress_all":{"max_time":132.29,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"spi_device_alert_test":{"max_time":0.77,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"spi_device_intr_test":{"max_time":0.87,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"spi_device_tl_errors":{"max_time":2.47,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"spi_device_tl_errors":{"max_time":2.47,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"spi_device_csr_hw_reset":{"max_time":1.08,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_csr_rw":{"max_time":1.76,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_csr_aliasing":{"max_time":15.13,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_same_csr_outstanding":{"max_time":2.04,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"spi_device_csr_hw_reset":{"max_time":1.08,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_csr_rw":{"max_time":1.76,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_csr_aliasing":{"max_time":15.13,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_same_csr_outstanding":{"max_time":2.04,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":50,"total":52,"percent":96.15384615384616},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"spi_device_tl_intg_err":{"max_time":12.29,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"spi_device_sec_cm":{"max_time":0.89,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"spi_device_tl_intg_err":{"max_time":12.29,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"unmapped":{"testpoints":{"Unmapped":{"tests":{"spi_device_flash_mode_ignore_cmds":{"max_time":51.13,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"coverage":{"code":{"block":null,"line_statement":99.03,"branch":98.2,"condition_expression":95.22,"toggle":83.19,"fsm":89.36},"assertion":94.64,"functional":73.66},"cov_report_page":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/cov_report/dashboard.html","failed_jobs":{"buckets":{"UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])":[{"name":"spi_device_mem_parity","qual_name":"0.spi_device_mem_parity.112012336116974005508722528636388077029797188592629070333850868797358074674148","seed":112012336116974005508722528636388077029797188592629070333850868797358074674148,"line":76,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   2138064 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[32])\n"," Either the name is incorrect, or you may not have PLI/ACC visibility to that name\n","UVM_ERROR @   2138064 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","UVM_ERROR @   2138064 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[928])\n"," Either the name is incorrect, or you may not have PLI/ACC visibility to that name\n"]}],"UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])":[{"name":"spi_device_ram_cfg","qual_name":"0.spi_device_ram_cfg.94685505729109528452929560353142951514119357466708723150320958689008085909789","seed":94685505729109528452929560353142951514119357466708723150320958689008085909789,"line":76,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_ram_cfg/latest/run.log","log_context":["UVM_ERROR @    875402 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xcaf4e3 [110010101111010011100011] vs 0x0 [0]) \n","UVM_ERROR @    913402 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x67bd67 [11001111011110101100111] vs 0x0 [0]) \n","UVM_ERROR @    988402 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x8fafdf [100011111010111111011111] vs 0x0 [0]) \n","UVM_ERROR @   1029402 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x81bdbc [100000011011110110111100] vs 0x0 [0]) \n","UVM_ERROR @   1093402 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x4d376e [10011010011011101101110] vs 0x0 [0]) \n"]}]}},"passed":64,"total":66,"percent":96.96969696969697}