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---\n","\n","\n"]},{"name":"i2c_host_stress_all","qual_name":"0.i2c_host_stress_all.107867427999035505936708426109756067739349372972032317869882345354770069749020","seed":107867427999035505936708426109756067739349372972032317869882345354770069749020,"line":109,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log","log_context":["UVM_ERROR @ 9887896427 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between\n","UVM_INFO @ 9887896427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in 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[*])":[{"name":"i2c_target_unexp_stop","qual_name":"0.i2c_target_unexp_stop.30576658185514659537738771171584753618744852977899387784372753408211721024712","seed":30576658185514659537738771171584753618744852977899387784372753408211721024712,"line":78,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log","log_context":["UVM_ERROR @ 1672969886 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 218 [0xda]) \n","UVM_INFO @ 1672969886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!":[{"name":"i2c_target_hrst","qual_name":"0.i2c_target_hrst.81653236690571991724450377244414749563745232061512833525945132962472170436913","seed":81653236690571991724450377244414749563745232061512833525945132962472170436913,"line":79,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_hrst/latest/run.log","log_context":["UVM_FATAL @ 10284505320 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!\n","UVM_INFO @ 10284505320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1236) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"i2c_host_stress_all_with_rand_reset","qual_name":"0.i2c_host_stress_all_with_rand_reset.6397524484166383081274877226433715208436338770864370474380957105751719440481","seed":6397524484166383081274877226433715208436338770864370474380957105751719440481,"line":91,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 2523860624 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 2523860624 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"i2c_target_stress_all_with_rand_reset","qual_name":"0.i2c_target_stress_all_with_rand_reset.73387180988101862043828698110106533172336863598119377813772469387793830630108","seed":73387180988101862043828698110106533172336863598119377813772469387793830630108,"line":107,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 4365671419 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 4365671419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Error-[NOA] Null object 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*":[{"name":"i2c_target_nack_txstretch","qual_name":"0.i2c_target_nack_txstretch.111613836173665740349738504791745882168325065377920192919384115713044688470872","seed":111613836173665740349738504791745882168325065377920192919384115713044688470872,"line":78,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_nack_txstretch/latest/run.log","log_context":["UVM_ERROR @ 824114980 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0 \n","UVM_INFO @ 824114980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":41,"total":50,"percent":82.0}