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d_data mismatch when d_error = *":[{"name":"otp_ctrl_stress_all_with_rand_reset","qual_name":"0.otp_ctrl_stress_all_with_rand_reset.81062778092359208900645050272338818823363307331573889529656515049022730919941","seed":81062778092359208900645050272338818823363307331573889529656515049022730919941,"line":95,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @  86505377 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1\n","UVM_INFO @  86505377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1315) [otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger!":[{"name":"otp_ctrl_stress_all","qual_name":"0.otp_ctrl_stress_all.36078619550347188887357804554781399178417936253691973847792959797359674714242","seed":36078619550347188887357804554781399178417936253691973847792959797359674714242,"line":39925,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_stress_all/latest/run.log","log_context":["UVM_ERROR @ 19091377059 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!\n","UVM_INFO @ 19091377059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1022) virtual_sequencer [otp_ctrl_common_vseq] expect alert:fatal_check_error to fire":[{"name":"otp_ctrl_sec_cm","qual_name":"0.otp_ctrl_sec_cm.73885447498188625688980756344386880223130780612682817574886747547693229554509","seed":73885447498188625688980756344386880223130780612682817574886747547693229554509,"line":2558,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_sec_cm/latest/run.log","log_context":["UVM_ERROR @ 22670214502 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.otp_ctrl_common_vseq] expect alert:fatal_check_error to fire\n","UVM_INFO @ 22670214502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":26,"total":30,"percent":86.66666666666667}