{"block":{"name":"rstmgr_cnsty_chk","variant":null,"commit":"f66d7468accfb5273d4821ffb6102b0d8c28b489","commit_short":"f66d746","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/f66d7468accfb5273d4821ffb6102b0d8c28b489","revision_info":"GitHub Revision: [`f66d746`](https://github.com/lowrisc/opentitan/tree/f66d7468accfb5273d4821ffb6102b0d8c28b489)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-04-07T19:25:09Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/top_earlgrey/ip_autogen/rstmgr/dv/data/rstmgr_cnsty_chk_testplan.html","stages":{"unmapped":{"testpoints":{"Unmapped":{"tests":{"rstmgr_cnsty_chk_test":{"max_time":2.04,"sim_time":9812.317444,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"coverage":{"code":{"block":null,"line_statement":null,"branch":null,"condition_expression":null,"toggle":null,"fsm":null},"assertion":null,"functional":null},"cov_report_page":"/nightly/current_run/scratch/master/rstmgr_cnsty_chk-sim-vcs/cov_report/dashboard.html","failed_jobs":{"buckets":{"UVM_ERROR (tb.sv:272) [reset_class] Check failed ((delta_cycles < -12) || (delta_cycles > -1) || (error_count == *))":[{"name":"rstmgr_cnsty_chk_test","qual_name":"0.rstmgr_cnsty_chk_test.87146380905946435719426167207897232381058212848646200309587674312112065063358","seed":87146380905946435719426167207897232381058212848646200309587674312112065063358,"line":175,"log_path":"/nightly/current_run/scratch/master/rstmgr_cnsty_chk-sim-vcs/0.rstmgr_cnsty_chk_test/latest/run.log","log_context":["UVM_ERROR @ 1861707444 ps: (tb.sv:272) [reset_class] Check failed ((delta_cycles < -12) || (delta_cycles > -1) || (error_count == 0))  \n","UVM_INFO @ 1880427444 ps: (tb.sv:266) [reset_class] Scan parent release with cycles delta -11 total errors 0 / 16\n","UVM_INFO @ 1899147444 ps: (tb.sv:266) [reset_class] Scan parent release with cycles delta -10 total errors 0 / 16\n","UVM_INFO @ 1917867444 ps: (tb.sv:266) [reset_class] Scan parent release with cycles delta -9 total errors 0 / 16\n","UVM_INFO @ 1936587444 ps: (tb.sv:266) [reset_class] Scan parent release with cycles delta -8 total errors 0 / 16\n"]}],"Job killed most likely because its dependent job failed.":[{"name":"rstmgr_cnsty_chk","qual_name":"cov_merge","seed":null,"line":null,"log_path":"/nightly/current_run/scratch/master/rstmgr_cnsty_chk-sim-vcs/cov_merge/merged.vdb/cov_merge.log","log_context":[]},{"name":"rstmgr_cnsty_chk","qual_name":"cov_report","seed":null,"line":null,"log_path":"/nightly/current_run/scratch/master/rstmgr_cnsty_chk-sim-vcs/cov_report/cov_report.log","log_context":[]}]}},"passed":0,"total":1,"percent":0.0}