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[uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x9bb83a [100110111011100000111010] vs 0x0 [0]) \n","UVM_ERROR @   3039138 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x6820c0 [11010000010000011000000] vs 0x0 [0]) \n","UVM_ERROR @   3050138 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x77b423 [11101111011010000100011] vs 0x0 [0]) \n","UVM_ERROR @   3098138 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x614b36 [11000010100101100110110] vs 0x0 [0]) \n"]}]}},"passed":31,"total":33,"percent":93.93939393939394}