{"block":{"name":"pattgen","variant":null,"commit":"cbf0611ad746e9d6c7ba45219b8e4e9894cd04ab","commit_short":"cbf0611","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/cbf0611ad746e9d6c7ba45219b8e4e9894cd04ab","revision_info":"GitHub Revision: [`cbf0611`](https://github.com/lowrisc/opentitan/tree/cbf0611ad746e9d6c7ba45219b8e4e9894cd04ab)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-05-26T15:30:30Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/pattgen/data/pattgen_testplan.html","stages":{"unmapped":{"testpoints":{"Unmapped":{"tests":{"pattgen_smoke":{"max_time":2.0,"sim_time":232.18362,"passed":1,"total":1,"percent":100.0},"pattgen_perf":{"max_time":465.0,"sim_time":87593.859126,"passed":1,"total":1,"percent":100.0},"pattgen_error":{"max_time":1.0,"sim_time":102.655191,"passed":1,"total":1,"percent":100.0},"cnt_rollover":{"max_time":60.0,"sim_time":5160.574253,"passed":1,"total":1,"percent":100.0},"pattgen_inactive_level":{"max_time":3.0,"sim_time":399.503853,"passed":1,"total":1,"percent":100.0},"pattgen_tl_errors":{"max_time":3.0,"sim_time":40.940616999999996,"passed":1,"total":1,"percent":100.0},"pattgen_tl_intg_err":{"max_time":1.0,"sim_time":45.046732000000006,"passed":1,"total":1,"percent":100.0},"pattgen_sec_cm":{"max_time":2.0,"sim_time":266.357547,"passed":1,"total":1,"percent":100.0},"pattgen_stress_all_with_rand_reset":{"max_time":34.0,"sim_time":3748.195792,"passed":0,"total":1,"percent":0.0},"pattgen_stress_all":{"max_time":2.0,"sim_time":82.412435,"passed":0,"total":1,"percent":0.0},"pattgen_intr_test":{"max_time":1.0,"sim_time":20.872502,"passed":1,"total":1,"percent":100.0},"pattgen_alert_test":{"max_time":1.0,"sim_time":37.396158,"passed":1,"total":1,"percent":100.0},"pattgen_csr_hw_reset":{"max_time":2.0,"sim_time":14.28245,"passed":1,"total":1,"percent":100.0},"pattgen_csr_rw":{"max_time":2.0,"sim_time":28.16723,"passed":1,"total":1,"percent":100.0},"pattgen_csr_bit_bash":{"max_time":3.0,"sim_time":140.78825700000002,"passed":1,"total":1,"percent":100.0},"pattgen_csr_aliasing":{"max_time":1.0,"sim_time":65.926003,"passed":1,"total":1,"percent":100.0},"pattgen_same_csr_outstanding":{"max_time":1.0,"sim_time":24.101518,"passed":1,"total":1,"percent":100.0},"pattgen_csr_mem_rw_with_rand_reset":{"max_time":2.0,"sim_time":90.852999,"passed":1,"total":1,"percent":100.0}},"passed":16,"total":18,"percent":88.88888888888889}},"passed":16,"total":18,"percent":88.88888888888889}},"coverage":{"code":{"block":100.0,"line_statement":100.0,"branch":100.0,"condition_expression":null,"toggle":96.61,"fsm":null},"assertion":96.95,"functional":89.42},"cov_report_page":"/nightly/current_run/scratch/master/pattgen-sim-xcelium/cov_report/index.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR (cip_base_vseq.sv:1287) [pattgen_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"pattgen_stress_all_with_rand_reset","qual_name":"0.pattgen_stress_all_with_rand_reset.22079485735391866108835246874881088362132392815661576915465473210833439976807","seed":22079485735391866108835246874881088362132392815661576915465473210833439976807,"line":514,"log_path":"/nightly/current_run/scratch/master/pattgen-sim-xcelium/0.pattgen_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 3722159177 ps: (cip_base_vseq.sv:1200) [uvm_test_top.env.virtual_sequencer.pattgen_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items. \n","UVM_INFO @ 3722159177 ps: (cip_base_vseq.sv:1203) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pattgen_common_vseq] \n","Issuing reset for run 9/10\n","UVM_INFO @ 3722207369 ps: (cip_base_vseq.sv:1224) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pattgen_common_vseq] \n"]}],"UVM_ERROR (pattgen_scoreboard.sv:76) [scoreboard] exp_item_q[i] item uncompared:":[{"name":"pattgen_stress_all","qual_name":"0.pattgen_stress_all.93616783940338235610518944131751360778830375362573414769373116148184664618082","seed":93616783940338235610518944131751360778830375362573414769373116148184664618082,"line":130,"log_path":"/nightly/current_run/scratch/master/pattgen-sim-xcelium/0.pattgen_stress_all/latest/run.log","log_context":["------------------------------------\n","Name      Type          Size  Value \n","------------------------------------\n","exp_item  pattgen_item  -     @11220\n"]}]}},"passed":16,"total":18,"percent":88.88888888888889}