{"block":{"name":"chip","variant":null,"commit":"1d0cf808c91f76f1d0426628dfa14b906434ff05","commit_short":"1d0cf80","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/1d0cf808c91f76f1d0426628dfa14b906434ff05","revision_info":"GitHub Revision: [`1d0cf80`](https://github.com/lowrisc/opentitan/tree/1d0cf808c91f76f1d0426628dfa14b906434ff05)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-05-28T15:30:27Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/top_earlgrey/data/chip_testplan.html","stages":{"unmapped":{"testpoints":{"Unmapped":{"tests":{"chip_csr_bit_bash":{"max_time":172.17,"sim_time":3294.65142,"passed":1,"total":1,"percent":100.0},"chip_csr_aliasing":{"max_time":4603.08,"sim_time":37015.627172,"passed":1,"total":1,"percent":100.0},"chip_same_csr_outstanding":{"max_time":2729.67,"sim_time":27364.237127999997,"passed":1,"total":1,"percent":100.0},"chip_sw_example_flash":{"max_time":157.96,"sim_time":2339.61548,"passed":1,"total":1,"percent":100.0},"chip_sw_example_rom":{"max_time":84.46,"sim_time":2669.1936600000004,"passed":1,"total":1,"percent":100.0},"chip_sw_example_manufacturer":{"max_time":169.26,"sim_time":3020.927354,"passed":1,"total":1,"percent":100.0},"chip_sw_example_concurrency":{"max_time":178.25,"sim_time":3421.5915,"passed":1,"total":1,"percent":100.0},"chip_sival_flash_info_access":{"max_time":205.57,"sim_time":3746.5544019999998,"passed":1,"total":1,"percent":100.0},"chip_sw_all_escalation_resets":{"max_time":355.55,"sim_time":5830.145746,"passed":1,"total":1,"percent":100.0},"chip_sw_rstmgr_rst_cnsty_escalation":{"max_time":19.21,"sim_time":10.160001,"passed":0,"total":1,"percent":0.0},"chip_sw_data_integrity_escalation":{"max_time":558.78,"sim_time":5643.037571999999,"passed":1,"total":1,"percent":100.0},"chip_sw_sleep_pin_mio_dio_val":{"max_time":172.47,"sim_time":3367.0205,"passed":0,"total":1,"percent":0.0},"chip_sw_sleep_pin_wake":{"max_time":163.08,"sim_time":3046.432672,"passed":1,"total":1,"percent":100.0},"chip_sw_sleep_pin_retention":{"max_time":219.73,"sim_time":4027.28592,"passed":1,"total":1,"percent":100.0},"chip_sw_sleep_pwm_pulses":{"max_time":827.98,"sim_time":9471.795825,"passed":1,"total":1,"percent":100.0},"chip_sw_pattgen_ios":{"max_time":183.8,"sim_time":3056.1601349999996,"passed":1,"total":1,"percent":100.0},"chip_sw_uart_tx_rx":{"max_time":344.31,"sim_time":3659.558168,"passed":1,"total":1,"percent":100.0},"chip_sw_uart_tx_rx_idx1":{"max_time":340.78,"sim_time":4684.745980000001,"passed":1,"total":1,"percent":100.0},"chip_sw_uart_tx_rx_idx2":{"max_time":350.34,"sim_time":4184.933554,"passed":1,"total":1,"percent":100.0},"chip_sw_uart_tx_rx_idx3":{"max_time":381.99,"sim_time":4507.824559000001,"passed":1,"total":1,"percent":100.0},"chip_sw_uart_tx_rx_bootstrap":{"max_time":8011.34,"sim_time":63470.902218999996,"passed":1,"total":1,"percent":100.0},"chip_sw_usbdev_vbus":{"max_time":126.63999999999999,"sim_time":2463.963576,"passed":1,"total":1,"percent":100.0},"chip_sw_usbdev_dpi":{"max_time":1879.82,"sim_time":11927.731436,"passed":1,"total":1,"percent":100.0},"chip_sw_usbdev_pullup":{"max_time":155.9,"sim_time":3187.0996880000002,"passed":1,"total":1,"percent":100.0},"chip_sw_usbdev_aon_pullup":{"max_time":313.8,"sim_time":4126.276794,"passed":1,"total":1,"percent":100.0},"chip_sw_usbdev_setuprx":{"max_time":340.55,"sim_time":4628.94478,"passed":1,"total":1,"percent":100.0},"chip_sw_usbdev_config_host":{"max_time":1038.81,"sim_time":8659.329995999999,"passed":1,"total":1,"percent":100.0},"chip_sw_usbdev_pincfg":{"max_time":5399.12,"sim_time":31913.796113,"passed":1,"total":1,"percent":100.0},"chip_sw_usbdev_stream":{"max_time":3189.72,"sim_time":18974.579513999997,"passed":1,"total":1,"percent":100.0},"chip_sw_usbdev_toggle_restore":{"max_time":178.22,"sim_time":2856.40945,"passed":1,"total":1,"percent":100.0},"chip_sw_inject_scramble_seed":{"max_time":7593.12,"sim_time":57794.56992,"passed":1,"total":1,"percent":100.0},"chip_sw_exit_test_unlocked_bootstrap":{"max_time":7420.05,"sim_time":54256.753675,"passed":1,"total":1,"percent":100.0},"chip_sw_uart_rand_baudrate":{"max_time":299.72,"sim_time":3706.35904,"passed":1,"total":1,"percent":100.0},"chip_sw_uart_tx_rx_alt_clk_freq":{"max_time":332.54,"sim_time":4207.960217,"passed":1,"total":1,"percent":100.0},"chip_sw_uart_tx_rx_alt_clk_freq_low_speed":{"max_time":673.82,"sim_time":8837.692771,"passed":1,"total":1,"percent":100.0},"chip_sw_i2c_host_tx_rx":{"max_time":361.83,"sim_time":4952.736625,"passed":1,"total":1,"percent":100.0},"chip_sw_i2c_host_tx_rx_idx1":{"max_time":418.38,"sim_time":5375.779824,"passed":1,"total":1,"percent":100.0},"chip_sw_i2c_host_tx_rx_idx2":{"max_time":463.06,"sim_time":5520.156188,"passed":1,"total":1,"percent":100.0},"chip_sw_i2c_device_tx_rx":{"max_time":329.9,"sim_time":4557.993898,"passed":1,"total":1,"percent":100.0},"chip_sw_spi_device_tpm":{"max_time":205.14,"sim_time":2871.4169730000003,"passed":1,"total":1,"percent":100.0},"chip_sw_spi_host_tx_rx":{"max_time":190.24,"sim_time":3451.579571,"passed":1,"total":1,"percent":100.0},"chip_sw_spi_device_pinmux_sleep_retention":{"max_time":151.87,"sim_time":4029.1949759999993,"passed":1,"total":1,"percent":100.0},"chip_sw_spi_device_pass_through":{"max_time":247.30999999999997,"sim_time":4121.955676,"passed":1,"total":1,"percent":100.0},"chip_sw_spi_device_pass_through_collision":{"max_time":200.65,"sim_time":3302.68787,"passed":0,"total":1,"percent":0.0},"chip_sw_gpio":{"max_time":338.58,"sim_time":4512.793519999999,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_ctrl_ops":{"max_time":376.07,"sim_time":4300.32236,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_ctrl_ops_jitter_en":{"max_time":337.05,"sim_time":3624.598313,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_ctrl_lc_rw_en":{"max_time":156.26,"sim_time":2891.54466,"passed":0,"total":1,"percent":0.0},"chip_sw_flash_ctrl_access":{"max_time":592.4,"sim_time":5562.400208,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_ctrl_access_jitter_en":{"max_time":557.21,"sim_time":6272.763578,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_ctrl_idle_low_power":{"max_time":233.67,"sim_time":3781.688176,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_init":{"max_time":1197.82,"sim_time":19397.0195,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_rma_unlocked":{"max_time":3930.2900000000004,"sim_time":44306.1208,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_ctrl_clock_freqs":{"max_time":512.12,"sim_time":5675.862894,"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_entropy":{"max_time":1407.68,"sim_time":10491.203466,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_otp_hw_cfg0":{"max_time":160.56,"sim_time":3141.5667310000003,"passed":1,"total":1,"percent":100.0},"chip_sw_otp_ctrl_lc_signals_test_unlocked0":{"max_time":203.53,"sim_time":3533.479816,"passed":1,"total":1,"percent":100.0},"chip_sw_otp_ctrl_lc_signals_dev":{"max_time":629.8,"sim_time":7806.1221160000005,"passed":1,"total":1,"percent":100.0},"chip_sw_otp_ctrl_lc_signals_prod":{"max_time":465.82,"sim_time":7182.361019,"passed":1,"total":1,"percent":100.0},"chip_sw_otp_ctrl_lc_signals_rma":{"max_time":530.38,"sim_time":7630.995642,"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_vendor_test_csr_access":{"max_time":67.85,"sim_time":3029.695452,"passed":1,"total":1,"percent":100.0},"chip_sw_otp_ctrl_escalation":{"max_time":202.65,"sim_time":2949.465456,"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_dai_lock":{"max_time":831.6,"sim_time":8236.952388,"passed":1,"total":1,"percent":100.0},"chip_sw_otp_ctrl_rot_auth_config":{"max_time":7.71,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_ecc_error_vendor_test":{"max_time":170.46,"sim_time":2842.184136,"passed":1,"total":1,"percent":100.0},"chip_sw_otp_ctrl_descrambling":{"max_time":176.11,"sim_time":3049.41637,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_transition":{"max_time":427.35,"sim_time":7053.638721,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_rma_to_scrap":{"max_time":191.27,"sim_time":3912.7627740000003,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_raw_to_scrap":{"max_time":88.57,"sim_time":3638.9335490000003,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_test_locked0_to_scrap":{"max_time":81.11,"sim_time":3248.990791,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_rand_to_scrap":{"max_time":164.92,"sim_time":3961.418385,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_walkthrough_dev":{"max_time":615.6,"sim_time":8713.46132,"passed":0,"total":1,"percent":0.0},"chip_sw_lc_walkthrough_prod":{"max_time":671.92,"sim_time":12304.410844,"passed":0,"total":1,"percent":0.0},"chip_sw_lc_walkthrough_prodend":{"max_time":600.22,"sim_time":7855.9866600000005,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_volatile_raw_unlock":{"max_time":80.27,"sim_time":2175.191244,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz":{"max_time":76.9,"sim_time":2740.177086,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_walkthrough_rma":{"max_time":316.96,"sim_time":6749.517257,"passed":0,"total":1,"percent":0.0},"chip_sw_lc_walkthrough_testunlocks":{"max_time":1561.66,"sim_time":28721.55423,"passed":1,"total":1,"percent":100.0},"chip_sw_rstmgr_sw_req":{"max_time":336.39,"sim_time":4878.503173,"passed":1,"total":1,"percent":100.0},"chip_sw_rstmgr_sw_rst":{"max_time":169.26,"sim_time":3029.969952,"passed":1,"total":1,"percent":100.0},"chip_sw_rstmgr_alert_info":{"max_time":1099.29,"sim_time":12494.249033,"passed":1,"total":1,"percent":100.0},"chip_sw_rstmgr_cpu_info":{"max_time":446.84,"sim_time":7515.451167,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_full_aon_reset":{"max_time":222.27,"sim_time":6139.71632,"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_main_power_glitch_reset":{"max_time":250.65,"sim_time":3738.095738,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_sysrst_ctrl_reset":{"max_time":741.4,"sim_time":8447.956728000001,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_all_reset_reqs":{"max_time":1036.74,"sim_time":11453.534826,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_random_sleep_all_reset_reqs":{"max_time":589.96,"sim_time":13957.4045,"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_deep_sleep_all_reset_reqs":{"max_time":233.67,"sim_time":5609.5975,"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_normal_sleep_all_reset_reqs":{"max_time":1101.68,"sim_time":13441.866239,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_deep_sleep_por_reset":{"max_time":319.75,"sim_time":7185.884,"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_normal_sleep_por_reset":{"max_time":341.61,"sim_time":5927.516389,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_sleep_power_glitch_reset":{"max_time":147.66,"sim_time":3224.436,"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_deep_sleep_power_glitch_reset":{"max_time":306.44,"sim_time":6914.301155,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_random_sleep_power_glitch_reset":{"max_time":1071.84,"sim_time":16027.295970000001,"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_sleep_disabled":{"max_time":219.07,"sim_time":3612.325687,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_usb_clk_disabled_when_active":{"max_time":279.36,"sim_time":5063.330046,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_timer_irq":{"max_time":126.28,"sim_time":2487.197345,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_timer_systick_test":{"max_time":5785.84,"sim_time":38241.436438000004,"passed":1,"total":1,"percent":100.0},"chip_sw_sysrst_ctrl_inputs":{"max_time":169.34,"sim_time":3538.345791,"passed":1,"total":1,"percent":100.0},"chip_sw_sysrst_ctrl_in_irq":{"max_time":386.84,"sim_time":5286.453782,"passed":1,"total":1,"percent":100.0},"chip_sw_sysrst_ctrl_ulp_z3_wakeup":{"max_time":272.98,"sim_time":6771.796995,"passed":1,"total":1,"percent":100.0},"chip_sw_sysrst_ctrl_reset":{"max_time":1015.48,"sim_time":24439.970668,"passed":1,"total":1,"percent":100.0},"chip_sw_sysrst_ctrl_outputs":{"max_time":267.09,"sim_time":4322.107045,"passed":1,"total":1,"percent":100.0},"chip_sw_sysrst_ctrl_ec_rst_l":{"max_time":2500.23,"sim_time":20706.52798,"passed":1,"total":1,"percent":100.0},"chip_sw_aon_timer_irq":{"max_time":235.45,"sim_time":3675.735301,"passed":1,"total":1,"percent":100.0},"chip_sw_aon_timer_sleep_wdog_sleep_pause":{"max_time":249.58000000000004,"sim_time":6500.1502,"passed":1,"total":1,"percent":100.0},"chip_sw_aon_timer_wdog_bite_reset":{"max_time":366.01,"sim_time":7774.131,"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_wdog_reset":{"max_time":342.57,"sim_time":4719.749315,"passed":1,"total":1,"percent":100.0},"chip_sw_aon_timer_wdog_lc_escalate":{"max_time":394.48,"sim_time":4973.96748,"passed":1,"total":1,"percent":100.0},"chip_sw_adc_ctrl_sleep_debug_cable_wakeup":{"max_time":3166.25,"sim_time":35251.727699,"passed":0,"total":1,"percent":0.0},"chip_sw_otbn_randomness":{"max_time":624.35,"sim_time":6250.258248,"passed":1,"total":1,"percent":100.0},"chip_sw_otbn_ecdsa_op_irq":{"max_time":3633.76,"sim_time":17425.76268,"passed":1,"total":1,"percent":100.0},"chip_sw_otbn_ecdsa_op_irq_jitter_en":{"max_time":3756.5299999999997,"sim_time":19012.003673,"passed":1,"total":1,"percent":100.0},"chip_sw_otbn_mem_scramble":{"max_time":306.97,"sim_time":4164.418555,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_core_ibex_rnd":{"max_time":461.25,"sim_time":4800.015551,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_core_ibex_nmi_irq":{"max_time":403.58,"sim_time":4490.538773,"passed":1,"total":1,"percent":100.0},"chip_sw_aes_enc":{"max_time":215.23,"sim_time":3373.51855,"passed":1,"total":1,"percent":100.0},"chip_sw_aes_enc_jitter_en":{"max_time":178.01,"sim_time":3139.564174,"passed":1,"total":1,"percent":100.0},"chip_sw_aes_idle":{"max_time":156.53,"sim_time":2398.3596860000002,"passed":1,"total":1,"percent":100.0},"chip_sw_aes_masking_off":{"max_time":200.66,"sim_time":3023.415583,"passed":1,"total":1,"percent":100.0},"chip_sw_alert_test":{"max_time":202.32,"sim_time":3181.383266,"passed":0,"total":1,"percent":0.0},"chip_sw_alert_handler_escalation":{"max_time":347.18,"sim_time":5480.798935,"passed":1,"total":1,"percent":100.0},"chip_sw_alert_handler_ping_timeout":{"max_time":179.93,"sim_time":3480.9436800000003,"passed":1,"total":1,"percent":100.0},"chip_sw_alert_handler_ping_ok":{"max_time":775.08,"sim_time":8062.51069,"passed":1,"total":1,"percent":100.0},"chip_sw_alert_handler_reverse_ping_in_deep_sleep":{"max_time":9063.18,"sim_time":254288.151616,"passed":1,"total":1,"percent":100.0},"chip_sw_alert_handler_lpg_sleep_mode_alerts":{"max_time":142.8,"sim_time":3268.9471280000002,"passed":0,"total":1,"percent":0.0},"chip_sw_alert_handler_lpg_sleep_mode_pings":{"max_time":14400.13798538968,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_alert_handler_lpg_clkoff":{"max_time":1022.7700000000001,"sim_time":8392.471272,"passed":1,"total":1,"percent":100.0},"chip_sw_alert_handler_lpg_reset_toggle":{"max_time":1076.15,"sim_time":8967.316812000001,"passed":1,"total":1,"percent":100.0},"chip_sw_alert_handler_entropy":{"max_time":162.39,"sim_time":2686.403843,"passed":1,"total":1,"percent":100.0},"chip_sw_aes_entropy":{"max_time":137.38,"sim_time":2455.451719,"passed":1,"total":1,"percent":100.0},"chip_sw_entropy_src_kat_test":{"max_time":198.97,"sim_time":3469.992198,"passed":1,"total":1,"percent":100.0},"chip_sw_edn_auto_mode":{"max_time":489.5299999999999,"sim_time":4316.99314,"passed":1,"total":1,"percent":100.0},"chip_sw_edn_boot_mode":{"max_time":305.32,"sim_time":3428.0306600000004,"passed":1,"total":1,"percent":100.0},"chip_sw_edn_kat":{"max_time":242.10000000000002,"sim_time":2511.670646,"passed":1,"total":1,"percent":100.0},"chip_sw_edn_sw_mode":{"max_time":968.9099999999999,"sim_time":7983.615384,"passed":1,"total":1,"percent":100.0},"chip_sw_csrng_lc_hw_debug_en_test":{"max_time":574.93,"sim_time":7771.866676,"passed":1,"total":1,"percent":100.0},"chip_sw_csrng_edn_concurrency":{"max_time":3034.02,"sim_time":19139.735103,"passed":1,"total":1,"percent":100.0},"chip_sw_csrng_kat_test":{"max_time":174.0,"sim_time":2982.456408,"passed":1,"total":1,"percent":100.0},"chip_sw_csrng_fuse_en_sw_app_read_test":{"max_time":190.91,"sim_time":3107.0141179999996,"passed":0,"total":1,"percent":0.0},"chip_sw_entropy_src_ast_rng_req":{"max_time":126.87,"sim_time":2292.062191,"passed":1,"total":1,"percent":100.0},"chip_sw_entropy_src_csrng":{"max_time":2251.29,"sim_time":24433.639401,"passed":1,"total":1,"percent":100.0},"chip_sw_edn_entropy_reqs":{"max_time":626.85,"sim_time":7186.3638200000005,"passed":1,"total":1,"percent":100.0},"chip_sw_edn_entropy_reqs_jitter":{"max_time":759.37,"sim_time":6857.213994,"passed":1,"total":1,"percent":100.0},"chip_sw_hmac_enc":{"max_time":156.34,"sim_time":3201.688068,"passed":1,"total":1,"percent":100.0},"chip_sw_hmac_enc_jitter_en":{"max_time":184.0,"sim_time":3225.1724419999996,"passed":1,"total":1,"percent":100.0},"chip_sw_hmac_enc_idle":{"max_time":166.45,"sim_time":3235.07524,"passed":1,"total":1,"percent":100.0},"chip_sw_hmac_oneshot":{"max_time":1265.06,"sim_time":9914.278258999999,"passed":1,"total":1,"percent":100.0},"chip_sw_hmac_multistream":{"max_time":741.31,"sim_time":5782.556952999999,"passed":1,"total":1,"percent":100.0},"chip_sw_keymgr_key_derivation":{"max_time":684.57,"sim_time":7279.843687,"passed":1,"total":1,"percent":100.0},"chip_sw_keymgr_key_derivation_prod":{"max_time":1667.81,"sim_time":11977.415289,"passed":1,"total":1,"percent":100.0},"chip_sw_keymgr_key_derivation_jitter_en":{"max_time":1212.3,"sim_time":10946.17892,"passed":1,"total":1,"percent":100.0},"chip_sw_keymgr_sideload_kmac":{"max_time":1136.27,"sim_time":9251.837862,"passed":1,"total":1,"percent":100.0},"chip_sw_keymgr_sideload_aes":{"max_time":1037.63,"sim_time":8347.547448,"passed":1,"total":1,"percent":100.0},"chip_sw_keymgr_sideload_otbn":{"max_time":2932.28,"sim_time":16666.98862,"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_mode_cshake":{"max_time":187.07,"sim_time":3625.444795,"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_mode_kmac":{"max_time":203.77,"sim_time":3604.950746,"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_mode_kmac_jitter_en":{"max_time":201.87,"sim_time":3842.643077,"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_app_rom":{"max_time":127.37,"sim_time":2477.457395,"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_idle":{"max_time":130.85,"sim_time":3043.724408,"passed":1,"total":1,"percent":100.0},"chip_sw_rom_ctrl_integrity_check":{"max_time":357.89,"sim_time":9622.220663,"passed":1,"total":1,"percent":100.0},"chip_sw_sram_ctrl_scrambled_access":{"max_time":346.29,"sim_time":4545.05554,"passed":1,"total":1,"percent":100.0},"chip_sw_sram_ctrl_scrambled_access_jitter_en":{"max_time":332.91,"sim_time":3927.5370070000004,"passed":1,"total":1,"percent":100.0},"chip_sw_sram_ctrl_execution_main":{"max_time":541.02,"sim_time":8203.460928,"passed":1,"total":1,"percent":100.0},"chip_sw_sleep_sram_ret_contents_no_scramble":{"max_time":418.97,"sim_time":7291.622675,"passed":1,"total":1,"percent":100.0},"chip_sw_sleep_sram_ret_contents_scramble":{"max_time":410.54,"sim_time":7202.0696100000005,"passed":1,"total":1,"percent":100.0},"chip_sw_sensor_ctrl_alert":{"max_time":418.79,"sim_time":5462.43927,"passed":1,"total":1,"percent":100.0},"chip_sw_sensor_ctrl_status":{"max_time":171.62,"sim_time":3098.712418,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup":{"max_time":254.46000000000004,"sim_time":5728.094883999999,"passed":1,"total":1,"percent":100.0},"chip_sw_coremark":{"max_time":9775.61,"sim_time":72130.570235,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_b2b_sleep_reset_req":{"max_time":1720.34,"sim_time":21346.081322000002,"passed":1,"total":1,"percent":100.0},"chip_tl_errors":{"max_time":175.25,"sim_time":3551.867104,"passed":1,"total":1,"percent":100.0},"chip_prim_tl_access":{"max_time":101.69,"sim_time":4338.8208349999995,"passed":1,"total":1,"percent":100.0},"chip_plic_all_irqs_0":{"max_time":570.63,"sim_time":5304.56618,"passed":1,"total":1,"percent":100.0},"chip_plic_all_irqs_10":{"max_time":282.59,"sim_time":3784.168325,"passed":1,"total":1,"percent":100.0},"chip_plic_all_irqs_20":{"max_time":364.4,"sim_time":4409.720665,"passed":1,"total":1,"percent":100.0},"chip_sw_plic_sw_irq":{"max_time":146.77,"sim_time":3042.8594,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_off_peri":{"max_time":918.04,"sim_time":10051.304591,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_off_aes_trans":{"max_time":348.77,"sim_time":4789.952258,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_off_hmac_trans":{"max_time":323.55,"sim_time":4856.850779,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_off_kmac_trans":{"max_time":283.55,"sim_time":5114.662728,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_off_otbn_trans":{"max_time":285.55,"sim_time":3784.464808,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_external_clk_src_for_lc":{"max_time":536.57,"sim_time":11953.897377000001,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0":{"max_time":377.12,"sim_time":4350.869468999999,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0":{"max_time":420.7,"sim_time":5068.70155,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_external_clk_src_for_sw_fast_dev":{"max_time":372.62,"sim_time":4048.0351680000003,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_external_clk_src_for_sw_slow_dev":{"max_time":390.04,"sim_time":4981.311576,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_external_clk_src_for_sw_fast_rma":{"max_time":371.9,"sim_time":4622.100325,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_external_clk_src_for_sw_slow_rma":{"max_time":363.34,"sim_time":4641.565323,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_reset_frequency":{"max_time":254.10000000000002,"sim_time":3406.878752,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_jitter_frequency":{"max_time":269.26,"sim_time":3977.358074,"passed":0,"total":1,"percent":0.0},"chip_sw_clkmgr_jitter":{"max_time":153.28,"sim_time":2840.323046,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_sleep_frequency":{"max_time":407.77,"sim_time":5279.649184999999,"passed":1,"total":1,"percent":100.0},"chip_jtag_csr_rw":{"max_time":564.88,"sim_time":8977.01315,"passed":1,"total":1,"percent":100.0},"chip_jtag_mem_access":{"max_time":989.17,"sim_time":13657.738564,"passed":1,"total":1,"percent":100.0},"chip_sw_ast_clk_outputs":{"max_time":593.02,"sim_time":7446.929896,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_program_error":{"max_time":347.65,"sim_time":5121.813343000001,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_normal_sleep_all_wake_ups":{"max_time":243.51999999999998,"sim_time":7279.54384,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_lowpower_cancel":{"max_time":288.24,"sim_time":4341.57468,"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_deep_sleep_all_wake_ups":{"max_time":739.49,"sim_time":23062.167112,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_random_sleep_all_wake_ups":{"max_time":1030.14,"sim_time":26050.50255,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_sleep_wake_5_bug":{"max_time":8.081637684255838,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up":{"max_time":290.36,"sim_time":5180.91086,"passed":1,"total":1,"percent":100.0},"chip_rv_dm_ndm_reset_req":{"max_time":246.43000000000004,"sim_time":3921.15404,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_dm_ndm_reset_req_when_cpu_halted":{"max_time":219.61,"sim_time":3348.4495589999997,"passed":0,"total":1,"percent":0.0},"chip_sw_rv_dm_access_after_wakeup":{"max_time":329.96,"sim_time":5440.762599000001,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_dm_access_after_escalation_reset":{"max_time":403.85,"sim_time":5583.586779,"passed":1,"total":1,"percent":100.0},"chip_tap_straps_dev":{"max_time":141.34,"sim_time":3618.186233,"passed":1,"total":1,"percent":100.0},"chip_tap_straps_testunlock0":{"max_time":87.93,"sim_time":2258.339475,"passed":1,"total":1,"percent":100.0},"chip_tap_straps_rma":{"max_time":236.87,"sim_time":4643.12627,"passed":1,"total":1,"percent":100.0},"chip_tap_straps_prod":{"max_time":88.65,"sim_time":2654.102782,"passed":1,"total":1,"percent":100.0},"chip_rv_dm_lc_disabled":{"max_time":357.97,"sim_time":11160.29409,"passed":0,"total":1,"percent":0.0},"chip_sw_rv_core_ibex_address_translation":{"max_time":191.51,"sim_time":3263.294424,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_core_ibex_lockstep_glitch":{"max_time":112.14,"sim_time":3159.186636,"passed":0,"total":1,"percent":0.0},"chip_sw_rv_core_ibex_icache_invalidate":{"max_time":191.77,"sim_time":3720.826261,"passed":1,"total":1,"percent":100.0},"chip_sw_usb_ast_clk_calib":{"max_time":199.88,"sim_time":3789.548676,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_crash_alert":{"max_time":483.00000000000006,"sim_time":6024.944334,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_ctrl_write_clear":{"max_time":185.75,"sim_time":2866.467325,"passed":1,"total":1,"percent":100.0},"chip_padctrl_attributes":{"max_time":202.62,"sim_time":5188.946096,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_jitter_reduced_freq":{"max_time":113.88,"sim_time":3002.1560750000003,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_ctrl_ops_jitter_en_reduced_freq":{"max_time":427.21,"sim_time":5015.610257,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_ctrl_access_jitter_en_reduced_freq":{"max_time":703.12,"sim_time":7077.426645,"passed":1,"total":1,"percent":100.0},"chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq":{"max_time":4151.64,"sim_time":25078.162780000002,"passed":1,"total":1,"percent":100.0},"chip_sw_aes_enc_jitter_en_reduced_freq":{"max_time":163.63,"sim_time":2805.414032,"passed":1,"total":1,"percent":100.0},"chip_sw_hmac_enc_jitter_en_reduced_freq":{"max_time":180.56,"sim_time":3459.3771469999997,"passed":1,"total":1,"percent":100.0},"chip_sw_keymgr_key_derivation_jitter_en_reduced_freq":{"max_time":1003.13,"sim_time":10837.170168999999,"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_mode_kmac_jitter_en_reduced_freq":{"max_time":159.58,"sim_time":3170.932587,"passed":1,"total":1,"percent":100.0},"chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq":{"max_time":320.52,"sim_time":4553.355401,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_init_reduced_freq":{"max_time":1326.48,"sim_time":26319.73552,"passed":1,"total":1,"percent":100.0},"chip_sw_csrng_edn_concurrency_reduced_freq":{"max_time":3057.7,"sim_time":24002.114838,"passed":1,"total":1,"percent":100.0},"chip_sw_power_idle_load":{"max_time":211.5,"sim_time":3368.186,"passed":0,"total":1,"percent":0.0},"chip_sw_power_sleep_load":{"max_time":144.35,"sim_time":3321.4235,"passed":0,"total":1,"percent":0.0},"chip_sw_ast_clk_rst_inputs":{"max_time":820.38,"sim_time":10092.518993000002,"passed":0,"total":1,"percent":0.0},"chip_sw_power_virus":{"max_time":1118.49,"sim_time":6894.866336,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_scrambling_smoketest":{"max_time":156.88,"sim_time":3106.612364,"passed":1,"total":1,"percent":100.0},"chip_sw_flash_ctrl_mem_protection":{"max_time":585.69,"sim_time":5512.558476,"passed":1,"total":1,"percent":100.0},"ate_bootstrap_flash_erase":{"max_time":613.14,"sim_time":10010.300001,"passed":0,"total":1,"percent":0.0},"ate_bootstrap_one_frame":{"max_time":6308.01,"sim_time":45238.189531,"passed":1,"total":1,"percent":100.0},"ate_bootstrap_disjoint":{"max_time":9864.34,"sim_time":85449.493468,"passed":1,"total":1,"percent":100.0},"rom_e2e_smoke":{"max_time":3183.37,"sim_time":15202.566216,"passed":1,"total":1,"percent":100.0},"rom_e2e_shutdown_exception_c":{"max_time":2965.81,"sim_time":15303.388449999999,"passed":1,"total":1,"percent":100.0},"rom_e2e_shutdown_output":{"max_time":2493.67,"sim_time":32051.5404,"passed":1,"total":1,"percent":100.0},"rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0":{"max_time":58.61165129393339,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_good_dev":{"max_time":11.642370922490954,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_good_prod":{"max_time":9.576385095715523,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_good_prod_end":{"max_time":21.485214430838823,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_good_rma":{"max_time":8.633803742006421,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0":{"max_time":168.32390146888793,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_bad_dev":{"max_time":73.1187353823334,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_bad_prod":{"max_time":57.37555334158242,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_bad_prod_end":{"max_time":38.11949792690575,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_bad_rma":{"max_time":17.77967979386449,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0":{"max_time":181.71230310201645,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_bad_b_good_dev":{"max_time":128.20696363411844,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_bad_b_good_prod":{"max_time":79.15577870048583,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_bad_b_good_prod_end":{"max_time":112.67476538196206,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_bad_b_good_rma":{"max_time":63.16654522717,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0":{"max_time":21.59,"sim_time":10.380001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_bad_dev":{"max_time":22.26,"sim_time":10.240001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_bad_prod":{"max_time":19.5,"sim_time":10.360001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_bad_prod_end":{"max_time":21.35,"sim_time":10.340001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_bad_rma":{"max_time":20.24,"sim_time":10.240001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0":{"max_time":19.91,"sim_time":10.240001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_nothing_dev":{"max_time":19.32,"sim_time":10.120001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_nothing_prod":{"max_time":23.6,"sim_time":10.280001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_nothing_prod_end":{"max_time":20.97,"sim_time":10.180001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_nothing_rma":{"max_time":22.32,"sim_time":10.120001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0":{"max_time":19.51,"sim_time":10.300001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_nothing_b_bad_dev":{"max_time":19.46,"sim_time":10.280001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_nothing_b_bad_prod":{"max_time":19.23,"sim_time":10.120001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_nothing_b_bad_prod_end":{"max_time":18.52,"sim_time":10.280001,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_nothing_b_bad_rma":{"max_time":23.18,"sim_time":10.160001,"passed":0,"total":1,"percent":0.0},"rom_e2e_asm_init_test_unlocked0":{"max_time":62.10158562287689,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_asm_init_dev":{"max_time":29.305462647229433,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_asm_init_prod":{"max_time":10.472804276272655,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_asm_init_prod_end":{"max_time":104.02242808789015,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_asm_init_rma":{"max_time":70.96098758094013,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_jtag_debug_test_unlocked0":{"max_time":651.73,"sim_time":14413.789375,"passed":0,"total":1,"percent":0.0},"rom_e2e_jtag_debug_dev":{"max_time":490.35999999999996,"sim_time":7049.649557,"passed":0,"total":1,"percent":0.0},"rom_e2e_jtag_debug_rma":{"max_time":425.97,"sim_time":5568.939,"passed":0,"total":1,"percent":0.0},"rom_e2e_jtag_inject_test_unlocked0":{"max_time":62.3,"sim_time":2250.970597,"passed":0,"total":1,"percent":0.0},"rom_e2e_jtag_inject_dev":{"max_time":69.34,"sim_time":2471.25484,"passed":0,"total":1,"percent":0.0},"rom_e2e_jtag_inject_rma":{"max_time":70.99,"sim_time":2696.924684,"passed":0,"total":1,"percent":0.0},"rom_e2e_static_critical":{"max_time":3103.86,"sim_time":17016.611732,"passed":1,"total":1,"percent":100.0},"rom_e2e_keymgr_init_rom_ext_meas":{"max_time":5846.28,"sim_time":30937.23648,"passed":1,"total":1,"percent":100.0},"rom_e2e_keymgr_init_rom_ext_no_meas":{"max_time":5923.84,"sim_time":30097.239725000003,"passed":1,"total":1,"percent":100.0},"rom_e2e_keymgr_init_rom_ext_invalid_meas":{"max_time":82.36,"sim_time":2554.9931039999997,"passed":0,"total":1,"percent":0.0},"rom_volatile_raw_unlock":{"max_time":43.50554567761719,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_raw_unlock":{"max_time":46.01899543218315,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_self_hash":{"max_time":63.664259415119886,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_keymgr_functest":{"max_time":338.67,"sim_time":5624.263099999999,"passed":0,"total":1,"percent":0.0},"chip_sw_aes_smoketest":{"max_time":133.0,"sim_time":2186.127835,"passed":1,"total":1,"percent":100.0},"chip_sw_aon_timer_smoketest":{"max_time":155.43,"sim_time":2461.630976,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_smoketest":{"max_time":166.68,"sim_time":3573.260501,"passed":1,"total":1,"percent":100.0},"chip_sw_csrng_smoketest":{"max_time":126.11000000000001,"sim_time":2791.303844,"passed":1,"total":1,"percent":100.0},"chip_sw_entropy_src_smoketest":{"max_time":755.98,"sim_time":6347.486672,"passed":1,"total":1,"percent":100.0},"chip_sw_gpio_smoketest":{"max_time":167.14,"sim_time":2836.225486,"passed":1,"total":1,"percent":100.0},"chip_sw_hmac_smoketest":{"max_time":187.35,"sim_time":2531.60502,"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_smoketest":{"max_time":233.01,"sim_time":3465.67608,"passed":1,"total":1,"percent":100.0},"chip_sw_otbn_smoketest":{"max_time":1076.56,"sim_time":8366.889433,"passed":1,"total":1,"percent":100.0},"chip_sw_otp_ctrl_smoketest":{"max_time":129.22,"sim_time":3026.325085,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_smoketest":{"max_time":294.0,"sim_time":6724.374984,"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_usbdev_smoketest":{"max_time":366.69,"sim_time":6123.10822,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_plic_smoketest":{"max_time":141.98,"sim_time":2732.972,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_timer_smoketest":{"max_time":179.54,"sim_time":3166.4593,"passed":1,"total":1,"percent":100.0},"chip_sw_rstmgr_smoketest":{"max_time":143.61,"sim_time":2695.1453500000002,"passed":1,"total":1,"percent":100.0},"chip_sw_sram_ctrl_smoketest":{"max_time":122.99000000000001,"sim_time":2529.957324,"passed":1,"total":1,"percent":100.0},"chip_sw_uart_smoketest":{"max_time":180.6,"sim_time":2993.5013160000003,"passed":1,"total":1,"percent":100.0},"xbar_smoke":{"max_time":6.32,"sim_time":217.92164799999998,"passed":1,"total":1,"percent":100.0},"xbar_smoke_zero_delays":{"max_time":4.79,"sim_time":40.622149,"passed":1,"total":1,"percent":100.0},"xbar_smoke_large_delays":{"max_time":53.53,"sim_time":7461.135248,"passed":1,"total":1,"percent":100.0},"xbar_smoke_slow_rsp":{"max_time":58.59,"sim_time":6262.180416,"passed":1,"total":1,"percent":100.0},"xbar_random":{"max_time":29.86,"sim_time":579.462255,"passed":1,"total":1,"percent":100.0},"xbar_random_zero_delays":{"max_time":10.29,"sim_time":123.844411,"passed":1,"total":1,"percent":100.0},"xbar_random_large_delays":{"max_time":158.42,"sim_time":26374.233861,"passed":1,"total":1,"percent":100.0},"xbar_random_slow_rsp":{"max_time":168.11,"sim_time":17978.292928,"passed":1,"total":1,"percent":100.0},"xbar_access_same_device":{"max_time":29.23,"sim_time":1101.286402,"passed":1,"total":1,"percent":100.0},"xbar_access_same_device_slow_rsp":{"max_time":696.82,"sim_time":74702.312179,"passed":1,"total":1,"percent":100.0},"xbar_same_source":{"max_time":54.85,"sim_time":2718.78817,"passed":1,"total":1,"percent":100.0},"xbar_error_random":{"max_time":17.74,"sim_time":323.641524,"passed":1,"total":1,"percent":100.0},"xbar_unmapped_addr":{"max_time":7.43,"sim_time":38.753592,"passed":1,"total":1,"percent":100.0},"xbar_error_and_unmapped_addr":{"max_time":19.99,"sim_time":650.8480699999999,"passed":1,"total":1,"percent":100.0},"xbar_stress_all":{"max_time":23.98,"sim_time":1101.880568,"passed":1,"total":1,"percent":100.0},"xbar_stress_all_with_rand_reset":{"max_time":147.57,"sim_time":2158.750617,"passed":1,"total":1,"percent":100.0},"xbar_stress_all_with_error":{"max_time":87.28,"sim_time":3755.536293,"passed":1,"total":1,"percent":100.0},"xbar_stress_all_with_reset_error":{"max_time":14.05,"sim_time":87.20982799999999,"passed":1,"total":1,"percent":100.0},"chip_csr_hw_reset":{"max_time":212.4,"sim_time":5052.5506,"passed":1,"total":1,"percent":100.0},"chip_csr_rw":{"max_time":287.16,"sim_time":4805.64058,"passed":1,"total":1,"percent":100.0},"chip_csr_mem_rw_with_rand_reset":{"max_time":73.41,"sim_time":2432.033424,"passed":0,"total":1,"percent":0.0}},"passed":250,"total":329,"percent":75.98784194528875}},"passed":250,"total":329,"percent":75.98784194528875}},"coverage":{"code":{"block":null,"line_statement":93.98,"branch":92.3,"condition_expression":88.84,"toggle":91.25,"fsm":57.14},"assertion":97.37,"functional":36.12},"cov_report_page":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/cov_report/dashboard.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_FATAL @ * us: (sec_cm_pkg.sv:48) [sec_cm_pkg::find_sec_cm_if_proxy] no proxy with path *rstmgr_aon.u_d0_spi_host*.leaf_rst_path":[{"name":"chip_sw_rstmgr_rst_cnsty_escalation","qual_name":"0.chip_sw_rstmgr_rst_cnsty_escalation.71467378424264262024994280729741583155286562482220994320779201450618315764960","seed":71467378424264262024994280729741583155286562482220994320779201450618315764960,"line":301,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_rstmgr_rst_cnsty_escalation/latest/run.log","log_context":["UVM_INFO @  10.160001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (chip_sw_sleep_pin_mio_dio_val_vseq.sv:92) [chip_sw_sleep_pin_mio_dio_val_vseq] Check failed cfg.chip_vif.mios_if.pins[i] === exp (* [*] vs *xz [z]) for MIO[*]":[{"name":"chip_sw_sleep_pin_mio_dio_val","qual_name":"0.chip_sw_sleep_pin_mio_dio_val.23552060421923413357844121370507227512935227041186840081512134763794199967878","seed":23552060421923413357844121370507227512935227041186840081512134763794199967878,"line":451,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_sleep_pin_mio_dio_val/latest/run.log","log_context":["UVM_INFO @ 3367.020500 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [spi_passthrough_test_sim_dv(sw/device/tests/sim_dv/spi_passthrough_test.c:382)] CHECK-fail: irq == kDtSpiDeviceIrqUploadCmdfifoNotEmpty":[{"name":"chip_sw_spi_device_pass_through_collision","qual_name":"0.chip_sw_spi_device_pass_through_collision.105972742801860855761400697007205581738015605036472883524457459528967562590792","seed":105972742801860855761400697007205581738015605036472883524457459528967562590792,"line":327,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_spi_device_pass_through_collision/latest/run.log","log_context":["UVM_INFO @ 3302.687870 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [flash_ctrl_lc_rw_en_test_sim_dv(sw/device/lib/testing/test_framework/ottf_alerts.c:172)] ERROR: Alert * is asserted but not expected":[{"name":"chip_sw_flash_ctrl_lc_rw_en","qual_name":"0.chip_sw_flash_ctrl_lc_rw_en.74201217228497176079083843115742937919921119634642720656249755712010389515046","seed":74201217228497176079083843115742937919921119634642720656249755712010389515046,"line":309,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_flash_ctrl_lc_rw_en/latest/run.log","log_context":["UVM_INFO @ 2891.544660 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [otp_ctrl_lc_signals_test_sim_dv(sw/device/lib/testing/otp_ctrl_testutils.c:39)] Expected a DAI error for access to *":[{"name":"chip_sw_otp_ctrl_lc_signals_rma","qual_name":"0.chip_sw_otp_ctrl_lc_signals_rma.17009377972265234173608590232170341315118002186051537618855702225557899696258","seed":17009377972265234173608590232170341315118002186051537618855702225557899696258,"line":342,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_otp_ctrl_lc_signals_rma/latest/run.log","log_context":["UVM_INFO @ 7630.995642 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Offending '(!$fell(lc_ctrl_pkg::lc_tx_test_true_strict(lc_init_done_o)))'":[{"name":"chip_sw_otp_ctrl_escalation","qual_name":"0.chip_sw_otp_ctrl_escalation.51954521659498627599028394637655174347635763687588010656713199901499667565870","seed":51954521659498627599028394637655174347635763687588010656713199901499667565870,"line":316,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_otp_ctrl_escalation/latest/run.log","log_context":["UVM_ERROR @ 2949.465456 us: (lc_ctrl.sv:884) [ASSERT FAILED] LcInitDoneSticky_A\n","UVM_INFO @ 2949.465456 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"chip_sw_csrng_fuse_en_sw_app_read_test","qual_name":"0.chip_sw_csrng_fuse_en_sw_app_read_test.89071379270400499692085394753965014424651184702125933318156158112484381153704","seed":89071379270400499692085394753965014424651184702125933318156158112484381153704,"line":312,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_csrng_fuse_en_sw_app_read_test/latest/run.log","log_context":["UVM_ERROR @ 3107.014118 us: (lc_ctrl.sv:884) [ASSERT FAILED] LcInitDoneSticky_A\n","UVM_INFO @ 3107.014118 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_FATAL @ * us: (mem_bkdr_util.sv:658) [mem_bkdr_util[Otp]] file otp_img_test_unlocked0_manuf_empty.*.vmem could not be opened for r mode":[{"name":"chip_sw_otp_ctrl_rot_auth_config","qual_name":"0.chip_sw_otp_ctrl_rot_auth_config.67483053798414214023577209738625432879843508356426579046298678796476816416613","seed":67483053798414214023577209738625432879843508356426579046298678796476816416613,"line":282,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_otp_ctrl_rot_auth_config/latest/run.log","log_context":["UVM_INFO @   0.000000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [lc_walkthrough_test_sim_dv(sw/device/lib/testing/test_framework/ottf_alerts.c:172)] ERROR: Alert * is asserted but not expected":[{"name":"chip_sw_lc_walkthrough_dev","qual_name":"0.chip_sw_lc_walkthrough_dev.86359475277948505758687987412924140984459091164377631768227114733488874442322","seed":86359475277948505758687987412924140984459091164377631768227114733488874442322,"line":369,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_lc_walkthrough_dev/latest/run.log","log_context":["UVM_INFO @ 8713.461320 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_sw_lc_walkthrough_prod","qual_name":"0.chip_sw_lc_walkthrough_prod.19518974063512154270239619214966932172373559772532457396843276906531849951032","seed":19518974063512154270239619214966932172373559772532457396843276906531849951032,"line":369,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_lc_walkthrough_prod/latest/run.log","log_context":["UVM_INFO @ 12304.410844 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_sw_lc_walkthrough_rma","qual_name":"0.chip_sw_lc_walkthrough_rma.68481399705312386899516342356139395709302332530174819730401602024494878529406","seed":68481399705312386899516342356139395709302332530174819730401602024494878529406,"line":341,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_lc_walkthrough_rma/latest/run.log","log_context":["UVM_INFO @ 6749.517257 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Offending '((~rst_ni) === (~seed_en_q))'":[{"name":"chip_sw_pwrmgr_full_aon_reset","qual_name":"0.chip_sw_pwrmgr_full_aon_reset.101360475170008498666483156283936904112487199228352599080235957622201718439797","seed":101360475170008498666483156283936904112487199228352599080235957622201718439797,"line":318,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_pwrmgr_full_aon_reset/latest/run.log","log_context":["UVM_ERROR @ 6139.716320 us: (otbn_rnd.sv:233) [ASSERT FAILED] UrndNoReseedOnReset_A\n","UVM_INFO @ 6139.716320 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"Offending '(rstreqs[*] && (reset_cause == HwReq))'":[{"name":"chip_sw_pwrmgr_random_sleep_all_reset_reqs","qual_name":"0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.80193120111042314154696274900673414559748198865751762488860958287649356029417","seed":80193120111042314154696274900673414559748198865751762488860958287649356029417,"line":344,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs/latest/run.log","log_context":["UVM_ERROR @ 13957.404500 us: (pwrmgr_rstreqs_sva_if.sv:49) [ASSERT FAILED] HwResetOn_A\n","UVM_INFO @ 13957.404500 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"chip_sw_pwrmgr_deep_sleep_all_reset_reqs","qual_name":"0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.8330293258003588727649475868869969176605189046115521912228381520065016021779","seed":8330293258003588727649475868869969176605189046115521912228381520065016021779,"line":314,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs/latest/run.log","log_context":["UVM_ERROR @ 5609.597500 us: (pwrmgr_rstreqs_sva_if.sv:49) [ASSERT FAILED] HwResetOn_A\n","UVM_INFO @ 5609.597500 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"chip_sw_pwrmgr_deep_sleep_por_reset","qual_name":"0.chip_sw_pwrmgr_deep_sleep_por_reset.36438981960058752063670349130331327643420499623109320192302551584605343572273","seed":36438981960058752063670349130331327643420499623109320192302551584605343572273,"line":325,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_pwrmgr_deep_sleep_por_reset/latest/run.log","log_context":["UVM_ERROR @ 7185.884000 us: (pwrmgr_rstreqs_sva_if.sv:49) [ASSERT FAILED] HwResetOn_A\n","UVM_INFO @ 7185.884000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"chip_sw_aon_timer_wdog_bite_reset","qual_name":"0.chip_sw_aon_timer_wdog_bite_reset.83505745803240396884040511663805872217202415459711165059119119441597183343914","seed":83505745803240396884040511663805872217202415459711165059119119441597183343914,"line":319,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_aon_timer_wdog_bite_reset/latest/run.log","log_context":["UVM_ERROR @ 7774.131000 us: (pwrmgr_rstreqs_sva_if.sv:49) [ASSERT FAILED] HwResetOn_A\n","UVM_INFO @ 7774.131000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"Offending '(!$fell((pwrmgr_data_o.done == MuBi4True)))'":[{"name":"chip_sw_pwrmgr_sleep_power_glitch_reset","qual_name":"0.chip_sw_pwrmgr_sleep_power_glitch_reset.58398451562875333015415661038921871979465013250353074239360683370212670956780","seed":58398451562875333015415661038921871979465013250353074239360683370212670956780,"line":313,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_pwrmgr_sleep_power_glitch_reset/latest/run.log","log_context":["UVM_ERROR @ 3224.436000 us: (rom_ctrl.sv:577) [ASSERT FAILED] PwrmgrDataChk_A\n","UVM_INFO @ 3224.436000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"chip_sw_pwrmgr_random_sleep_power_glitch_reset","qual_name":"0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.40444207331931757772924457416474615870810460293322043362931446077012148107374","seed":40444207331931757772924457416474615870810460293322043362931446077012148107374,"line":370,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset/latest/run.log","log_context":["UVM_ERROR @ 16027.295970 us: (rom_ctrl.sv:577) [ASSERT FAILED] PwrmgrDataChk_A\n","UVM_INFO @ 16027.295970 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_ERROR @ * us: (chip_sw_base_vseq.sv:322) virtual_sequencer [chip_sw_adc_ctrl_sleep_debug_cable_wakeup_vseq] SW TEST TIMED OUT. STATE: SwTestStatusInTest, TIMEOUT = * ns":[{"name":"chip_sw_adc_ctrl_sleep_debug_cable_wakeup","qual_name":"0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.56914243522556008854774318998871729725829278574216965198271291488615586751532","seed":56914243522556008854774318998871729725829278574216965198271291488615586751532,"line":332,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup/latest/run.log","log_context":["\n","UVM_INFO @ 35251.727699 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [alert_test_sim_dv(hw/top_earlgrey/sw/autogen/tests/alert_test.c:367)] CHECK-fail: Expect alert *!":[{"name":"chip_sw_alert_test","qual_name":"0.chip_sw_alert_test.41272737297108097505345153050694581816620870580100568334439509761237610765235","seed":41272737297108097505345153050694581816620870580100568334439509761237610765235,"line":307,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_alert_test/latest/run.log","log_context":["UVM_INFO @ 3181.383266 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [alert_handler_lpg_sleep_mode_alerts_test_sim_dv(sw/device/lib/testing/ret_sram_testutils.c:67)] CHECK-fail: testing_utilities != ((void*)0)":[{"name":"chip_sw_alert_handler_lpg_sleep_mode_alerts","qual_name":"0.chip_sw_alert_handler_lpg_sleep_mode_alerts.34687417269968517631791933223025310829822947990738774971316347756783475389761","seed":34687417269968517631791933223025310829822947990738774971316347756783475389761,"line":308,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_alert_handler_lpg_sleep_mode_alerts/latest/run.log","log_context":["UVM_INFO @ 3268.947128 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Job timed out after * minutes":[{"name":"chip_sw_alert_handler_lpg_sleep_mode_pings","qual_name":"0.chip_sw_alert_handler_lpg_sleep_mode_pings.44601737534478957784060413027500120655700686498785445923007509801399160589087","seed":44601737534478957784060413027500120655700686498785445923007509801399160589087,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_alert_handler_lpg_sleep_mode_pings/latest/run.log","log_context":[]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [clkmgr_jitter_frequency_test_sim_dv(sw/device/lib/testing/test_framework/ottf_alerts.c:172)] ERROR: Alert * is asserted but not expected":[{"name":"chip_sw_clkmgr_jitter_frequency","qual_name":"0.chip_sw_clkmgr_jitter_frequency.89411180708586805287330376760648321498708463772857170580375959676546246966250","seed":89411180708586805287330376760648321498708463772857170580375959676546246966250,"line":343,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_clkmgr_jitter_frequency/latest/run.log","log_context":["UVM_INFO @ 3977.358074 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [pwrmgr_lowpower_cancel_test_sim_dv(sw/device/tests/pwrmgr_lowpower_cancel_test.c:78)] CHECK-fail: Timed out after * usec (* CPU cycles) waiting for !get_wakeup_status()":[{"name":"chip_sw_pwrmgr_lowpower_cancel","qual_name":"0.chip_sw_pwrmgr_lowpower_cancel.113679530035451110148067685609714728925191737170572091881470250431202368591109","seed":113679530035451110148067685609714728925191737170572091881470250431202368591109,"line":317,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_pwrmgr_lowpower_cancel/latest/run.log","log_context":["UVM_INFO @ 4341.574680 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Some pass patterns missing: ['^TEST PASSED (UVM_)?CHECKS$']":[{"name":"chip_sw_pwrmgr_sleep_wake_5_bug","qual_name":"0.chip_sw_pwrmgr_sleep_wake_5_bug.109543435047136904337671861722207943279383260948403681781461631150252289503420","seed":109543435047136904337671861722207943279383260948403681781461631150252289503420,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_pwrmgr_sleep_wake_5_bug/latest/run.log","log_context":["---- STDOUT ----\n","\n","---- STDERR ----\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/tests:pwrmgr_sleep_wake_5_bug_test_sim_dv': no such target '//sw/device/tests:pwrmgr_sleep_wake_5_bug_test_sim_dv': target 'pwrmgr_sleep_wake_5_bug_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD\n","ERROR: no such target '//sw/device/tests:pwrmgr_sleep_wake_5_bug_test_sim_dv': target 'pwrmgr_sleep_wake_5_bug_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.89530714254948778548389352104055792406915942197359582809026127268667825684960","seed":89530714254948778548389352104055792406915942197359582809026127268667825684960,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0/latest/run.log","log_context":["Another command (pid=359301) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=385907) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=403184) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_good_dev","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_good_dev.53763407738824712055719522135655830608455730744444207910277096681528669031322","seed":53763407738824712055719522135655830608455730744444207910277096681528669031322,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_good_dev/latest/run.log","log_context":["Another command (pid=551981) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=450881) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=553056) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_good_prod","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_good_prod.104769199259901174765844017524857424060266460558224866677183071626069597065569","seed":104769199259901174765844017524857424060266460558224866677183071626069597065569,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_good_prod/latest/run.log","log_context":["---- STDERR ----\n","Another command (pid=450881) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=553056) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_good_prod_end","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.45607822923345849058850784800654000762002606915241417846998664002432563632782","seed":45607822923345849058850784800654000762002606915241417846998664002432563632782,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end/latest/run.log","log_context":["Another command (pid=435847) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=555759) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=545159) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_good_rma","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_good_rma.53145850545744253262357544315317498542841437043161839379966111418351682601622","seed":53145850545744253262357544315317498542841437043161839379966111418351682601622,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_good_rma/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=553056) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.69145240993660149662908273203494933999795018940931806717072126699470618940877","seed":69145240993660149662908273203494933999795018940931806717072126699470618940877,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0/latest/run.log","log_context":["Another command (pid=365861) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=599502) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=605501) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_bad_dev","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.27890511903552374303263534244310045392897193945309163673994126393883935480883","seed":27890511903552374303263534244310045392897193945309163673994126393883935480883,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev/latest/run.log","log_context":["Another command (pid=450881) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=553056) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=545729) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_bad_prod","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.110482100371165369369360563494235640530375406050550291095207121025365827320394","seed":110482100371165369369360563494235640530375406050550291095207121025365827320394,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod/latest/run.log","log_context":["Another command (pid=540618) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=450881) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=553056) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_bad_prod_end","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.26710933014261528032530569800955754756278516653691795774235915852556234095759","seed":26710933014261528032530569800955754756278516653691795774235915852556234095759,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end/latest/run.log","log_context":["Another command (pid=435336) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=466333) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=400319) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_bad_rma","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.96785639668406786753934337190631242657362437300194533457155780579784460012763","seed":96785639668406786753934337190631242657362437300194533457155780579784460012763,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma/latest/run.log","log_context":["Another command (pid=466333) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=400319) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=499828) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0","qual_name":"0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.6821084629978677808610427375990565228246994212406445562752474043392865281329","seed":6821084629978677808610427375990565228246994212406445562752474043392865281329,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0/latest/run.log","log_context":["Another command (pid=628609) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=630942) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=466084) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_bad_b_good_dev","qual_name":"0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.79128659071655926199655870746057550534069049768832642557743253493803480175687","seed":79128659071655926199655870746057550534069049768832642557743253493803480175687,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev/latest/run.log","log_context":["Another command (pid=641092) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=625985) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=642858) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_bad_b_good_prod","qual_name":"0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.61669141454920206887565923116252273363138118076267245087017011285153459416929","seed":61669141454920206887565923116252273363138118076267245087017011285153459416929,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod/latest/run.log","log_context":["Another command (pid=551981) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=450881) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=553056) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_bad_b_good_prod_end","qual_name":"0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.79983461824872577515713163847722733250626918418944353609619947686864238569508","seed":79983461824872577515713163847722733250626918418944353609619947686864238569508,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end/latest/run.log","log_context":["Another command (pid=576712) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=564248) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=639528) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_bad_b_good_rma","qual_name":"0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.87139426677646690440420939831045438713849185085606817247565380929331919907801","seed":87139426677646690440420939831045438713849185085606817247565380929331919907801,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma/latest/run.log","log_context":["---- STDERR ----\n","Another command (pid=445488) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=400319) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_b_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_asm_init_test_unlocked0","qual_name":"0.rom_e2e_asm_init_test_unlocked0.5913834176954923683733344399680089320298925640420546628774061391730018192241","seed":5913834176954923683733344399680089320298925640420546628774061391730018192241,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_asm_init_test_unlocked0/latest/run.log","log_context":["---- STDERR ----\n","Another command (pid=359301) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=403184) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_asm_init_dev","qual_name":"0.rom_e2e_asm_init_dev.67369351344402846355038475967942571107896186840117761928350011340934987569171","seed":67369351344402846355038475967942571107896186840117761928350011340934987569171,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_asm_init_dev/latest/run.log","log_context":["Another command (pid=433199) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=360298) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=393061) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_asm_init_prod","qual_name":"0.rom_e2e_asm_init_prod.42340485221596410255380521711231623491639676456762667408507266983658615580396","seed":42340485221596410255380521711231623491639676456762667408507266983658615580396,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_asm_init_prod/latest/run.log","log_context":["Another command (pid=360298) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=393061) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=446900) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_asm_init_prod_end","qual_name":"0.rom_e2e_asm_init_prod_end.68957887475311594081731736118546390138156514521195539148957660409056862689171","seed":68957887475311594081731736118546390138156514521195539148957660409056862689171,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_asm_init_prod_end/latest/run.log","log_context":["Another command (pid=565971) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=596854) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=583881) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_asm_init_rma","qual_name":"0.rom_e2e_asm_init_rma.86195151165278330232472894802772022252796797422699309076768984064488779732347","seed":86195151165278330232472894802772022252796797422699309076768984064488779732347,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_asm_init_rma/latest/run.log","log_context":["Another command (pid=415975) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=435336) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=466333) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_volatile_raw_unlock","qual_name":"0.rom_volatile_raw_unlock.51132118369189870209405556804879188778402089130551740695500800534257092962763","seed":51132118369189870209405556804879188778402089130551740695500800534257092962763,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_volatile_raw_unlock/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=359301) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_test_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_test_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_test_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_test_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_test_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_raw_unlock","qual_name":"0.rom_raw_unlock.83283677230257972256157455668560021646045252180458681054805082945764098155395","seed":83283677230257972256157455668560021646045252180458681054805082945764098155395,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_raw_unlock/latest/run.log","log_context":["---- STDERR ----\n","Another command (pid=359301) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=403184) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_test_key_0_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_test_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_test_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_test_key_0_sim_dv': target 'empty_test_slot_a_fake_ecdsa_test_key_0_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_self_hash","qual_name":"0.rom_e2e_self_hash.103398082155465747475317136351349044616940429532409354573593213065531376414224","seed":103398082155465747475317136351349044616940429532409354573593213065531376414224,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_self_hash/latest/run.log","log_context":["Another command (pid=433199) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=360298) is running. Waiting for it to complete on the server (server_pid=265415)...\n","Another command (pid=393061) is running. Waiting for it to complete on the server (server_pid=265415)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e/release:rom_e2e_self_hash_test_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e/release:rom_e2e_self_hash_test_sim_dv': target 'rom_e2e_self_hash_test_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e/release' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/release/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e/release:rom_e2e_self_hash_test_sim_dv': target 'rom_e2e_self_hash_test_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e/release' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/release/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]}],"Error-[NOA] Null object access":[{"name":"chip_sw_rv_dm_ndm_reset_req_when_cpu_halted","qual_name":"0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.101487963127196294521733254436621550389031814575694897927458540593779717463183","seed":101487963127196294521733254436621550389031814575694897927458540593779717463183,"line":327,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted/latest/run.log","log_context":["src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 1108\n","  The object at dereference depth 1 is being used before it was \n","  constructed/allocated.\n","  Please make sure that the object is allocated before using it. \n"]},{"name":"rom_e2e_jtag_debug_dev","qual_name":"0.rom_e2e_jtag_debug_dev.60876159044259986227379448111338006107667609473697759766104787334920201847245","seed":60876159044259986227379448111338006107667609473697759766104787334920201847245,"line":352,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_jtag_debug_dev/latest/run.log","log_context":["src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 903\n","  The object at dereference depth 1 is being used before it was \n","  constructed/allocated.\n","  Please make sure that the object is allocated before using it. \n"]},{"name":"rom_e2e_jtag_debug_rma","qual_name":"0.rom_e2e_jtag_debug_rma.41491303823032521930809803755495331209936779488038657891683468690272351614177","seed":41491303823032521930809803755495331209936779488038657891683468690272351614177,"line":352,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_jtag_debug_rma/latest/run.log","log_context":["src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 903\n","  The object at dereference depth 1 is being used before it was \n","  constructed/allocated.\n","  Please make sure that the object is allocated before using it. \n"]},{"name":"rom_e2e_jtag_inject_test_unlocked0","qual_name":"0.rom_e2e_jtag_inject_test_unlocked0.42327737321756912578741369644875393318723090781428255435651194863731103961559","seed":42327737321756912578741369644875393318723090781428255435651194863731103961559,"line":303,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_jtag_inject_test_unlocked0/latest/run.log","log_context":["src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 1108\n","  The object at dereference depth 1 is being used before it was \n","  constructed/allocated.\n","  Please make sure that the object is allocated before using it. \n"]},{"name":"rom_e2e_jtag_inject_dev","qual_name":"0.rom_e2e_jtag_inject_dev.104179325464986466373601979417663865364720437520008248831354212406374170667994","seed":104179325464986466373601979417663865364720437520008248831354212406374170667994,"line":303,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_jtag_inject_dev/latest/run.log","log_context":["src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 1108\n","  The object at dereference depth 1 is being used before it was \n","  constructed/allocated.\n","  Please make sure that the object is allocated before using it. \n"]},{"name":"rom_e2e_jtag_inject_rma","qual_name":"0.rom_e2e_jtag_inject_rma.50211049029746438884983990777313550742224575891896397167431174867199446091874","seed":50211049029746438884983990777313550742224575891896397167431174867199446091874,"line":303,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_jtag_inject_rma/latest/run.log","log_context":["src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 1108\n","  The object at dereference depth 1 is being used before it was \n","  constructed/allocated.\n","  Please make sure that the object is allocated before using it. \n"]}],"UVM_ERROR @ * us: (cip_base_vseq.sv:660) [chip_rv_dm_lc_disabled_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch":[{"name":"chip_rv_dm_lc_disabled","qual_name":"0.chip_rv_dm_lc_disabled.101718776180188700203106488475806120475350262303447100067460082376903008460433","seed":101718776180188700203106488475806120475350262303447100067460082376903008460433,"line":267,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_rv_dm_lc_disabled/latest/run.log","log_context":["UVM_INFO @ 11160.294090 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL @ * us: (chip_sw_rv_core_ibex_lockstep_glitch_vseq.sv:738) [chip_sw_rv_core_ibex_lockstep_glitch_vseq] Check failed alert_major_internal == exp_alert_major_internal (* [*] vs * [*]) Major alert did not match expectation.":[{"name":"chip_sw_rv_core_ibex_lockstep_glitch","qual_name":"0.chip_sw_rv_core_ibex_lockstep_glitch.105197622844145125512967761721010756703763062473971185659557974236509719209188","seed":105197622844145125512967761721010756703763062473971185659557974236509719209188,"line":331,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_rv_core_ibex_lockstep_glitch/latest/run.log","log_context":["UVM_INFO @ 3159.186636 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (chip_sw_power_idle_load_vseq.sv:91) virtual_sequencer [chip_sw_power_idle_load_vseq] PWMCH* : pkt* Clock period is wrong. rcv : * exp : *":[{"name":"chip_sw_power_idle_load","qual_name":"0.chip_sw_power_idle_load.37643214151869654068314839980664927904518456193308023552579125268809184601468","seed":37643214151869654068314839980664927904518456193308023552579125268809184601468,"line":314,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_power_idle_load/latest/run.log","log_context":["UVM_INFO @ 3368.186000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (chip_sw_power_sleep_load_vseq.sv:114) virtual_sequencer [chip_sw_power_sleep_load_vseq] PWMCH* : pkt* Clock period is wrong. rcv : * exp : *":[{"name":"chip_sw_power_sleep_load","qual_name":"0.chip_sw_power_sleep_load.44542757782232027219327918087997887121342870322456822846472347354854736956691","seed":44542757782232027219327918087997887121342870322456822846472347354854736956691,"line":318,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_power_sleep_load/latest/run.log","log_context":["UVM_INFO @ 3321.423500 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [ast_clk_rst_inputs_sim_dv(sw/device/lib/testing/autogen/isr_testutils.c:41)] CHECK-fail: Only adc_ctrl IRQ * expected to fire. Actual IRQ state = *":[{"name":"chip_sw_ast_clk_rst_inputs","qual_name":"0.chip_sw_ast_clk_rst_inputs.99937685058817355224814151173320322848431723470828303756266584730464035746253","seed":99937685058817355224814151173320322848431723470828303756266584730464035746253,"line":327,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_sw_ast_clk_rst_inputs/latest/run.log","log_context":["UVM_INFO @ 10092.518993 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL @ * us: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout chip_reg_block.spi_device.cmd_info_*.opcode (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=1)":[{"name":"ate_bootstrap_flash_erase","qual_name":"0.ate_bootstrap_flash_erase.70505285200779891488211126587060989932581670138513126979616022968114321509300","seed":70505285200779891488211126587060989932581670138513126979616022968114321509300,"line":272,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.ate_bootstrap_flash_erase/latest/run.log","log_context":["UVM_INFO @ 10010.300001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL @ * us: (mem_bkdr_util.sv:658) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_test_key_*.signed.*.scr.vmem could not be opened for r mode":[{"name":"rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.43329697776571782824627640594908639551670004586733112064553541880538243121332","seed":43329697776571782824627640594908639551670004586733112064553541880538243121332,"line":364,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0/latest/run.log","log_context":["UVM_INFO @  10.380001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.104888709016559303406643782045784231585573287806033450775090997190685003906411","seed":104888709016559303406643782045784231585573287806033450775090997190685003906411,"line":325,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0/latest/run.log","log_context":["UVM_INFO @  10.240001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL @ * us: (mem_bkdr_util.sv:658) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_dev_key_*.signed.*.scr.vmem could not be opened for r mode":[{"name":"rom_e2e_sigverify_always_a_bad_b_bad_dev","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_bad_dev.71251837052088542474373552873107804419213822882204245637348321336353733272698","seed":71251837052088542474373552873107804419213822882204245637348321336353733272698,"line":364,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_bad_dev/latest/run.log","log_context":["UVM_INFO @  10.240001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_nothing_dev","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.23004718446924833268118396343496438588022941305903891852643756174834068593240","seed":23004718446924833268118396343496438588022941305903891852643756174834068593240,"line":325,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev/latest/run.log","log_context":["UVM_INFO @  10.120001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL @ * us: (mem_bkdr_util.sv:658) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_a_corrupted_sim_dv.fake_ecdsa_prod_key_*.signed.*.scr.vmem could not be opened for r mode":[{"name":"rom_e2e_sigverify_always_a_bad_b_bad_prod","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_bad_prod.111932863560813728835543189082417235820368403459400299669261526092542291641186","seed":111932863560813728835543189082417235820368403459400299669261526092542291641186,"line":365,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_bad_prod/latest/run.log","log_context":["UVM_INFO @  10.360001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_bad_prod_end","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.92429366714970681513181522699705539566799372335857921244727908058295757731516","seed":92429366714970681513181522699705539566799372335857921244727908058295757731516,"line":365,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end/latest/run.log","log_context":["UVM_INFO @  10.340001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_bad_rma","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_bad_rma.101694081091243180473798849751417580703629592649440399583693409427719590026087","seed":101694081091243180473798849751417580703629592649440399583693409427719590026087,"line":364,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_bad_rma/latest/run.log","log_context":["UVM_INFO @  10.240001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_nothing_prod","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.89795201277619296276810671313308056625059807113960060276383339664760343637274","seed":89795201277619296276810671313308056625059807113960060276383339664760343637274,"line":327,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod/latest/run.log","log_context":["UVM_INFO @  10.280001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_nothing_prod_end","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.91664664261327526717208050858526632069344826829099507623381875423467956663729","seed":91664664261327526717208050858526632069344826829099507623381875423467956663729,"line":326,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end/latest/run.log","log_context":["UVM_INFO @  10.180001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_nothing_rma","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.92080562742816865389190748433643269894610451569711050558659234918570248641105","seed":92080562742816865389190748433643269894610451569711050558659234918570248641105,"line":328,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma/latest/run.log","log_context":["UVM_INFO @  10.120001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL @ * us: (mem_bkdr_util.sv:658) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_test_key_*.signed.*.scr.vmem could not be opened for r mode":[{"name":"rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0","qual_name":"0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.97540999935031168030289367327358658839620184157024259735570923391145701679528","seed":97540999935031168030289367327358658839620184157024259735570923391145701679528,"line":325,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0/latest/run.log","log_context":["UVM_INFO @  10.300001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL @ * us: (mem_bkdr_util.sv:658) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_dev_key_*.signed.*.scr.vmem could not be opened for r mode":[{"name":"rom_e2e_sigverify_always_a_nothing_b_bad_dev","qual_name":"0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.51316332361546988478962839682409515779770180002058050429445622930216800122465","seed":51316332361546988478962839682409515779770180002058050429445622930216800122465,"line":325,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev/latest/run.log","log_context":["UVM_INFO @  10.280001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL @ * us: (mem_bkdr_util.sv:658) [mem_bkdr_util[FlashBank0Data]] file empty_test_slot_b_corrupted_sim_dv.fake_ecdsa_prod_key_*.signed.*.scr.vmem could not be opened for r mode":[{"name":"rom_e2e_sigverify_always_a_nothing_b_bad_prod","qual_name":"0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.105991648597220447316879332140989353889618437200831631135096171695449331226172","seed":105991648597220447316879332140989353889618437200831631135096171695449331226172,"line":325,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod/latest/run.log","log_context":["UVM_INFO @  10.120001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rom_e2e_sigverify_always_a_nothing_b_bad_prod_end","qual_name":"0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.75382480878374487424248150577950040948322065060113479902569481394116787961617","seed":75382480878374487424248150577950040948322065060113479902569481394116787961617,"line":326,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end/latest/run.log","log_context":["UVM_INFO @  10.280001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rom_e2e_sigverify_always_a_nothing_b_bad_rma","qual_name":"0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.45232106846136116883285057515276237348292998135816459452603550457076319782515","seed":45232106846136116883285057515276237348292998135816459452603550457076319782515,"line":326,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma/latest/run.log","log_context":["UVM_INFO @  10.160001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL @ * us: (jtag_rv_debugger.sv:113) [debugger] timeout occurred!":[{"name":"rom_e2e_jtag_debug_test_unlocked0","qual_name":"0.rom_e2e_jtag_debug_test_unlocked0.91971418655624741476047337156296089065059888554869045799484947693724321150253","seed":91971418655624741476047337156296089065059888554869045799484947693724321150253,"line":330,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_jtag_debug_test_unlocked0/latest/run.log","log_context":["UVM_INFO @ 14413.789375 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Offending '(reset_cause == HwReq)'":[{"name":"rom_e2e_keymgr_init_rom_ext_invalid_meas","qual_name":"0.rom_e2e_keymgr_init_rom_ext_invalid_meas.14073845932826185405825617012312061521436411730106165068419933842186969479342","seed":14073845932826185405825617012312061521436411730106165068419933842186969479342,"line":317,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_e2e_keymgr_init_rom_ext_invalid_meas/latest/run.log","log_context":["UVM_ERROR @ 2554.993104 us: (pwrmgr_rstreqs_sva_if.sv:98) [ASSERT FAILED] SwResetSetCause_A\n","UVM_INFO @ 2554.993104 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"Offending '$stable(key_data_i)'":[{"name":"rom_keymgr_functest","qual_name":"0.rom_keymgr_functest.30841507108451409368160888020745434773772160838587959097876638629588157313964","seed":30841507108451409368160888020745434773772160838587959097876638629588157313964,"line":327,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.rom_keymgr_functest/latest/run.log","log_context":["UVM_ERROR @ 5624.263100 us: (kmac_core.sv:464) [ASSERT FAILED] KeyDataStableWhenValid_M\n","UVM_INFO @ 5624.263100 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_ERROR @ * us: (cip_base_scoreboard.sv:575) scoreboard [scoreboard] On interface chip_reg_block, item had unexpected d_error value(predicted *, but saw *).":[{"name":"chip_csr_mem_rw_with_rand_reset","qual_name":"0.chip_csr_mem_rw_with_rand_reset.12898678506624072429720698594682053961815201033556672336466535475012797742248","seed":12898678506624072429720698594682053961815201033556672336466535475012797742248,"line":224,"log_path":"/nightly/current_run/scratch/master/chip_earlgrey_asic-sim-vcs/0.chip_csr_mem_rw_with_rand_reset/latest/run.log","log_context":[" TL item was: req: (cip_tl_seq_item@32432) { a_addr: 'h10744  a_data: 'he0039c00  a_mask: 'hf  a_size: 'h2  a_param: 'h0  a_source: 'h19  a_opcode: 'h4  a_user: 'h1bdc2  d_param: 'h0  d_source: 'h19  d_data: 'h0  d_size: 'h2  d_opcode: 'h1  d_error: 'h0  d_sink: 'h0  d_user: 'hd2a  a_valid_delay: 'h0  d_valid_delay: 'h0  a_valid_len: 'h0  d_valid_len: 'h0  req_abort_after_a_valid_len: 'h0  rsp_abort_after_d_valid_len: 'h0  req_completed: 'h0  rsp_completed: 'h0  tl_intg_err_type: TlIntgErrNone  max_ecc_errors: 'h3  } \n"," Reasons for predicted error: '{\"Fetch from CSR\"} .\n","UVM_INFO @ 2432.033424 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n"]}]}},"passed":250,"total":329,"percent":75.98784194528875}